Hi. Have a design based on the ICE40UL1K (16 ball WLCSP package) that is working fine using the CRAM or external SPI flash device to boot our IP (simple LED blinky code; pushbutton read code; tone generator code). Wish to embed the same into the OTP NVCM of the device and did this properly according to the Diamond Tool (powered the rails @ 3v0 to support the request from the datasheet and Lattice tech support). However, upon power up, the same FPGA is not boot loading from the NVCM. Any ideas on what could be wrong?
The CDONE and SS pins each have a local 10k PU to +3v3. The CDONE pin remains low after a #RESET.
The FTDI programmer is able to continue to make use of this OTP programmed FPGA using the CRAM region.
Does the ICE40UL1K feature the "WARM BOOT" option? It was ENABLED (checked) by default in the toolchain and we did NOT make us of this feature. That is, perhaps this is the root cause preventing the boot from NVCM?
Very confused and there appears to be limited documentation on this subject.
Welcome any suggestions. Thanks!