Author Topic: Boot ICE40UL1K from NVCM  (Read 1440 times)

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Offline mon2Topic starter

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Boot ICE40UL1K from NVCM
« on: October 08, 2020, 08:07:01 pm »
Hi. Have a design based on the ICE40UL1K (16 ball WLCSP package) that is working fine using the CRAM or external SPI flash device to boot our IP (simple LED blinky code; pushbutton read code; tone generator code). Wish to embed the same into the OTP NVCM of the device and did this properly according to the Diamond Tool (powered the rails @ 3v0 to support the request from the datasheet and Lattice tech support). However, upon power up, the same FPGA is not boot loading from the NVCM. Any ideas on what could be wrong?

The CDONE and SS pins each have a local 10k PU to +3v3. The CDONE pin remains low after a #RESET.

The FTDI programmer is able to continue to make use of this OTP programmed FPGA using the CRAM region.

Does the ICE40UL1K feature the "WARM BOOT" option? It was ENABLED (checked) by default in the toolchain and we did NOT make us of this feature. That is, perhaps this is the root cause preventing the boot from NVCM?

Very confused and there appears to be limited documentation on this subject.

Welcome any suggestions. Thanks!

1085530-0
« Last Edit: October 08, 2020, 08:15:39 pm by mon2 »
 

Offline mon2Topic starter

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Re: Boot ICE40UL1K from NVCM
« Reply #1 on: October 09, 2020, 03:23:01 pm »
Answering my own post but what a learning experience! This is not documented but the issue is the DEFAULT WARM BOOT FLAG being ENABLED inside the ICECUBE2 compiler.

We do not make use of this inside of our IP. If left with WARM BOOT = ENABLED, the OTP does NOT boot with our single IP block.

Be sure that there are pull-up resistors on CDONE and SPI_SS pins - we are using 4k7 for each.

The VPP voltage for the OTP process is +3v0 (not +3v3 as the +3v0 was suggested by Lattice FAE). After OTP programming, the FPGA and I/O can be ran @ +3v3.

We did 2 things here before blowing another OTP, changed the FTDI prescaler timing to 31 (to slow down the SPI interface - just in case) AND removed the WARM BOOT flag. The same LED blinky IP is working 100% and is booting from the OTP.

Hope this helps a future reader.

These ICEPIK boards will be available soon to the general public - ICE40UL1K on a 8 pin DIP format. Also a supporting programmer to program this PCBA.

Thanks!

Kumar
 
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