Spartan6 Extended Performance

[hal9001]

The Spartan6 data sheet calls out a different Vccint voltage for standard v extended performance. What does the extra .03 V do to give the FPGA higher performance for a -3 or -2 part?



Cheers!

[dtodorov]

The specs seem generally tighter for -3/-2. For what I can think of, digital timings deteriorate with reduced supply voltage

Very likely the devices are binned and their specs can be guaranteed with a narrower margin.

[BrianHG]

The Spartan6 data sheet calls out a different Vccint voltage for standard v extended performance. What does the extra .03 V do to give the FPGA higher performance for a -3 or -2 part?



Cheers!

You are reading the table wrong.  The margin is larger than that.  You must only consider the -min column when you want to guarantee reported FMAX performance.  There you see the spread is from 1.14 to 1.20.  That's a 0.06v difference, almost 0.1v.

[Someone]

Some (older) FPGA families had timing characterised across supply voltage and/or temperature. If you could guarantee the devices were running in "better" conditions, you provided your specific conditions to the timing tools and the timing was uprated (and still guaranteed by the vendor).

[hal9001]

Thanks all. Even with .06 V difference the regulator for Vccint needs to have very low ripple to hold the extended performance!
Is there a significant power draw difference on Vccint when running in standard v extended voltage?

[dtodorov]

Is there a significant power draw difference on Vccint when running in standard v extended voltage?

This should be also described in the datasheet.

[NorthGuy]

Is there a significant power draw difference on Vccint when running in standard v extended voltage?

No doubts. Power draw is mostly the switching losses of the FETs.

Gamesters do overclocking and overvoltaging on their PCs all the time.