Electronics > FPGA

vhdl - how to use memory bits for data storage?

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aussie_laser_dude:
Hi Guys :)
Total FPGA noob here.

I've written the program and it used ~4000 LUT's and 0 memory bits to store image data.

How do I store data to the memory bits? I've attached a screenshot to show the compilation report and another image showing my data storing code.
   To explain in more detail, I would like to store an integer array or logical vector array in memory and then read/write to those memory bits, this is for a cyclone IV altera fpga. I'm using Quartus II to write vhdl code to display a 2D matrix of data to a monitor through a VGA cable.

Thanks for any help

oPossum:
Make sure all access to the array is clocked. You won't get inferred RAM without a clock (in my experience). Also check the build log for hints why RAM was not inferred.

SiliconWizard:
Yup. You may also want to check that you're not accessing more than two items at the same time - basically anything more than a dual-port memory has a high probability of not being inferred as block RAM.
Maybe show us the part of your code which accesses this array.

aussie_laser_dude:
Thanks for the posts guys, maybe I didn't explain my question too well.

I am a complete beginner who has absolutely no idea on how to read or write any of those 608,526 bits. Does anyone have a working example of how to do it?

cheers

Daixiwen:
You need to write your code in a special way to be sure that the synthesizer will recognize it as memory block. As said previously, accesses must be clocked, but there are also other things, like reset conditions, that can make Quartus think it can't do what you want with memory blocks, and resort to logic instead.

Have a look at this document: Altera Recommended HDL Coding Styles. It shows how you should write your code, in both VHDL and Verilog, to be sure Quartus recognizes it correctly and use dedicated hardware.
Page 13 onwards show how to infer RAM blocks, with code examples.

You can also have a look at the synthesizer warnings. As you probably have 1000s or warnings in the log, search for your module name in the log window. If your compiled project doesn't use RAM blocks, you should have a warning explaining why.

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