Author Topic: vhdl - how to use memory bits for data storage?  (Read 426 times)

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Offline aussie_laser_dude

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vhdl - how to use memory bits for data storage?
« on: April 23, 2020, 12:02:11 am »
Hi Guys :)
Total FPGA noob here.

I've written the program and it used ~4000 LUT's and 0 memory bits to store image data.

How do I store data to the memory bits? I've attached a screenshot to show the compilation report and another image showing my data storing code.
   To explain in more detail, I would like to store an integer array or logical vector array in memory and then read/write to those memory bits, this is for a cyclone IV altera fpga. I'm using Quartus II to write vhdl code to display a 2D matrix of data to a monitor through a VGA cable.

Thanks for any help
« Last Edit: April 23, 2020, 12:04:23 am by aussie_laser_dude »
 

Offline oPossum

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Re: vhdl - how to use memory bits for data storage?
« Reply #1 on: April 23, 2020, 12:25:28 am »
Make sure all access to the array is clocked. You won't get inferred RAM without a clock (in my experience). Also check the build log for hints why RAM was not inferred.
 
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Online SiliconWizard

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Re: vhdl - how to use memory bits for data storage?
« Reply #2 on: April 23, 2020, 12:39:59 am »
Yup. You may also want to check that you're not accessing more than two items at the same time - basically anything more than a dual-port memory has a high probability of not being inferred as block RAM.
Maybe show us the part of your code which accesses this array.
 
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Offline aussie_laser_dude

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Re: vhdl - how to use memory bits for data storage?
« Reply #3 on: April 23, 2020, 01:07:21 am »
Thanks for the posts guys, maybe I didn't explain my question too well.

I am a complete beginner who has absolutely no idea on how to read or write any of those 608,526 bits. Does anyone have a working example of how to do it?

cheers
 

Offline Daixiwen

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Re: vhdl - how to use memory bits for data storage?
« Reply #4 on: April 23, 2020, 07:40:45 am »
You need to write your code in a special way to be sure that the synthesizer will recognize it as memory block. As said previously, accesses must be clocked, but there are also other things, like reset conditions, that can make Quartus think it can't do what you want with memory blocks, and resort to logic instead.

Have a look at this document: Altera Recommended HDL Coding Styles. It shows how you should write your code, in both VHDL and Verilog, to be sure Quartus recognizes it correctly and use dedicated hardware.
Page 13 onwards show how to infer RAM blocks, with code examples.

You can also have a look at the synthesizer warnings. As you probably have 1000s or warnings in the log, search for your module name in the log window. If your compiled project doesn't use RAM blocks, you should have a warning explaining why.
 
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Offline AndyC_772

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Re: vhdl - how to use memory bits for data storage?
« Reply #5 on: April 23, 2020, 07:42:37 am »
There are basically two ways to do this.

The first is to write code that behaves exactly the same way as the RAM blocks available in the device, then hope that Quartus notices that some of your logic can be directly implemented using the dedicated RAM hardware, and does so.

This is a pretty inexact science, IMHO, and I much prefer the second option which is to use the Megawizard Plug-in Manager to create a memory component to your exact specifications. From here you can use a simple wizard interface to define the width, depth, clocking scheme and other options, and the end result is a VHDL component which you add to your project and instantiate in your top level design.

It may be a bit more involved, but you're guaranteed that the RAM blocks will indeed get used.

Online BrianHG

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Re: vhdl - how to use memory bits for data storage?
« Reply #6 on: April 23, 2020, 07:50:46 am »
It may be a bit more involved, but you're guaranteed that the RAM blocks will indeed get used.
Almost.  If you have logic which simplifies any of your addresses feeding to the ram which may always be equal to 1's or 0's, or you are using the read enable/write enable features never enabling them, or your ram data outputs do not affect any logic states in your design which has any effect on any output pin, Quartus 'WILL' simplify out (eliminate from your compiled design) part or all of your defined memory block(s).  They wont even show up in the compilation report anywhere.  Or, maybe by chance (this one is not in my experience), they may show up in the synthesis report, but, magically disappear in the final fitter report.

Also, very small rams, may automatically get pushed into logic cells if they are small enough, or, you do not have any FPGA ram resources remaining.
« Last Edit: April 23, 2020, 08:32:07 am by BrianHG »
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Offline Daixiwen

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Re: vhdl - how to use memory bits for data storage?
« Reply #7 on: April 23, 2020, 08:00:08 am »
There is a drawback in using the Megawizard though: you code becomes specific to Quartus. On the other hand if you try to design your HDL code using the guidelines to have it recognized as a memory block, there is a slight chance that you can also use your code unmodified on FPGAs from another supplier.

No one* knows what Intel's long term strategy with the Altera products is, and from what we have seen so far I think it's a good idea to futureproof your code and be ready to move to another plaftorm if (when?) needed.

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* probably not Intel either ;)
 

Online BrianHG

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Re: vhdl - how to use memory bits for data storage?
« Reply #8 on: April 23, 2020, 08:09:37 am »
There is a drawback in using the Megawizard though: you code becomes specific to Quartus. On the other hand if you try to design your HDL code using the guidelines to have it recognized as a memory block, there is a slight chance that you can also use your code unmodified on FPGAs from another supplier.

No one* knows what Intel's long term strategy with the Altera products is, and from what we have seen so far I think it's a good idea to futureproof your code and be ready to move to another plaftorm if (when?) needed.

--
* probably not Intel either ;)
(For the little more advanced developers)  You can still make your own ram sub-module/instance.  And in that sub-module, make a compiler platform environmental 'IF' to select which type of vendor specific RAM instance function to be used between Intel, Xilinx, Lattice, & bottom end VHDL as a default fallback.
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Offline AndyC_772

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Re: vhdl - how to use memory bits for data storage?
« Reply #9 on: April 23, 2020, 10:10:45 am »
That's what I'd do. Bear in mind that switching FPGA vendors would be a huge undertaking anyway, involving a new PCB and almost certainly updated firmware in the host system too. I've done designs in which the FPGA has had to grow to the next larger device in the family, but never, ever ripped out a non-trivial design from one vendor in favour of another.

If you have a design which calls up an instance of, say, a dual-port RAM, there's absolutely nothing that compels you to use the wizard-generated implementation of that component. You can, if you wish, just write a function that describes the operation of that component in simple (non vendor specific) HDL, and let the synthesis tool take care of inferring the right hardware. Or you can write a 'wrapper' to go around a new vendor's dedicated hardware to make it function like the original vendor's, if it's capable of doing so.

As a bonus, doing this means your tried and tested higher level logic remains genuinely unchanged.

Online OwO

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Re: vhdl - how to use memory bits for data storage?
« Reply #10 on: April 23, 2020, 10:43:58 am »
No, don't use vendor primitives or megafunction wizard when it can be avoided.
You should always enclose commonly used logic in a separate entity. This is what I use for all projects:
https://github.com/gabriel-tenma-white/axi-util/blob/master/dcram.vhd
Discord: スメグマ#2236
Email: OwOwOwOwO123@outlook.com
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Online SiliconWizard

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Re: vhdl - how to use memory bits for data storage?
« Reply #11 on: April 23, 2020, 12:44:03 pm »
I am a complete beginner who has absolutely no idea on how to read or write any of those 608,526 bits. Does anyone have a working example of how to do it?

Maybe tell us what exactly you want to achieve. We can't guess.
 
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Offline aussie_laser_dude

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Re: vhdl - how to use memory bits for data storage?
« Reply #12 on: April 23, 2020, 01:02:44 pm »
Thanks guys, this was really helpful. The link provided by Daixiwen was great, i get how to do basic internal memory transfers now. Sounds like I'll also need external ddr3 memory for any larger data arrays. I'm kind of understanding the nios ii / qsys / wizard stuff but i suppose I'll try and master the internal memory coding first.

Thanks again guys you're all awesome!
 

Online BrianHG

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Re: vhdl - how to use memory bits for data storage?
« Reply #13 on: April 24, 2020, 04:14:06 am »
If you dont need super speed and headaches of DDR3 ram controler, you may try this PSEUDO static ram chip with a 12 wire interface with built in dram controller (run more in parallel or serial switched bank for more speed):

https://www.arrow.com/en/products/s27kl0641dabhi023/cypress-semiconductor?utm_term=instock&utm_campaign=arrow_findchips_2019&utm_currency=&utm_medium=aggregator&utm_source=findchips&utm_content=inv_listing
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Offline aussie_laser_dude

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Re: vhdl - how to use memory bits for data storage?
« Reply #14 on: April 24, 2020, 08:34:54 am »
Wow! $2 for 64Mb of memory, that's pretty tempting actually. To tell a bit about the project I'm making, I'm trying to design a ~300-600MHz (or even higher) digital phosphor oscilloscope using an fpga, external ddr3 memory, ADC for data collection with data displayed directly to a monitor via vga. (This will be continuous streams of large amounts of data being read/written/mathematically processed.
   My thought's are that it would be nice to have an oscilloscope with the following properties:
- High bandwidth (High MHz to low GHz, well, high for a hobby...)
- Many channels (at least 4)
- 100% waveform display rate with no noticeable lag with display / buttons (try measuring a signal with a loose & moving connection and you'll see it's difficult on a cheap digital scope but easy on an analogue oscilloscope)
- be reasonably cheap, open source.

 Maybe someone's already done it, but this is mostly for fun and learning anyway. Most parts of the project have been coming along nicely (vga driver, learning electronics required for measurements, adc parts / soldering etc) the only thing that's stumped me a bit has been communicating with DDR3 external memory (and internal memory). Pretty excited to try and get the memory transfers all going, that'll be a big step forward :D

 


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