Electronics > FPGA

Vivado (Xilinx) - Is there a way to store project information on GIT?

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betocool:
Hey all,

I'm working on an Artix 7 project, currently on a CMOD 7 board, with a mix of Xilinx IP components (XADC, MMCM) and my own code. Inevitably, I will have to add more Xilinx IP components.

I am storing all my own RTL code into a separate source code folder that also includes test benches, waveform definitions, anything that I work on myself. This code is in a GIT repo, and updating it is quite simple.

Different story for the actual Vivado project. Currently I'm on a CMOD7 board, but I could change into the Arty A7, and we'll also get a custom board with an Artix7-50 as our own development board. I don't mind creating a new project for each board, I have to anyway since I need to update the constraints files. I'd like to check in the project in GIT, and here's where I'm a bit stuck. Each project generates a number of subfolders. Each IP generated code has its own subfolder somewhere, in addition to god knows what. Then there's simulation folders. And a bunch of other things that I'm not really familiar or interested in, at least not yet.

Can I not just store the directives or instructions to instantiate and generate the IP blocks somewhere? Even if I need to script it in TCL, at least it would be only a script file. I'd love to just be able to commit just the settings for the project (source files, generated IP, XDC file) so that in theory someone else just imports that in Vivado alongside the RTC source and starts synthesyzing straight away.

Does anyone here have a solution for that or a guide that I can have a look at? I'm sure there must be a smart way to manage the essentials on Vivado and not all the stuff it generates.

Cheers,

Alberto

Someone:
Some good background info is already here on the forum:
https://www.eevblog.com/forum/fpga/using-vivado-in-tcl-mode/
(but the forum search function is crap at finding things to I got there via google)

Some other info a bit further on the generation side:
https://grittyengineer.com/creating-vivado-ip-the-smart-tcl-way/
which demonstrates the basic principle that everything you do in the vivido GUI is just some lines of TCL, easily observable and able to be copied to your own scripts

A fully featured build system can end up rather complicated:
https://github.com/missinglinkelectronics/fpga-vbs/blob/master/build.tcl
but there is rarely need to go that far and build scripts can generally be much slimmer and targeting the specific projects needs.

ejeffrey:
We use write_project_tcl to export our project to a TCL script and the commit that to version control.  The script includes TCL commands to regenerate all the IPs you use.   This works OK and was a reasonable compromise between having to commit an entire project vs going full non project mode.  The generated TCL script is not particularly readable but if you don't change IPs often it's not too annoying.

laugensalm:
I used to tackle this using a full Makefile based flow under a Docker container, where necessary TCL scripts are generated from the Makefile itself or from a generic XML description. That also allows you to create a fully automated continuous integration pipe from your git repo, as long as the project is complete source-wise and not containing any closed core binaries. However, vendor licenses may not allow to publish the container, or even be in violation when the license explicitely is bound to a specific work station/MAC address. It's like, don't ask, don't tell.

betocool:
Thank you all!

I will look into the write_project_tcl and try it out, and the other forum posts. Much appreciated. This will hopefully allow me to store the project parameters and the RTL code without hundreds of MBytes worth of temp files.

Cheers,

Alberto

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