What is the proper way to invert and tie high/low, signals in the Vivado IP inte

[matrixofdynamism]

I have attached a Vivado IP integrator block diagram. I have a few questions about the things in red.

1. Is using inverter from Utility Vector Logic IP, the only way to invert input signals into an IP block? I had expected an option to invert input when I right click on an input pin. But Vivado does not appear to have this option.
2. Is using the constant IP the only way to generate a permanent logic low or logic high to tie unused inputs low or high? I had expected to have a tie high or tie low option when I right click on an input pin. But Vivado does not appear to have this option.
3. Why does Vivado generate a port called gpio_rtl_0 from the AXI_GPIO block and not a port from the actual output port called gpio_io_o[3:0]? Why is the gpio_io_o[3:0] present if it is not going to be used?

[Someone]

Yep, block/schematic input for FPGAs continues to be a mess!

1. Some of the IP has options to set the polarity of the reset inside (or they take the parameter of the reset port and auto-magically select the right polarity ? dim memories of such)
2. ? have always seen constant blocks sprinkled around so there is probably no better alternative
3. Wait until it renames some of your busses, just because it felt like it!

Vivado block diagrams are a buggy pile of turd, avoid wherever possible.

[matrixofdynamism]

Actually in my case, I am dealing with AMBA busses. Therefore, I just need to use the IP integrator at the end of the day.

Actually I have used Libero SoC SmartDesign before. In there we can put in an inverter symbol quite easily along with flip flop and other things. They are all found under Primitives section of the IP catalogue. Also, we can tie IP block inputs to low or high, or mark them as unused, quite easily as well by just right click on pin and select the right option. However, I can see that it is not like that here in IP Integrator. This is quite a big surprise for me actually.

[langwadt]

double click the clock wizard and there is an option to make the reset active high or active low

the gpio_io_o shows because you have expanded the port  (click the - next to GPIO),

if it had been an input/output port it would also show io_i, io_t   the GPIO port is the port with the IO buffer included