Now I'm disappointed. I figured the LUT would be a pair of LUT4s with some clever combining logic. But there are no LUT4s even. They use LUT2s with more LUT2s to combine them. So rather restricted in the logic which can be implemented in a single LUT-tree. The LUT2 seems to be the actual primitive hardware element in the CPE Logic element. They never show you how they can be connected or how many there are. 2 input what-not gates.
I also noticed the chip doesn't have 3.3V I/Os either. 2.5V max it looks like. That's a bigger problem and precludes this device from my current need.