Electronics > FPGA

XC9500XL slow clock

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dietert1:
Need a slow clock, like 1 KHz and tried to implement an RC generator using two pins as an asynchronous inverter. The input hysteresis mentioned in the manuals doesn't seem to work, it generates nasty ringing near the edges - several 10 nsec pulses. Anyone solved this before?

Regards, Dieter

iMo:
I never did with RC, but spent a lot of time with Xtal, with no luck.
Mind the 9500XL is pretty fast.. With slow edges it may generate crap..
A ring oscillator with a divider usually works, you would need  to spend a lot of logic for it, however..

PS: a 3 inverters ring oscillator gave me around 170MHz, as I can remember..

ogden:

--- Quote from: dietert1 on November 08, 2019, 09:29:12 am ---Anyone solved this before?

--- End quote ---
Yes. By using solution that have chances of working. Use external crystal oscillator, then divide it. There are 32.768KHz oscillators for example

dietert1:
Thanks for your support. Meanwhile i found a good solution here:

https://www.edn.com/design/power-management/4322215/Add-a-Schmitt-trigger-function-to-CPLDs-FPGAs-and-applications

Circuit in Figure 2 worked right from the start. I am using R = R2 = 2K2, R1 = 10K. With C = 470 nF output signal is 670 Hz  and has a 1(high) : 2(low) asymmetry, but that doesn't matter for the application.

Regards, Dieter

ogden:

--- Quote from: dietert1 on November 08, 2019, 12:19:49 pm ---output signal is 670 Hz  and has a 1(high) : 2(low) asymmetry, but that doesn't matter for the application.

--- End quote ---
You can easily solve that by running RC oscillator on 2x higher frequency, then divide by 2 using flip-flop.

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