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Xilinx FPGA bitstream

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Unixon:
Does anybody know the specs for the bitstream format of Xilinx FPGAs (officially published or obtained by reverse engineering)?
In particular, I'm interested in the old Spartan-II family.

I know I don't need these specs to simply program the FPGA as I can use the freely available ISE WebPack software on a PC,
but my greater interest is in autonomous reprogramming of FPGAs by a custom software running on a SoC/uC/whatever.
Can't clearly tell the exact purpose of this approach at the moment, I'm just looking for all possibilities.

jancumps:
I believe that that format is unpublished.
All the open source Xilinx related projects that I've checked all rely on the Xilinx propriarity toolchain to synthesise and create the bitfile.

miguelvp:
These are relevant for the programming part:

http://www.cypress.com/?rID=75048

http://www.cypress.com/?rID=46029

Also there is a lot of information about doing this without the EZ-USB FX2/FX3 at Xilinx.
http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/platform_studio/ps_c_dld_downloading_bitstreams_fpga.htm
http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_1/platform_studio/ps_c_dld_fpga_configuration_overview.htm

As for bitstream a simple search "xilinx bitstream format" returned a lot of hits including this talk from Milkymist with links to more information about reverse engineering attempts.

http://lekernel.net/fpga_toolchain_talk.pdf

Balaur:
Do you:

a) only need to configure the device with an existing bitstream

or

b) make your own bitstream?

If a), then the configuration chapter of the Spartan II Family Datasheet is very informative. It's really easy.

If b), then I assume you really have a good reason to do this and therefore, you should be able to invest significant skill and efforts. The works in the research community (especially on topics related to design validation and fault injection through emulation) may be relevant to your interests.

Unixon:
(b) - make my own bitstream

Well, yes, I want to do a kind of research on experimental processor architectures, some of which may require dynamical reconfiguration which in turn may include self-rewriting (e.g. by a soft-core CPU) as an extreme idea. While many things can be done purely in simulation, I'm looking forward to utilize real hardware for proof-of-concept implementations and, probably, if I ever make it to this point, for practical use.

I'm planning to start with Spartan-II/3/3E families, and Spartan-II in particular at first for two reasons: (a) they are cheap enough, so I can experiment with them without having a big problem if I destroy some of them in the process and (b) they should be simpler than modern series.

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