Hi all,
I'm making a pwm generator that can be controlled by SPI as a learning exercise for verilog and FPGA's.
I'm using a generic text editor, and a script to execute a simulation. Thes text editor has no idea about verilog, so they don't have code completion, syntax highlighting, following symbols and all the other help I do get when using Qt creator for writing C++
Therefore I'm looking for a text editor that runs on arch Linux that knows about verilog.
For reference, here's what I came up with so far:
$ cat simulate.sh
#!/bin/bash
iverilog -Wall spi_test.v
vvp a.out
gtkwave spi_test.vcd -a test.gtkw
$ cat spi_test.v
`include "spi.v"
module spi_testbench();
reg spiclk, cs, mosi;
wire [15:0] data;
spi dut(spiclk, cs, mosi, data);
initial begin
$dumpfile("spi_test.vcd");
$dumpvars(1, spiclk);
spiclk = 0;
$dumpvars(1, cs);
cs = 0;
$dumpvars(1, mosi);
mosi =0;
$dumpvars(1, data);
end
initial begin
#10000 //after this delay...
$finish; //end simulation
end
initial begin
#10
mosi = 1;
#10
spiclk = 1;
#10
spiclk = 0;
#10
spiclk = 1;
#10
spiclk = 0;
#10
spiclk = 1;
#10
cs = 1;
#10
spiclk = 0;
#10
spiclk = 1;
#10
spiclk = 0;
#10
spiclk = 1;
#10
spiclk = 0;
#10
spiclk = 1;
#10
spiclk = 0;
#10
spiclk = 1;
#10
spiclk = 0;
end
endmodule
$ cat spi.v
module spi(input spiclk, input cs, input mosi, output[15:0] data);
reg [15:0] data_shift;
initial begin
data_shift = 0;
end
always @(posedge spiclk) begin
if (cs) begin
data_shift[15:0] <= {mosi,data_shift[15:1]};
$display ("data_shift: %0d ",data_shift);
end
end
assign data = data_shift;
endmodule