Electronics > FPGA

Zynq DMA Scatter Gather still included when disabled...?

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Boscoe:
Hi all,

I have this strange problem that I haven't seen on the net.

I'm configuring a DMA in a block design for the Zynq and disabling SG mode as it's simple not needed for this part of the design. Please see the screenshot of the configuration below.

However even after reseting the block design outputs, reseting the synth, generating the bitstream and exporting the HW I still get SG mode enabled in the xparameters header file!? So when I try to use the simple mode it errors out saying it's incompatible with SG.

In Vitis I reimport the hardware, clean and build. A loop I've been running for a weeks now without an issue like this.

Any thoughts would be amazing!

Thanks

asmi:

--- Quote from: Boscoe on September 27, 2023, 05:52:13 pm ---In Vitis I reimport the hardware, clean and build. A loop I've been running for a weeks now without an issue like this.

--- End quote ---
I've noticed that re-importing xsa file into Vitis sometimes is bugged - either it doesn't update the drivers, or leaves out old bitstream. However it always works perfectly when you create a new platform. So I would recommend trying to do just that and see if right settings show up as a result.

Boscoe:
Thanks for the quick reply.

Will I not have to remake my software project if I do that?

asmi:

--- Quote from: Boscoe on September 27, 2023, 06:16:07 pm ---Will I not have to remake my software project if I do that?

--- End quote ---
You can retarget your project to a new platform if you add it to the same Vitis workspace.

Boscoe:
So I tried this but SG is still included...  :palm: Currently investigating.

I have to say I'm shocked at how unstable Vivado and Vitis is. Perhaps Vitis more so due to the many components it has, I have to have task manager constantly open to kill processes preventing me from debugging etc. Typically I'll have 2-3 crashes from Vivado and Vitis per day.

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