Author Topic: PCB-RND  (Read 25136 times)

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Offline ScribblesOnNapkins

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PCB-RND
« on: August 18, 2016, 08:55:01 pm »
PCB-RND is a fork of PCB from gEDA that a few of us have been working on. At the end of last year it became more obvious that development of PCB was grinding down. PCB's last release was in 2014 and I am not going to bad mouth anyone but it looked apparent that a new release was not going to happen any time soon. The rapid development and clarity of direction caused the mainline of PCB to consider adopting PCB-RND and Igor2 (it's leader) but that was rejected by the current project lead. So we are two different groups both sharing solutions when possible.

What is the difference?
* A lot of cleanups to the code. For example no more use of longjmp() and etc in the DRC subsystem.
* Parametric footprints mean less hunting for footprints. It also does fun things like defining screw holes as M4 tight or loose fitting.
* A mechanism to automatically pull footprints from geda-symbols and or any other web accessible repo means less leg work when you want to use a new component.
* Footprints are now stored in an arbitrarily defined (user) tree instead of a 2 level one for easier searching when you have to.
* Scripting in the language of your choice not just C the following are new awk, lua, scheme, stutter, php, perl, pascal, ruby, and yes python too.
* The file format is still compatible with PCB but we made the format a plugin. Our intention is to add support for more formats (Eagle/KiCAD) in the future with a DRC list like mechanism to let you "fix" features not available in the format you are exporting too.
* Exporters are now plugins and a lot of bugs in them have been fixed.
* We support a purely 64 bit environment not just a 32 or 32/64 bit one.
* We support MacOS.
* We have an experimental Windows port and if more interest in it comes we will make this a proper release.
* Bugs in the UI of PCB were also fixed (notably the twin hole bug)
* Reduced dependency on glib which made our memory footprint a lot smaller. Our eventual plan is to add another HID for libSDL to the list

In the near future we want to...
* Find users on Windows, MacOS, and other platforms (BSD, OpenBSD, FreeBSD, Solaris) who are willing to use the software and submit bug reports.
* LTSPICE users who want a PCB package
* QUCS users who want a PCB package
* Route as bus. (we have a patch that enables this but we want more users first for testing reasons)
* Back annotation We actually could ship with this but it only works for non-hierarchical netlists if you patch gEDA to support it. (they are reviewing the patch now for their next release)

We are trying to be more responsive and less antisocial than the gEDA mailing list. If you are interested please join us.
http://repo.hu/projects/pcb-rnd/

It should be noted that all of this has also caused PCB mainline to pick up their work a little. I don't wish to be unkind but a new release from them will probably not happen until we finish our next two or three.
 
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Offline VinzC

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Re: PCB-RND
« Reply #1 on: September 10, 2016, 07:42:43 am »
Thank you very much for this news and your work. I wasn't aware of the project until I saw your post. There are indeed a few things I'd have seen included in gEDA PCB, which I've considered nice-to-have as I've gripped the essential and I'm doing fine with it. Now what your work added really is interesting. Pulling footprints from gEDA symbols, for instance, is but an important feature — note that I mostly end up not finding the footprints I want there but that's secondary. "Cross-compatibility" with Eagle and other programs definitely is what makes it a "must-have", thank you very, very much again.

I'm going to try it soon and report.
« Last Edit: September 10, 2016, 07:54:18 am by VinzC »
 

Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #2 on: October 13, 2016, 05:21:36 am »
We are going to do another release soon. It will have a considerable set of new features. I don't want to say everything now but it is the start of some big changes.
 
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Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #3 on: November 03, 2016, 06:26:53 pm »
We released a new version. The key features are...
1. Query based DRC system - we now have a 2nd DRC that is programmable so that things like "route these lines in diff pair" or "route w/ matched length" and etc. can be checked via DRC.
2. Support for more file formats
2a) kicad legacy
2b) kicad's new s format (experimental)
2c) lihata our new format - The original format is still supported but the new format lets us do things that were never possible before. Including adding comments and attributes to any arbitrary feature.
3. More plugins from the mainline of pcb's unused branches most noteably openscad export.
4. Improved grid - the new grid lets users handle larger boards more easily by scaling near the areas of interest.

Next up is Eagle compatibility, and other stuff we expect to save user aggravation.
 

Online nctnico

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Re: PCB-RND
« Reply #4 on: December 22, 2016, 03:29:49 pm »
My biggest problem with PCB is/was that traces aren't fixed to a net. If you connect a long trace to a different net somewhere then it may hop over to that net which makes it impossible to quickly discover where the problem is.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #5 on: December 27, 2016, 04:19:38 am »
We actually have a solution to the shorted net problem in pcb-rnd. It's called Minicut. Please look at our documentation on it. We are not PCB we are PCB-RND so if you have another problem with usability please tell us.
 

Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #6 on: December 29, 2016, 06:22:32 pm »
So a few things happened this week.
1. An older version of pcb-rnd (1.1.4) going to be in the next release of Debian and we are going to be in the next Ubuntu release as well.
2. We released 1.2.0 http://repo.hu/projects/pcb-rnd/releases/changelog-1.2.0.txt

Among many fixes and other changes was an over haul of sorts of the old gsch2pcb. gsch2pcb-rnd now packages all updates from the schematic as commands in a cmd file for pcb-rnd so the days of loading elements and then netlists and etc are gone.
 

Offline Cerebus

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Re: PCB-RND
« Reply #7 on: December 30, 2016, 12:06:57 am »
I'll give the Mac version a spin and see what it looks like.
Anybody got a syringe I can use to squeeze the magic smoke back into this?
 

Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #8 on: December 31, 2016, 03:54:19 am »
Are you a gEDA/PCB user? What is your current PCB layout tool and what is your current schematic capture utility?
 

Offline technotronix

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Re: PCB-RND
« Reply #9 on: January 02, 2017, 01:19:00 pm »
Hey ScribblesOnNapkins,

Thanks for the updates and all solution. I am a gEDA/PCB user.
 

Offline VinzC

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Re: PCB-RND
« Reply #10 on: January 09, 2017, 09:22:55 pm »
I'm going to test it on my Gentoo computer. Any particular hint or trap for young players? May I base my ebuild on the initial "pcb" package?
 

Offline free_electron

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Re: PCB-RND
« Reply #11 on: January 09, 2017, 10:11:11 pm »
windows version ?
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Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #12 on: January 10, 2017, 04:47:15 pm »
We have an *experimental* windows release but it has only been distributed internally. We don't want to release it publicly until it has real testing. If people (more than 2) are willing to volunteer to do real world testing of it then we could make it public.

Personally I know that to grow past a certain point we have to support windows but doing a first windows release with bugs will make the users who try it allergic to any future work we do.
« Last Edit: January 10, 2017, 05:24:56 pm by ScribblesOnNapkins »
 

Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #13 on: January 10, 2017, 05:14:10 pm »
VinzC I am also a gentoo user. You can have the regular version of pcb and pcb-rnd installed at the same time. You can also run it from the src directory after you build it. You might have trouble with using the old pcb-mainline ebuild as a base for this since it uses autotools (configure) and we don't. For cues on how to deal with the differences try looking at brlcad's ebuild.

Trap for young players: We tried not to have any. If you are used to regular old pcb it should be the same. Currently there are 2 things new people should know.
1. Self intersecting polygons will cause you pain. Drawing copper arcs that are almost circles inside of a polygon will cause them. All other arcs are perfectly safe. (This is a bug we found in the original pcb code)
2. For people who used gsch2pcb for importing more complex projects (multiple schematics to one layout) pcb-rnd has replaced gsch2pcb with gsch2pcb-rnd and it has a slightly different interface. -m import is the one you probably want. If you used *.prj files then you need to convert them using pcb-prj2lht which is a script we included in the release.

We try very hard to be user driven so if you are a young player and you find something that feels cumbersome please *tell* us.
« Last Edit: January 10, 2017, 05:26:41 pm by ScribblesOnNapkins »
 
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Offline free_electron

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Re: PCB-RND
« Reply #14 on: January 12, 2017, 04:13:09 pm »
here is a couple of things you may want to add into the tool ( things that i am missing in a lot of PCB cad software )

- design rules in the library builder so i can run DRC when i am building a footprint.
- clipping silkscreen. if i place silkscreen over copper it should clip automatically according to a rule. so i don't have to fix that in the gerber editor ( and i can drive it from rules. some board vendors can get silkscreen registration more accurate than others.
- decals that autosize to their bounding box so i when i print out the assembly layer the designators autoscale to fit the component size.
- mechanical tolerances on parts
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Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #15 on: January 15, 2017, 05:26:54 pm »
- Design Rules in the "library builder". We let you tweek footprint pad sizes and etc later on once you have a layout started. Footprints should be drafted to manufacture standards.
- Silk screen clipping happens at the fab level. You don't have to worry about it overlapping copper in the gerbers. I have been letting them run over each other for years with out issue.
- Can you explain more about decals? I think you are onto something there.
- "Mechanical Tolerances" on parts? You mean like hight? We have export of the board to openscad and have been thinking about pulling 3D part models into openscad to check for collisions (with the case and etc)
 

Offline Cerebus

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Re: PCB-RND
« Reply #16 on: January 15, 2017, 07:27:56 pm »
- Silk screen clipping happens at the fab level. You don't have to worry about it overlapping copper in the gerbers. I have been letting them run over each other for years with out issue.

That is making the assumption that some third party is making the boards. That is not warranted; many people make their own boards and they are, I suspect, exactly the class of people most likely to use FOSS.
Anybody got a syringe I can use to squeeze the magic smoke back into this?
 

Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #17 on: January 16, 2017, 05:30:34 am »
There are separate export modes for home etching in PDF, PS, and PNG formats among others in both PCB and PCB-RND. Both projects developers do a fair amount of etching at home. We also support g-code export but I don't know how many people on ether project have mills to test it on.
 

Offline free_electron

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Re: PCB-RND
« Reply #18 on: January 18, 2017, 05:42:37 am »
- Design Rules in the "library builder". We let you tweek footprint pad sizes and etc later on once you have a layout started. Footprints should be drafted to manufacture standards.
Let me fill you in on a couple of things. The design of a pcb stands or falls wth the library. There is NO tweaking at pcb design level. Footprints are stored in a library. Once placement is done , ony routing remains. There is no such thing as 'editing' in situ. The reason is that the next iteration it will reintroduce a problem. Or an instance of a footprint may not get updated.

This leads to endless rework cycles and having to do too much manual checking.
If a problem is found it is fixed in the library and this then propagates into the designs.

Footprints are drafted not only to part manufacturer standards. Also tuned to pcb manufacturer for things such as soldermask slivers, copper clearance, pad to pad , hole to hole, annular ring etc. those things require design rule checking. That needs to happen for every part created before it is stored in the library. Some data is not stored as constants but as variables that are overriddden from layout. Other data is static.

So. I want to be able to check my footprints when making them in the library.

Quote
- Silk screen clipping happens at the fab level. You don't have to worry about it overlapping copper in the gerbers. I have been letting them run over each other for years with out issue.
BAD practice. The fabs should not modify your data.

- Can you explain more about decals? I think you are onto something there.


Quote
- "Mechanical Tolerances" on parts? You mean like hight? We have export of the board to openscad and have been thinking about pulling 3D part models into openscad to check for collisions (with the case and etc)
Not only that. Lets take a sot23 package. Every manafucaturer has small permutations. A nxp one may have pins that are 0.2 to 0.3mm. A TI one may be 0.25 to 0.35 range. The body may have different tolerance.
I do NOT want to create 500 different sot23 footprints. I want to feed a table into the library. For nxp : here are the numbers for ti : here are the numbers. The library editor then scales the pads.
I also would like to see parametric libraries that can use equations (like solidworks) so i can use variable names at board level or instance level to control attributes.

This goes through into 3d space including scaling of the 3d model.

For example : an electrolytic capacitor. They are specked as 10.5mm tall and 10mm diameter +/- 0.5mm
That means my courtyard needs to be oversized to max tolerance to guarantee the part will always fit. Same for my silkscreen outline. The 3d model also needs to be enlarged to max tolerance.
I do not want to perform those calculations. Or store this as a 11mm by 10.5mm cap in the library.
It is still a 10x10.5 : the cad software is fed the tolerance and does the correction
« Last Edit: January 18, 2017, 06:12:50 am by free_electron »
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Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #19 on: January 18, 2017, 05:11:29 pm »
Editing in situ exists if people don't want to use it that is fine. They can edit the footprints in their library directly. In situ edits only change the one instance and are meant for doing *very* minor *one* *off* changes. Footprints should be drafted to spec. and if deviations are made they should be well documented. That is a user issue not a problem for the layout tool. Users of PCB mainline asked for this feature and they got it, we were not going to remove it from PCB-RND. (I have only used it once.) Insitu editing only lets you change pad/hole sizes and silk screen line thickness. You can't go remaking things completely

There is no fab I have ever seen that prints silk over directly over copper. There is there for no reason to care if someone has drawn silk over copper in their footprints. They are not modifying my data. They don't have the ability to print silk over copper directly.

"Mechanical Tolerances" - We have a footprint generator built in that makes the footprints based on common patters with pads and etc based on user defined variables. If you had ever used the tool you are trying to school me in then you would know we already have this. By default the footprint generator uses pads of the ISO/ANSI standards for the type requested. http://igor2.repo.hu/tmp/pcblib/ to see how this works see the simple example of screws http://igor2.repo.hu/cgi-bin/pcblib-param.cgi?cmd=%20screw(3.2mm,%206mm,%20circle:hex)
 

Offline Monkeh

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Re: PCB-RND
« Reply #20 on: January 18, 2017, 05:14:01 pm »
They don't have the ability to print silk over copper directly.

Of course they do! It's not some magic process which doesn't stick to copper, or any or the plating options..
 

Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #21 on: January 18, 2017, 08:42:42 pm »
Ok well I have never seen that but I also don't draw silk over copper in my footprints and etc. If you don't want silk over copper then *don't* draw silk over copper.
 

Offline ScribblesOnNapkins

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Re: PCB-RND
« Reply #22 on: January 18, 2017, 08:46:35 pm »
Why would anyone draw in silk and then not want it produced?
 

Offline free_electron

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Re: PCB-RND
« Reply #23 on: January 18, 2017, 11:48:45 pm »
Fabs can perfectly print silkscreen over copper. It s the same ink as the soldermask.
When gerber data is read-in it is pst processed and checked for fab violations. One of these steps is to perform a clipping operation between silkscreen and exposed. They set a retracting factor to make sure the silkscreen does not bleed into the soldermask cavity and they accommodate for registration tolerances.

This means that my data is being manipulated. I do not want that.

I am not asking you to remove functionality. I am asking you to add functionality !

When creating a connector footprint i want to draw a silkscreen line that looks like this :

-0--0--0--0--0--0--0-

The - is silkscreen. The 0 is a pad (exposed copper).

In macro view it actually looks like this :
Code: [Select]
    ___
== | o | ==
    -----
The box is the opening in the soldermask. Just like there is a rule defining how close the soldermask comes to the actual pad, there is a rule (manufacturer dependent ! ) that defines how close the silkscreen can actually come to the edge of the soldermask opening.

 Want to be able to simply draw a single laing across the pads , and the cad tool will convert this into a 'dashed' line that automatically creates the correct clipping , respecting the rules.

The clipping distance is driven from a parameter. That parameter is not set as static in the library , but picked up from a rule in the pcb. Depending on who will manufacture my board i can feed the clipping distance and the silkscreen will trim itself.

I would make a 'smart silkscreen' trace and 'smart silkscreen polygon' object. ( leave what is in there 'as-is')
Any instance of these in a library listen to the rules set in the PCB layout.
For both you can define 'silk to solder' and 'silk to copper' distances. These work as 'furthest distance wins'.
For the smart trace you can also override the width from the pcb tool.

That way, if my manufacturer can only handle 6 mils i can simply set that and all the silkscreen will widen / shrink accordingly without me having to go manually edit this stuff each and every time.

And i am not trying to school you in the tool. I am trying to chool you in how pcb layout is done. Come off yor throne and listen to actual pcb designers ! This is my gripe with this knd of projects. The tools are developed by programmers that have no firm grasp of pcb design and manufacturing.






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Offline ludzinc

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Re: PCB-RND
« Reply #24 on: January 19, 2017, 01:15:56 am »
..[snip]..
We are trying to be more responsive and less antisocial than the gEDA mailing list. If you are interested please join us.
..[snip]..

Editing in situ exists if people don't want to use it that is fine. They can edit the footprints in their library directly. In situ edits only change the one instance and are meant for doing *very* minor *one* *off* changes. Footprints should be drafted to spec. and if deviations are made they should be well documented. That is a user issue not a problem for the layout tool. Users of PCB mainline asked for this feature and they got it, we were not going to remove it from PCB-RND. (I have only used it once.) Insitu editing only lets you change pad/hole sizes and silk screen line thickness. You can't go remaking things completely

There is no fab I have ever seen that prints silk over directly over copper. There is there for no reason to care if someone has drawn silk over copper in their footprints. They are not modifying my data. They don't have the ability to print silk over copper directly.


Yeah, sure....

Free_electron's advice is pure Gold, but you guy's don't want to listen....
 
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