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| Hyperthreading or not? |
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| brucehoult:
--- Quote from: paulca on December 27, 2024, 10:02:24 am ---AMD consumer chips have a load sensing "single thread boost" mechanism. When a heavy single thread load is detected, the CPU schedules it across the 2 fastest cores. This allows the thread to produce more heat but spread it across a wider area and therefore facilitate higher boost clocks for single thread loads. So it's kinda like negative hyperthreading. Instead of running multiple threads per core they are using multiple cores to run one thread. --- End quote --- How does a CPU (hardware) schedule an OS construct (thread)? Does it dynamically renumber the cores behind the OSes back? |
| ejeffrey:
The cpu doesn't actually do that. The scheduler does. Rather, the CPU provides data tables to the scheduler on which cores are preferred. On a multi core system, each CPU can have a different max boost frequency, and in AMD CPUs especially the cost to migrate between different core complexes is high because they don't share L3 cache. |
| brucehoult:
--- Quote from: ejeffrey on December 28, 2024, 02:55:08 am ---The cpu doesn't actually do that. The scheduler does. --- End quote --- That is what I would expect. --- Quote ---in AMD CPUs especially the cost to migrate between different core complexes is high because they don't share L3 cache. --- End quote --- On, say, the 9950X, each cluster of 8 cores on a CCD shares 32 MB of L3 cache. As there is an inter-CCD bandwidth of 64 GB/s, the time to transfer the entire L3 from one CCD to the other is 0.5 ms. So if you move a single active thread from one CCD to the idle CCD once every 50 ms that's a 1% overhead. That sounds better than down-clocking by even 100 MHz (1.75%) from 5.7 GHz to me. |
| coppice:
--- Quote from: ejeffrey on December 28, 2024, 02:55:08 am ---The cpu doesn't actually do that. The scheduler does. Rather, the CPU provides data tables to the scheduler on which cores are preferred. On a multi core system, each CPU can have a different max boost frequency, and in AMD CPUs especially the cost to migrate between different core complexes is high because they don't share L3 cache. --- End quote --- This is always the case for any non-homogenous multi-core system. The CPU can't independently do what is needed. The OS can't independently do what is needed. There needs to be cooperation. The horrible early results with hyper-threading were mostly due to the OS being inadequately aware of the nature of the CPUs it was scheduling for, so it would often run 4 threads on 2 CPUs, leaving 2 CPUs idle in a quad CPU package. As the OSes added hyper-thread awareness performance improved. Whatever you do to make cores and memory less symmetric in their behaviour requires the hardware to tell the OS what it looks like, and the OS to understand that information and behave sensibly. |
| paulca:
If it is a BIOS option and works in both linux and windows without specific loads.... it's not the OS. The CPU hardware is well aware of what threads are.... an incrementing program counter. Nothing more. |
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