I'm in the process of refreshing my now somewhat ancient PC workhorse, built in 2015...
Looking at DDR5 memory I see specs like 6400 MT/s latency 30-40-40-72 and such. This leads to a bunch of questions I thought you guys here might be able to answer... Are these latencies the number of clock cycles at the max specified transaction rate? Or some standard JEDEC (e.g. 5600) rate? In other words, given two sticks at say 6000 MT/s and 7200 MT/s with the same latency cycle counts, the latter would have slightly over 1/6 lower latencies? Also, does the transaction spec take into account boundary crossing latencies for linear access, or is it the max specified transaction rate for up to one perfectly aligned page, ignoring the latency to initially switch to that page? Do all PC DDR5 sticks have the same page size?