Author Topic: NEW 100MHz Keysight Scope Release on 1st March 2017  (Read 237524 times)

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Online mikeselectricstuff

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #225 on: February 03, 2017, 04:26:19 pm »
C) I'm not talking about ease of use or features, I'm talking about scope responsiveness. You can turn on everything on the X-Series at once (serial decode, FFT, masking etc) and it doesn't slow down.
That's not strictly true all the time, I've seen it get really sticky in a few slightly complicated circumstances but 95% of the time it's excellent
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Offline continuo

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #226 on: February 03, 2017, 04:48:58 pm »
Dave, will there be a teardown vid on your channel?  :popcorn:
 

Offline memset

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #227 on: February 03, 2017, 06:18:43 pm »
A decent Zynq is like $50 in qty.
An amortised ASIC will be much cheaper.

I somewhat doubt that. FPGA's are not good for mass-market (except for time-to-market thing). But for the scopes? Scopes are not mobile phones and never sold in millions.
Even worse, 2000X and 3000X already use ADC + MZ ASIC + Spartan3 FPGA + SPEAR SoC. If I replace all that "MZ ASIC + Spartan3 FPGA + SPEAR SoC" with single Zync, wouldn't that be nice?
We need to take all MZ4 R&D + production costs to be divided by price-number of scopes sold to get ASIC price estimation.
 

Offline nfmax

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #228 on: February 03, 2017, 06:49:34 pm »
Low end scopes probably do sell in millions, over the life of the product range. And we are not comparing a from-scratch design with a new ASIC versus an FPGA: the ASIC already exists and its unit cost will be much less than an FPGA of equivalent functionality!
 

Offline Someone

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #229 on: February 03, 2017, 09:01:09 pm »
I think the MZ4 is now about 6 years old?
I think I did some math in another thread and found they released a new Megazoom every 7 years on average?
I'm not sure why anyone would need the new megazoom ASIC for Infiniivision-class devices with today's reasonably priced SoC + FPGA chips like Zync. Maybe if you're going to use 20GSa ADC in 3000X replacement...
There is a very large amount of memory on the megazoom ASIC to support the fast histograms (plotting) its extremely high bandwidth and low latency and probably larger in size than the 4Mpts of acquisition memory. There are large Xilinx SoC parts with these quantities of memory but they are extremely expensive, and not comparable to the entry level Zynq products. Look up something with 4Mpts x 2 channels x 8 bits = 64Mbits of ram resources.

A decent Zynq is like $50 in qty.
An amortised ASIC will be much cheaper.
I somewhat doubt that. FPGA's are not good for mass-market (except for time-to-market thing). But for the scopes? Scopes are not mobile phones and never sold in millions.
Even worse, 2000X and 3000X already use ADC + MZ ASIC + Spartan3 FPGA + SPEAR SoC. If I replace all that "MZ ASIC + Spartan3 FPGA + SPEAR SoC" with single Zync, wouldn't that be nice?
We need to take all MZ4 R&D + production costs to be divided by price-number of scopes sold to get ASIC price estimation.
There are many problems with this, the ADC is a separate ASIC, the SPEAR SoC already includes some programmable logic, and the Spartan3 is used for additional maths/measurements? But they're each very cheap and wouldnt benefit much from integration, possibly even suffer when you become IO constrained in a single package.
 

Offline memset

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #230 on: February 04, 2017, 05:18:18 pm »
the ASIC already exists and its unit cost will be much less than an FPGA of equivalent functionality!
ASIC didn't came out from the thin air. I'm speaking about early stage of ASIC development planning. When you have to do a right decision whether to develop a new ASIC or call Xilinx to ask them for a quote of 1M Zync's.
ASIC still have two unbeatable advantages: highest performance and 100% copy protection. On the other side is extreme inflexibility.
 

Offline JPortici

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #231 on: February 04, 2017, 06:18:44 pm »
but here we are talking about using an asic that already exist and its developing cost was (probably) already absorbed so you are paying for the production only vs using a generic platform.

if however the decision was between developing a new asic or using a SoC FOR A ENTRY LEVEL MODEL...
 

Online hans

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #232 on: February 04, 2017, 11:34:54 pm »
I don't think Agilent would be making an ASIC for the 2000x/3000x series if it wouldn't have a reasonable ROI within that series. In the last 5 years, the market hasn't been turned upside down that severely and it looks like they can reuse it for the lower end model now. That means they can probably make these ASICs for rather low cost in the 1000 series scopes, and probably push the higher series forward in a few years time.

FPGA's and in particular the Zynq are not cheap ICs. The Zynq is a 28Nm chip, the MegaZoom IV is a 90Nm chip. But I bet the ASIC will be probably a smaller die, less of a power hog yet faster than a Zynq. I'm not even sure if you could fit that much functionality at that performance in a Zynq; 1M wfms per second with hardware decoding, segmented memory and all the other bells and whistles? It was published here that the chip contains 6M gates. Now some of that could be the embedded memory, but I wouldn't be surprised if the actual logic makes up a couple of Million gates as well.

The Zynq is a nice chip, but the lower end chipsets only compare to like a mid range Cyclone II in terms of memory and logic resources. Don't forget that because FPGA's are re-programmable, they got a bucket load of gates and transistors to make any kind of usable logic. This costs area, thus money, reduces speed, draws power and overall makes FPGAs unattractive in mid to high volume products.
« Last Edit: February 04, 2017, 11:38:05 pm by hans »
 

Offline Someone

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #233 on: February 05, 2017, 12:09:20 am »
It was published here that the chip contains 6M gates. Now some of that could be the embedded memory, but I wouldn't be surprised if the actual logic makes up a couple of Million gates as well.
The quote is:
Quote
custom 90-nm CMOS ASIC with 6M gates and embedded memory
So the ?dram is likely in addition to the 6 million "gates".
 

Offline kcbrown

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #234 on: February 05, 2017, 01:07:04 am »
A question about setting up triggers ...

If you have an FPGA that is part of your triggering setup, and you want to change the triggering conditions, would you be able to reprogram the FPGA "on the fly" when you reconfigure the trigger?

Which is to say, rather than set up a configurable fabric for the purpose of implementing a programmable trigger, would it be possible to take advantage of the fact that the FPGA is already a configurable fabric?

I ask because I was under the impression that the binary formats and such used for FPGAs were kept rather close to the chest of the FPGA manufacturers (else I expect we'd have seen open source FPGA code generation programs by now), and if that's the case, I don't see how one could go about reprogramming the FPGA on the fly in that manner -- you'd have to have a pre-generated binary image ready to go for each possible trigger combination.

Anyway, if FPGAs can be reprogrammed on the fly in that manner, that would make the use of an FPGA a pretty massive advantage, would it not?
 

Offline artag

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #235 on: February 05, 2017, 01:17:36 am »
Traditionally it hasn't been possible to change a few bits in an FPGA image to change something like triggering conditions. The nearest you could probably get is a selection of images for different tasks with some parameterisation to select options.

However, I'm hopeful that the opening up of the Lattice IceStorm will pave the way for more intelligent reconfiguration.
 

Offline kwass

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #236 on: February 05, 2017, 03:16:12 am »
Its all speculation but in the end, but Keysight does not have to justify pricing or product strategy to anyone.  Its up to you the buyer, to decide how to react to their offerings.

My point was: If Keysight offers this scope at a bargain price, they will make their high-end customers very aware of the low material cost of Keysight DSOs, and what pricing is possible if you accept lower margins. They will create a perception that they are fleecing the high-end customers with inflated prices, relative to what they offer in the low end. I don't expect them to do that, but rather to keep a "healthy" ratio of high-end vs. low-end prices, in proportion with the perceived cost and value differences of the various scope families.

I still expect the price for a Keysight DSOX scope, 70 MHz with generator, to be closer to $1000 than to $200. I'm offering a bet: I will buy a new DSOX from you for $447 (which is the geometric median between the two) once it is out. If your low price estimate is right, you make a good deal; otherwise I will.  ;)

But I do agree with you that this is all speculation at this point...  ;)

There are prices on this Russian site:

 https://translate.google.com/translate?hl=en&sl=ru&u=https://dip8.ru/shop/izmerenija/izmeriteli_elektricheskih_velichin/ostsillografy/tsifrovye_ostsillografy/tsifrovye_ostsillografy_prochee/&prev=search

If correct, it works out to $2,148US for the DSOX1102G which seems impossibly high.  However is does list all the models which at least gives an idea of how they are priced relative to each other.  The DSOX1102A (no generator) works out to $1,647US -- which implies the generator is a 30% increase over the base model.
« Last Edit: February 05, 2017, 03:13:29 pm by kwass »
-katie
 
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Offline Someone

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #237 on: February 05, 2017, 07:41:02 am »
If you have an FPGA that is part of your triggering setup, and you want to change the triggering conditions, would you be able to reprogram the FPGA "on the fly" when you reconfigure the trigger?

Which is to say, rather than set up a configurable fabric for the purpose of implementing a programmable trigger, would it be possible to take advantage of the fact that the FPGA is already a configurable fabric?

I ask because I was under the impression that the binary formats and such used for FPGAs were kept rather close to the chest of the FPGA manufacturers (else I expect we'd have seen open source FPGA code generation programs by now), and if that's the case, I don't see how one could go about reprogramming the FPGA on the fly in that manner -- you'd have to have a pre-generated binary image ready to go for each possible trigger combination.

Anyway, if FPGAs can be reprogrammed on the fly in that manner, that would make the use of an FPGA a pretty massive advantage, would it not?
I've no idea how much trigger logic (if any) is offloaded in this case, but if you had the full bandwidth data going to/through an FPGA it would open up very complex trigger possibilities. Xilinx did/do support partial reconfiguration:
https://www.xilinx.com/products/design-tools/vivado/implementation/partial-reconfiguration.html
And while its complex to get working there can be excellent use cases like this. The formats of the binary (configuration) files are not complex at all and there are already tools for changing the ram contents in the files which could support most of the realtime configuration needs of scope triggers.
 

Offline EEVblogTopic starter

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #238 on: February 05, 2017, 08:16:20 am »
I somewhat doubt that. FPGA's are not good for mass-market (except for time-to-market thing). But for the scopes? Scopes are not mobile phones and never sold in millions.
Even worse, 2000X and 3000X already use ADC + MZ ASIC + Spartan3 FPGA + SPEAR SoC. If I replace all that "MZ ASIC + Spartan3 FPGA + SPEAR SoC" with single Zync, wouldn't that be nice?
We need to take all MZ4 R&D + production costs to be divided by price-number of scopes sold to get ASIC price estimation.

The MZ4 has the sample memory in it too.
And I'm doubting you can make a Zync based system as fast as the optimised MZ4 ASIC.
 

Online mikeselectricstuff

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #239 on: February 05, 2017, 08:35:18 am »
Traditionally it hasn't been possible to change a few bits in an FPGA image to change something like triggering conditions. The nearest you could probably get is a selection of images for different tasks with some parameterisation to select options.

However, I'm hopeful that the opening up of the Lattice IceStorm will pave the way for more intelligent reconfiguration.
FPGA vendors have been occasionally talking about partial reconfiguration for at least 20 years but AFAIK none have actually implemented it in any useful way.
Memory is cheap nowadays so multiple images for different decodes is a reasonable way to do it. You don't swap between decodes often enough that a second or two of reload time would be an issue.

 
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Offline AndyC_772

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #240 on: February 05, 2017, 09:00:01 am »
Traditionally it hasn't been possible to change a few bits in an FPGA image to change something like triggering conditions. The nearest you could probably get is a selection of images for different tasks with some parameterisation to select options.

It would be very unusual to change an FPGA image on-the-fly. Much more likely is that it would contain the logic for all the different possible trigger conditions, and a register interface that would allow the CPU to select between them.

Online nctnico

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #241 on: February 05, 2017, 01:09:23 pm »
I somewhat doubt that. FPGA's are not good for mass-market (except for time-to-market thing). But for the scopes? Scopes are not mobile phones and never sold in millions.
Even worse, 2000X and 3000X already use ADC + MZ ASIC + Spartan3 FPGA + SPEAR SoC. If I replace all that "MZ ASIC + Spartan3 FPGA + SPEAR SoC" with single Zync, wouldn't that be nice?
We need to take all MZ4 R&D + production costs to be divided by price-number of scopes sold to get ASIC price estimation.

The MZ4 has the sample memory in it too.
And I'm doubting you can make a Zync based system as fast as the optimised MZ4 ASIC.
I'm very sure you can! There is absolutely nothing in the MZ4 ASIC you can't do with an FPGA. And having a direct path between the CPU and sampledata probably opens new possibilities due to the higher memory bandwidth.
« Last Edit: February 05, 2017, 01:17:51 pm by nctnico »
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Online nctnico

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #242 on: February 05, 2017, 01:13:16 pm »
Traditionally it hasn't been possible to change a few bits in an FPGA image to change something like triggering conditions. The nearest you could probably get is a selection of images for different tasks with some parameterisation to select options.

However, I'm hopeful that the opening up of the Lattice IceStorm will pave the way for more intelligent reconfiguration.
FPGA vendors have been occasionally talking about partial reconfiguration for at least 20 years but AFAIK none have actually implemented it in any useful way.
Same here when it comes to Xilinx. It looks promising but once you delve deeper into what is needed then you'll quickly notice the tools aren't really suitable to do it and programming a Xilinx chip in circuit using JTAG from a microcontroller is a world of pain with a regular image.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline saturation

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #243 on: February 05, 2017, 04:04:34 pm »
Thanks kwass.  Some products listed have been sold for some years now elsewhere [ older model Keysights, GWinsteks and Pico scopes], so we can get a ballpark figure for that vendors premium over MSRP price for a US buyer.  Sampling various products the premium is 2x to as high as 3.3x, mid point ~ 2.7x the MSRP.

So estimating, entry level EDUX1002A at 66,720 rubles ~ $1131 range from $343 - $566, midpoint $419




There are prices on this Russian site:

 https://translate.google.com/translate?hl=en&sl=ru&u=https://dip8.ru/shop/izmerenija/izmeriteli_elektricheskih_velichin/ostsillografy/tsifrovye_ostsillografy/tsifrovye_ostsillografy_prochee/&prev=search

If correct, it works out to $2,148US for the DSOX1102G which seems impossibly high.  However is does list all the models which at least gives an idea of how they are priced relative to each other.  The DSOX1102A (no generator) works out to $1,647US -- which implies the generator is a 30% increase over the base model.
Best Wishes,

 Saturation
 

Online mikeselectricstuff

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #244 on: February 05, 2017, 08:04:13 pm »
Traditionally it hasn't been possible to change a few bits in an FPGA image to change something like triggering conditions. The nearest you could probably get is a selection of images for different tasks with some parameterisation to select options.

It would be very unusual to change an FPGA image on-the-fly. Much more likely is that it would contain the logic for all the different possible trigger conditions, and a register interface that would allow the CPU to select between them.
Except that takes more FPGA resources, so you may need a larger part to accommodate all the functions, only a subset of which are needed at any time. The idea that you could partition an FPGA and swap multiple blocks in and out in the fly is very attractive if it can be made to work.
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Online nctnico

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #245 on: February 05, 2017, 08:19:29 pm »
At one of my previous employers we looked into partial configuration but in the end we went for loading the appropriate FPGA image for a specific function. This requires more flash memory to store the various but flash has been relatively cheap for a long time. AFAIK you have to stop the FPGA during a partial configuration cycle so loading an entire or partial image doesn't make much difference.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline Someone

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #246 on: February 05, 2017, 09:26:46 pm »
Traditionally it hasn't been possible to change a few bits in an FPGA image to change something like triggering conditions. The nearest you could probably get is a selection of images for different tasks with some parameterisation to select options.

However, I'm hopeful that the opening up of the Lattice IceStorm will pave the way for more intelligent reconfiguration.
FPGA vendors have been occasionally talking about partial reconfiguration for at least 20 years but AFAIK none have actually implemented it in any useful way.
Same here when it comes to Xilinx. It looks promising but once you delve deeper into what is needed then you'll quickly notice the tools aren't really suitable to do it and programming a Xilinx chip in circuit using JTAG from a microcontroller is a world of pain with a regular image.
Doesnt match my experience, both were easy to do and saved enough cost in the systems to make it worthwhile.
 

Offline EEVblogTopic starter

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #247 on: February 06, 2017, 04:05:47 am »
The MZ4 has the sample memory in it too.
And I'm doubting you can make a Zync based system as fast as the optimised MZ4 ASIC.
I'm very sure you can! There is absolutely nothing in the MZ4 ASIC you can't do with an FPGA. And having a direct path between the CPU and sampledata probably opens new possibilities due to the higher memory bandwidth.

You may be able to, but it's not just magic. FPGA's have fabric timing and routing overhead that ASIC's generally can optimise out with more consider layout.
 

Online nctnico

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #248 on: February 06, 2017, 10:56:07 am »
The MZ4 has the sample memory in it too.
And I'm doubting you can make a Zync based system as fast as the optimised MZ4 ASIC.
I'm very sure you can! There is absolutely nothing in the MZ4 ASIC you can't do with an FPGA. And having a direct path between the CPU and sampledata probably opens new possibilities due to the higher memory bandwidth.
You may be able to, but it's not just magic. FPGA's have fabric timing and routing overhead that ASIC's generally can optimise out with more consider layout.
I never wrote an FPGA solution would be more power efficient. Then again it seems the MZ4 uses a 90nm process and the Zync seems to be on a 28nm process.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline memset

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Re: NEW 100MHz Keysight Scope Release on 1st March 2017
« Reply #249 on: February 07, 2017, 06:57:08 pm »
I'm very sure you can! There is absolutely nothing in the MZ4 ASIC you can't do with an FPGA. And having a direct path between the CPU and sampledata probably opens new possibilities due to the higher memory bandwidth.
Yep, but it was quite hard to achieve the same functionality back 7 years ago on a reasonably prices FPGA. For MZ5 you'll need to achieve something like 20-50GSa/s 10+ bit datapath to make it impossible to replace with FPGA. It wouldn't make any sense to develop a new ASIC without drastical improvement of parformance and functionality.
Personally I'd like for MZ5 to handle 20GSa/s, 5GHz+ BW with some 8b10b / 64b66b hardware serial decoders for next age midlevel scopes like future-DSOX3000.
 


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