The two pals I want to couple in question: AT91SAM9260 and EP4CE15E22C8N. The former is an ARM926EJ-S SoC that runs a Linux-based host system. The latter is a FPGA that I want it to do things with the processor. Questions:
* Can I hold the FPGA in reset until the ARM boots and loads the FPGA with its configuration?
* If so, can the FPGA configuration loading channel be used as a channel of communication between the FPGA and the SoC after the FPGA is loaded?
* What is the best communication channel - parallel system bus, or some kind of serial interface?
* For AT91SAM9260, how to DMA into and out of the FPGA given the communication channel?
Also is this a reasonable system spec?
* SoC subsystem: AT91SAM9260 ARM926EJ-S @180MHz, 128MB (32M x32) SDRAM, 512MB SLC NAND, microSD card slot, Wi-Fi over SDIO, BT over UART, 10/100 Ethernet, 800x480 LCD with capacitive touch over RA8875
* FPGA subsystem: EP4CE15E22C8N, 32MB DDR SDRAM (32M x8), some kind of host interface, shared pins to LCD, some other exported pins, hopefully no external configuration device needed
And finally, given the connections (FPGA have access to LCD interface,) can I program the system to shut down RA8875 LCD interface after the FPGA booted, and let it function as a soft GPU?