Advantest R6581 8.5 digit DMM mini teardown/repair

[Mickle T.]

Run-down is here: 

[szszjdb]

Hi,  Mr. Mickle.T and Mr. Kleinstein ,

Thanks for pointed out my misunderstanding about the INT waveform. It is a little different from the 6871's which have not the negative rundown period. It's really a clever and fast method to reach the high precision. Could you mind me the detail of the whole timing when measuring like +10V/-10V. How are they arrange the 6 Iref source work with the Ix? 

I had checked the download EEPROM code that the version is 004246-A02 and 004245-A02 , the same with my DMM, so it seems no need to update ?

For the 10v-1v transfer issues I was focusing on , I think it is in the front DC amplifier. Please look at the data I recorded as attached. It is tested between  the HI port to ADIN using 34401 in 10Gohm mode.  The error between the 10v and 1v input have reached 11uv, that is exactly the error when in 10v-1v transfer test. As your document about the calibration, it show that there have only the fullscale and zero point to be calibrated . For 10V range, it only calibrated the zero and -10v point  and left the +10v undo, so it can't fixed the error for 0-10v input introduced by the DC AMP, right?
Would you please help to confirm the test with your 6581?

Best Regards,
szszjdb

[Kleinstein]

The difference measured over the input amplifier can include quite some drift, that is in normal operation corrected be the auto zero mode. In addition the difference seems to be a more more linear function of the voltage - this would only lead to a gain factor slightly lower than 1, but no errors as the same gain factor would be used in calibration. Still the 11 µV difference looks rather high to me, as this would be an open look gain of only about 1 million - not more than some of the better OPs. Depending on where exactly the ADin test-point is, it might include some track resistance, as the ADC has a rather low input impedance.  I am still not that convinced that the amplifier is the problem.

The rundown phase seems to be rather long (around 2 ms) . With so many rundown slopes I had expected a faster rundown.

Aus the manual test to check the 10 V and 1 V gain ratio is rather close to the measurement done during the automatic calibration, my suspicion would go towards what is different:  The manual check is rather slow, reading 0 V and 1 V in the 1 V and 10 V ranges for quite some time each. The ACAL mode seems to repeat fast fast sequence with 0 and 1 V in both ranges.  So there is a slight chance that the slow part of DA might cause some errors in this case. To test this one would need the computer interface and look at something like signal steps, going from full scale (e.g. 10 V) to 0 V and record a few samples each.  It might need a few repeats and averaging to make the DA effect visible, especially during the 0 V reading after reading 10 V.

Unless there is a correction factor in software, I am afraid there is not much one can do about it. One might have to live with a certain correction factor for the 1 V range. However that factor might also be temperature dependent as DA gets faster with higher temperature.

[szszjdb]

Hi,  Mr. Kleinstein ,

Thanks a lot!

It can clearly viewed the drift when apply a voltage or just short the input port. It will take about 10s to settle down from 3uv to around 1 uv when shorting the input. And this zero number is almost the same in the 100mv-10v range.  When in calibrating, each step will take 200ms ,but it will repeat for at least 5-10 times .

I also check the front amplifier and find the U106(marked with TO72, from TI) with strange voltage, attached as below. I can not find such part number in TI's website. What is the part? OP?  The U107 looks good.

Best Regards,
szszjdb

[Kleinstein]

The time it takes to reach zero could be a hint towards the problem with the 10 V - 1 V step. Though with manual reading you might miss the very first readings.  Besides settling of the input amplifier it could be DA in the integrating cap of the ADC to cause such trouble. Have you done the test in AZ mode ?
The AZ mode could also contribute to settling time  - so a more stringent test would be repeated readings in non AZ mode, but this is difficult without PC connection.

My guess for U106 would be Tl072 instead of TO72.

[Mickle T.]

U106 TL072 opamps are part of current sources for Q102 and Q104 dual FETs input stages.

[szszjdb]

Hi,  Mr. Kleinstein and  Mr. Mickle.T ,
Thanks a lot!

I tested all in AZ mode as the drift will be stable. I will find a GPIB cable later.

By now, I had tried polypropylene(cbb) and polystyrene film capacitor together with the  COG ceramic capacitor. The best is the original one and the COG ceramic capacitor ,which have the 11-12uv  transfer error for 10v-1v .  I had also ordered the new SOSHIN cap and am waiting for it.

As the input MUX and the DC amplifier are in front of all ,so it is more easy to be damaged by surge voltage.  I am still in doubt for it. So,Mr. Mickle.T, would you please help to test the HI port to ADIN error? 

I had found another strange thing about the Q102(small one in the picture) in DC AMP , that there has voltage detected on the can of it,  but can't find with Q104.  Does the Q102 been potentially breakdown, as the substrates should be isolated with the can? I had checked the mark on the can and it is 0401 F00300, which can not find any information on the Google. What should be the substitute, also the 2n5912?
I had tried to draw the schematics for the DC AMP. but falled, as many track was inside the inner layer.  What is the DC bias check point for the AMP?

Best Regards,
szszjdb

[Mickle T.]

The error between the 10v and 1v input have reached 11uv, that is exactly the error when in 10v-1v transfer test.

These 11 uV isn't nonlinearity.
ADC input resistance is 20 kOhm. 10 V/20 kOhm = 0.5 mA. Copper trace length is about 50 mm. It's have a resistance about 0.025 Ohms. So, 0.5 mA * 0.025 Ohm = 12 uV.

[Kleinstein]

Some FETs have the case connected to the FET, sometimes even to the gate (e.g. 2N4392). It's possible to have a not so reliable connection to the substrate, but this does not matter, unless there is a lot of capacitive coupled signal. So I really don't think there is a problem with the amplifier.

My best guess is DA of the integrating cap causing a kind of after effect that upsets the gain adjustment procedure. Much of this could be a limitation of the instrument, but some of it might be from aging of the capacitor (e.g. humidity getting into the cap and causing more DA). With a fast sequence  (via the PC interface) one should be able to see this effect. Much of the effect of DA from the cap can be linear and more of a kind of settling problem. From the plans Mickle provided I would expect quite some DA effect in this meter, as the runup phase uses slow modulation and not extra compensation for the DC level. So even with a better capacitor settling will take some time and the 10 V / 1 V step will thus be systematically off -  just a little odd that there is no software correction for this.

The general nonlinearity could be due to the rundown resistors drifting a bit. With the computer interface one might be able to see this as peaks in the DNL error measured from a slow slope. However this would be a rather slow and difficult test !. The earlier error message might be an indication in this direction - it could got better now with the meter used a little more. Another contribution to nonlinearity is self heating of the resistors - the ADC uses a rather high input current and for this reason quite some self heating in the resistors. Aging could have effected the TC and thus INL due to self heating.

I think one has to accept that this meter is not that close to perfect and accuracy has it's limits.

[szszjdb]

Hi,  Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!

I had added a line on the back of the PCB to reduce the res. of the track , but seems no obviously improvement by checking the data.
Could you help to identify some of the part from DC amplifier ,like Q102,Q104,U103,U104,U105 ,U102 and U101. Which are for the pricision channel? I am still trying to drawing the schematic for reference. It's not like the one in 6871 or 3458.

About the transfer error and positive-negative check error , I am not expect more than the specification. Most of the 6581 might keep the spec. limit when first in using. But as your mentioned , the design are more sensitive to the component aging or changes by some surge events. Some of them are of still accuracy enough like Mickle's and some are bad like mine. What I  try hard for is to find out the most sensitive one and replace them with the new one.  But I know maybe I can't find out the solution even with your help ,because it is too complex or can't find the replacement parts like the MUX or the JFET in DC amp. The 6581 is still a reliable and easy-to-use tool when debug in the 8.5 digit world., despite the issue we found.   

I agree that the cap might be the sensitive one to aging. So I had tried the original SOSHIN cap together with the COG ceramic cap , which are the best two in my testing, and got some data as attached.The MAX error is around 10uv at 1v input of 10v range and nearly no big change with the original and the ceramic one.  It is very interesting that the 1v range perform much better than the 10v range, why?  I will try the new cap like the one using in 7480, which was producted recent years by SOSHIN, and report. 

For the rundown resistor , it is the ceramic film type and packaged in one chip. The temp. coefficient will be better except the truth-value. I had checked both the external and internal calibration, it seems no timing for the directly resistor calibration. Maybe they do it by the indirect way like the voltage calibration? It 's unlikely not to calibrate the res. as the aging of the resistor maybe 10-20ppm/year.

I remembered that Mickle have given me one picture before ,which are the measured zero voltage by the ADC in the diagnostic mode. You can see that the X10zero and x100zero of mine are much bigger than the others.  Are these the hint for debug?

Many thanks to your help these day!
Best Regards,
szszjdb

[Kleinstein]

The turn over error in the 10 V range looks like a problem with the zero or offset, as the errors gets much larger with the small voltages.  I am not sure how the zero is measured and used in the calculations. In principle there is a separate offset for the amplifier and the ADC itself. The ADC has a zero function, but this might no be perfect. If the same zero point is used for the 1 V and 10 V ranges this might explain some of the differences. Chances are that zero reading is handled better in the 1 V range as it is more important.

The resistors for rundown do not have to be so super accurate. It is only the ratio of the very first that should be relatively good, the smaller the current, the less important there contribution will become. So a few 10s of ppm drift would not be such a problem, though it could sum up over years.  I would normally expect some kind of measurement for the resistors, but so far there only seems to be a likely rather crude check to find gross errors. If the timing for the fastest part is relatively good, the smaller current will only provide a small fraction, especially in the 10 PLC and longer mode.  With something like a 0.2 µs timing resolution it would be only 10 ppm of the full range the next resistor would contribute at 1 PLC. So something like 0.1 % accuracy would be good enough to not cause something like missing codes at 8 digit resolution. The measured accuracy level might even allow for larger errors. For the even finer steps that are handled by the ceramic network they can even get away with 1 % resistors. The critical step would be between the two separate current sources.  From this point of view I can't understand the complicated correction mechanism for the 6581E - it is more like overkill to avoid a 0.1 % resistor.

It is likely possible to get a good measurement of the resistor ratio - however the ADC check as shown might no be good enough, as it does not include charge injection. However I have the feeling they preferred to use accurate resistors over extra math in the µC. This would not be my choice, but this is an old design (less software more HW) and there are quite a few odd points that I don't understand. So the more I learn about this meter, the less I like the design. However other meters have bad design decisions too, up to the point of .

Mickle showed a crude plan for the amplifier - that is not that much different from the 3458. However that plan still has an odd extra OP as a follower stage at the output, which would be a very bad decision.

[Mickle T.]

Photoset of my R6581T: https://drive.google.com/open?id=1gHMFwEq2IObkc5OwuliWz9lFPD9lBKo_
Some pics of R6581, R6581D, R6581T from www: https://drive.google.com/open?id=1XXnEh5WHusZWv0Yv-133bKSi6yV5aBa_

PCB Top (R6581, unknown?)


PCB Top (R6581T, Mickle)


PCB Bottom (R6581T, szszjdb)


Second part of Eiichi YADA patents, used in R6871E, R6581 and other top Advantest DMMs:  https://drive.google.com/open?id=1y4pMli3YrJwvg73Cwn8BWc5iabx4qC-8

[szszjdb]

Hi,  Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!

The turn over error is really a big issue which might leading to the bad INL performance. I had re-tested the INL in positive/negative input by the string resistor method and attached. It's clear that the negative INL is much better than the positive one.
 I have an idea that can  I cut the line between  DC amplifier and the A/D and direct input the voltage to check the  turn over error? Any risk?

I will test the new cap tomorrow and report.

I havn't found the schematics for the DC amplifier. It might take some time to draw it.
Does the Q102 for pricision channel and the Q104 for fast channel?

I don't know why I can't open the link post by Mickle.  Might be the network issue.

Many thanks and Best Regards,
szszjdb

[Mickle T.]

szszjdb, google drive is blocked by a firewall ?

I havn't found the schematics for the DC amplifier. It might take some time to draw it.

Have you looked in private messages? I sent you a link to PDF doc.

[TiN]

Are you guys going to give me welcome, as I just got myself R6581T too, today.
As usual, it is broken, no VFD display image, and no high voltage for it. Glass is ok, digital voltages look good, unit made circa 97, all clean and nice inside.
  Battery on my unit is gonesky.

I also start collecting all data on my server about these boxes. Mickle's archive from google drive mirrored already.

Is there reversed schematics anywhere?
I'll bring unit home tomorrow, and take lots of hi-res photos, as usual.

EEVBlog user ramon, who happen to live also in Taipei also have one R6581T, so I took photos of that unit and did brief test of too. His unit drifts ~1ppm/4 hours on 10VDC and 10ppm off (last calibration 10 years ago), but spot on resistance 1k-100k

[TiN]

Livestreamed my first playing with R6581T.

During 2 hour I've managed to:
* Check the VFD front panel and fixed dead fuse for HVAC supply to front panel. 
* Check inguard section power input supply. 
* Perform initial power on for meter, we got display and some ranges operating. 
* Calibration data was lost, with most of function as result inoperative. 
* Perform an external calibration versus Fluke 5700A 10V and secondary xDevs.com 10kOhm standard. 
* Checked all DC ranges function, ohm ranges function and DCI function. 
* All seems to be working good   

.

Calibration did not get lost on mains power cycle either, perhaps it is stored in non-voltatile ROM and not backed up by battery? That would be great, another item better than HP 3458A.

Next step would be replace dead RTC battery, put all shields and covers on unit, let it warm up for few days and then start comparison data vs my standards and reference meters.

[deadlylover]

Calibration did not get lost on mains power cycle either, perhaps it is stored in non-voltatile ROM and not backed up by battery? That would be great, another item better than HP 3458A.

It's only the internal cal that's stored in battery, hence the unit performs all funny when the battery runs out but it'll function fine until power cycle as long as you do an internal cal. (well that's how my unit behaved anyway when I got it)

Damn since you did an external cal I think the date string for the cal data got rewritten. =P

[TiN]

Ah, obvious, doh. Unit takes cal date from RTC reading .

I guess time to buy new battery, recalibrate unit properly, and then we good to do some long runs to see drift and tests-comparisons vs 2002s/3458s.
I quickly check linearity at 1V-10V points, it all looks pristine (<0.3ppm difference).

[TiN]

I have few questions, perhaps somebody can help to clarify.

* Is it correct that VFD high-voltage is AC, not the DC? This can be measured at the fuse F1 near front panel connector. I have about 41 VAC there. Instruments I've dealt with before from Keithley/HP/Datron use DC high-voltage to drive display segments and AC filament.
* Mickle.T. posted photos of his later unit circa 2006. What are those reworks with wires, modifications from factory or improvement mods? Should I modify my older unit accordingly too? 

Few photos of my unit (rest are on my site https://xdevs.com/fix/r6581t/ page).



LTZ board bodges. Trace to pin 4 of opamp is cut and solder-jumped to next trace. That might be an issue for tempco...



Somebody (ain't me, promise) had fun and forgot to clean flux



First time I see film SMT capacitors in equipment. 



Next step I will be taking LTZ1000 reference out and testing standalone for tempco and stability, while waiting for electrolytic capacitors to replace all on digital/PSU and one cap on analog boards. 

[Dr. Frank]

Illya,
that's again a nice teardown/repair thread.
But what are the oven set points for the LTZ1000 or LTZ1000A?
You mentioned, that it's running on lower temperature than 3458A, but the divider ratio is undisclosed, also the LTZ version.

Could you please provide this information, also?

Thanks - Frank

[cellularmitosis]

It looks like earlier in the thread (and in the 38hot thread), 13k / 1k was used.

[TiN]

Guess no more



Advantest REF looks like very practical (except the bodge). No overdoing where not required, and good resistors where it matters. Will be interesting to see it's tempco performance vs A9. The only thing that somewhat questionable is board-board connector.



And yes, it is non-A version. There are also few ICs under the REF module board on main analog board.



Ready for comparison:



Few more photos on article WIP..

[martinr33]

Just a little piece of trivia on this machine, but worth knowing.

It has a 1kV DC range. However, the inputs are only marked as 120V max. The 6581T has 300V max input, and the 6581 is 1kV.

And yes, I figured this out the hard way and now have a few 6581 spare parts...

(TiNs work here is sufficient therapy that I can now talk about this sad event).

[TiN]

Huh, why so?

And yes, I figured this out the hard way and now have a few 6581 spare parts...

More details please, what failed?

I can't see obvious difference on input relays, and both 6581 and 6581T have HV divider, HV resistors in series of same value. I did supply 1kVDC for some seconds during initial test, nothing blew up right away either. 

[martinr33]

I have a hard short between 5V and ground on the main analog/digital board.

I applied a low voltage source, and probed around ICs looking for the lowest differential voltage between + and ground.

I removed a couple of obvious parts (discolored or cracked).

I stopped when the short appeared to be in the ASIC.