Author Topic: Sniffing the Rigol's internal I2C bus  (Read 1837680 times)

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Offline alank2

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2075 on: December 23, 2013, 02:30:13 am »
Does anyone remember from the teardown how much SDRAM is present?  64M or 128M?
 

Offline marmad

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2076 on: December 23, 2013, 03:25:25 am »
Does anyone remember from the teardown how much SDRAM is present?  64M or 128M?

 

Offline alank2

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2077 on: December 23, 2013, 04:22:40 am »
Thanks marmad, do you know if the teardown is consistent with this information, sometimes their documentation doesn't match up.
 

Offline JLM

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2078 on: December 23, 2013, 05:45:03 am »
Is it really a 300 mHz scope?  My former 2072 tells me it has been transformed into a 2302, but I am wondering if anyone has tested the machine to see if it really performs as a 300 MHz scope?  I find it hard to believe that firmware/software alone can turn an $800 device into one costing nearly triple.
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Offline mtdoc

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2079 on: December 23, 2013, 05:52:27 am »
Um, read the last few weeks of this thread......

The short answer is yes.
 

Offline staze

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2080 on: December 23, 2013, 05:53:22 am »
Yes, I has been tested. Yes, they're 300Mhz (if only barely (like, 315Mhz)). Check a few pages back. :)
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Offline A Hellene

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2081 on: December 23, 2013, 06:24:23 am »
Quote
I find it hard to believe that firmware/software alone can turn an $800 device into one costing nearly triple.
Well, it is a marketing trick, euphemistically called 'scalability' where by changing the product key only, we can have multiple levels of functionality (and cost, of course) from the same product, like the Windows 7 Ultimate/Enterprise/Professional/Home/Starter installations. But, this is more like designing a 6-core i7 CPU and selling the bad i7 chips (with a defective core, for example) as 4-core i7 CPUs after disabling two cores, or as proud 2-core i3 CPUs the even more crippled ones instead of recycling the bad dies...

For example, we design a 300 MHz device using cheap components (to maximise our profits) and by testing each one of these the best performers are labeled 300 MHz units, while the ones that perform up to 200 MHz are labeled 200 MHz units, and so on. Read this message to understand how it works.


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(This was one of my latest realisations, now in my early fifties!...)
 

Offline staze

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2082 on: December 23, 2013, 06:44:28 am »
Indeed. Or, you can design to 300Mhz, skip that testing and assume that most users won't hack their devices, and still turn a profit quite easily. The BOM for the 2072 still turns a profit, even more so if people buy the higher versions, or options. Like you say, much like Windows, or Office versions. Heck, AMD and Intel have done this too with chips... Remember the "jumpers" on the CPU substrate? Overclocking was so easy back then. Or just disabling a core or two via software. :/

Given the tests most have done so far, it seems like Rigol are probably skipping that assessment. Just QA, serialize, label, ship. This is much cheaper than doing assessment, and you still turn a profit. The front end filters would seem to indicate that. But, unless someone has a 2072 hacked AND a "real" 2302/2202, it seems unlikely we'll be able to confirm either. :/
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Offline JDubU

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2083 on: December 23, 2013, 07:09:17 am »
Another well known example was the multi-million dollar General Electric 600 series mainframe computers in the 1960's.  There were different models, with a significant spread in performance and cost.  The only difference between three of the models was the position of some wire wrapped jumpers on the backplane.

http://en.wikipedia.org/wiki/GE-600_series

"... The 600 line consisted of six models: the 605, 615, 625, 635, 645, and 655.
The 615 was a 635 with Control Unit (CU) and Operations Unit (OU) overlap disabled, and a 36 bit wide memory path. The 625 was a 635 with Control Unit and Operations Unit overlap disabled and 72 bit wide memory path. The 635 had a 72-bit wide memory path and CU/OU overlap enabled. The difference between these models was less than 10 wires on the backplane. Field service could convert a 615 to a 635 or 625 or vice versa in a couple of hours if necessary;other than those few wires, the 615, 625 and 635 were identical. The 605 was used in some realtime/military applications, and was essentially a 615 without the floating point hardware. Programs coded for a 605 would run without any modification on any other 600 line processor"
 

Offline apelly

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2084 on: December 23, 2013, 07:53:08 am »
Someone can take a better picture of the DS2xxxA's input stage?    Apelly for example.
Busy, but I'll take a look in the next 48 hrs.
Ok, perfect, if you can take pictures of the rest, jumpers, DC / DC ...
Thanks.  :-+
No susprises.

These will have to do for now... The 'scpoe's still open, so can take more, but even a linux buff like me needed to look up a quick way to resize pics.

Just let me know what you want to see.
 

Offline fcab100

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2085 on: December 23, 2013, 08:45:51 am »
Someone can take a better picture of the DS2xxxA's input stage?    Apelly for example.
Busy, but I'll take a look in the next 48 hrs.
Ok, perfect, if you can take pictures of the rest, jumpers, DC / DC ...
Thanks.  :-+
No susprises.

These will have to do for now... The 'scpoe's still open, so can take more, but even a linux buff like me needed to look up a quick way to resize pics.

Just let me know what you want to see.


Can you take pics of the jumper resistor divider just by the battery. Thanks
 

Offline EV

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2086 on: December 23, 2013, 09:12:40 am »
The scope I used in the test was originally 200 MHz scope DS2202.

Quote
I find it hard to believe that firmware/software alone can turn an $800 device into one costing nearly triple.
Well, it is a marketing trick, euphemistically called 'scalability' where by changing the product key only, we can have multiple levels of functionality (and cost, of course) from the same product, like the Windows 7 Ultimate/Enterprise/Professional/Home/Starter installations. But, this is more like designing a 6-core i7 CPU and selling the bad i7 chips (with a defective core, for example) as 4-core i7 CPUs after disabling two cores, or as proud 2-core i3 CPUs the even more crippled ones instead of recycling the bad dies...

For example, we design a 300 MHz device using cheap components (to maximise our profits) and by testing each one of these the best performers are labeled 300 MHz units, while the ones that perform up to 200 MHz are labeled 200 MHz units, and so on. Read this message to understand how it works.


-George
 

Offline A Hellene

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2087 on: December 23, 2013, 09:37:37 am »
The scope I used in the test was originally 200 MHz scope DS2202.
No doubt about that! I believe that most of the 72 MHz units must be able to display decently any 250-300 MHz signals.

What I said before is that, in order to minimise the development/manufacturing costs, the manufacturer designed one only device and sells it in three or four bandwidth levels. Of course, I am sure that the top-notch 300 MHz models are being tested thoroughly before they get labeled as such; all the rest of devices at the assembly line are being branded depending on the market demands of the time they hit the market. This way, a 72 MHz device can perform decently at higher bandwidths (if hacked, of course).

BUT: At the link in my previous message, the member Alex33 measured a bandwidth of 90 MHz on a 50 MHz device, a DS1052: That would be no problem for a device sold as a 50 MHz bandwidth one; but that limited bandwidth of 90 MHz of that specific device would restrict that very device to be sold as a DS1102 or a DS1152 of 100 or 150 MHz, respectively.


-George
Hi! This is George; and I am three and a half years old!
(This was one of my latest realisations, now in my early fifties!...)
 

Offline elecBlu

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2088 on: December 23, 2013, 11:02:23 am »
DS2000 input stage is specified for that 300MHz BW, so there should be no "selection" at all for any Scope Model/BW. The other hardware (ADC) remains at the same specification for all models.
 

Offline Pehtoori

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2089 on: December 23, 2013, 12:03:12 pm »
DS2000 input stage is specified for that 300MHz BW, so there should be no "selection" at all for any Scope Model/BW. The other hardware (ADC) remains at the same specification for all models.

Yes for components and design, but will all DS2072 work as DS2302? There is no guarantee as they might not be tested for 300MHz. What I see "A Hellene" is trying to say. There might be defective soldering, PCB or component and Rigol has noticed this in testing and labelled device as DS2072 if it meets DS2072 specifications.

I'm or "A Hellene" is not saying, that this is the case, but its clearly possibility.

(Note this is only my interpretation of A Hellene, not what she/he says)
 

Offline NikWing

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2090 on: December 23, 2013, 12:12:53 pm »
btw, what's the current state of A-model reversing? ^^
 

Offline Pehtoori

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2091 on: December 23, 2013, 12:36:24 pm »
btw, what's the current state of A-model reversing? ^^

Waiting for JTAG dump...
 

Offline NikWing

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2092 on: December 23, 2013, 12:58:17 pm »
so barnacle2k disappeared? ^^;
 

Offline marmad

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2093 on: December 23, 2013, 01:03:45 pm »
What I said before is that, in order to minimise the development/manufacturing costs, the manufacturer designed one only device and sells it in three or four bandwidth levels. Of course, I am sure that the top-notch 300 MHz models are being tested thoroughly before they get labeled as such; all the rest of devices at the assembly line are being branded depending on the market demands of the time they hit the market. This way, a 72 MHz device can perform decently at higher bandwidths (if hacked, of course).

BUT: At the link in my previous message, the member Alex33 measured a bandwidth of 90 MHz on a 50 MHz device, a DS1052: That would be no problem for a device sold as a 50 MHz bandwidth one; but that limited bandwidth of 90 MHz of that specific device would restrict that very device to be sold as a DS1102 or a DS1152 of 100 or 150 MHz, respectively.
Yes for components and design, but will all DS2072 work as DS2302? There is no guarantee as they might not be tested for 300MHz. What I see "A Hellene" is trying to say. There might be defective soldering, PCB or component and Rigol has noticed this in testing and labelled device as DS2072 if it meets DS2072 specifications.

I'm or "A Hellene" is not saying, that this is the case, but its clearly possibility.
@George & Pehtoori : But you can't compare the DS2000 series with the old DS1000 series. With the DS2000 series, Rigol has ALWAYS had the intention of selling software bandwidth upgrades for the models. This is evidenced by the fact that Drieg (a Rigol dealer) mentioned that Rigol was planning to do this back in October of 2012, and also by the fact that with the FW release 01.00.00.03 (IIRC), the software bandwidth upgrades were functionally operative. As we all know, labor is cheap in China - so with their original intentions plus cheap labor, I can't imagine that all of the DSOs in the series don't go through the exact same testing procedures/standards.

Now why Rigol hasn't actually started selling the bandwidth upgrades is another, perhaps more interesting, question. I suspect it has to do with the relative lack of competition at the DS2000's price point - although perhaps this will change with the full-scale release of the Siglent SDS2000 series in the near future.
« Last Edit: December 23, 2013, 01:42:05 pm by marmad »
 

Offline JLM

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2094 on: December 23, 2013, 01:32:59 pm »
After upgrade, my options list shows both "200 MHz bandwidth" and "300 mhz bandwidth".  Is that normal?  Can I and should I delete the 200, and if so, how?
"To err is human, to blame it on someone else even more human"
 

Offline Carrington

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2095 on: December 23, 2013, 03:57:21 pm »
After upgrade, my options list shows both "200 MHz bandwidth" and "300 mhz bandwidth".  Is that normal?  Can I and should I delete the 200, and if so, how?
In my case the same, I do not know if this can be a problem.
My English can be pretty bad, so suggestions are welcome. ;)
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Offline alank2

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2096 on: December 23, 2013, 03:58:50 pm »
After upgrade, my options list shows both "200 MHz bandwidth" and "300 mhz bandwidth".  Is that normal?  Can I and should I delete the 200, and if so, how?

Did you use DSGH ?  That should have 300/can/trig/decod/56m
 

Offline alank2

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2097 on: December 23, 2013, 03:59:48 pm »
One of the memory registers does confirm 32M of SDRAM for program memory (0x00000000 - 0x01ffffff).

The blackfin also has 4 async memory areas mapped at: 0x20000000-0x200fffff, 0x20100000-0x201fffff, 0x20200000-0x202fffff, 0x20300000-0x203fffff.  I can see some memory pointers pointing to 0x201exxxx, 0x2020xxxx, 0x2024xxxx.

Each of these is only a 1M range.  How are these async memory areas normally used?  When more than 1M is available it is banked somehow?  I don't see any banking capability in the blackfin for this unless I am missing something.

Could the aquire memory (ddr2) also be accessed via this async memory?
 

Offline Carrington

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2098 on: December 23, 2013, 04:13:31 pm »
These will have to do for now... The 'scpoe's still open, so can take more, but even a linux buff like me needed to look up a quick way to resize pics.
Just let me know what you want to see.
Thank you so much, the parts in which I am interested are these:

https://www.eevblog.com/forum/testgear/rigol-ds2000-hardware-version-2-0/msg270218/#msg270218
https://www.eevblog.com/forum/testgear/rigol-ds2000-hardware-version-2-0/msg272842/#msg272842

Cheers.
My English can be pretty bad, so suggestions are welcome. ;)
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Offline m-joy

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Re: Sniffing the Rigol's internal I2C bus
« Reply #2099 on: December 23, 2013, 05:48:07 pm »


Did you use DSGH ?  That should have 300/can/trig/decod/56m
[/quote]

I thought DSHH should be used...?
 


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