Okay, progress update. The D0 high bug is fixed. The SBC still isn't talking to my laptop though, which was the original issue that caused me to create the bus display (which introduced the D0 high bug!)
I've now taken a look at the 8MHz clock through my old oscilloscope (I say old because I got it cheap off eBay and it's limited in features and probably had a million previous owners and is a little tatty, dodgy and uncalibrated as a result.)
Here's a pic of the oscilloscope trace from the 8MHz clock output:
image hosting 30 mbThat was taken with the following settings: volts/div: 5, time/div: .2u(micro) seconds.
Now, I know next to nothing about oscilloscopes as well as electronics, but it seems to me that the voltage on the clock output could be a little high (although that could be a calibration issue? Trace shows good and accurate on the oscilloscope's built-in calibration connection though) and, most obviously, the signal isn't very clean (is that wave deformation at the leading edge of the on-pulse called 'overshoot'?) Also, from some basic mental arithmetic looking at the signal trace and timebase, it looks like it's running at a frequency around 11MHz, when it should be 7.328MHz (or thereabouts). Now, that was hardly a scientific analysis from an uncalibrated oscilloscope, it's a ballpark figure, but does seem to be too high. Is that right?
The clock is set up exactly as per the schematic in Grant Searle's design
http://searle.hostei.com/grant/z80/Z80SbcSchematic1.2.gif. I don't know if the signal is picking up noise on the leads I'm using (they're just BNC connectors, some wire and crocodile clips on the end - like I said, I'm not a professional!) or if the clock circuit just isn't producing a clean signal.
So, two questions arise: -
1) Is the clock signal causing problems that would cause the Z80 SBC not to work properly?
2) How could I improve the clock circuit to remove these errors when it's set up as per the instructions?
3) (Bonus question, or I can't count..) Where else should I start looking for issues if the clock is passable, yet I'm still getting nothing at the terminal on my laptop?
As always, thanks for any help/suggestions or just passing the time of day with a scatty and slightly inept hobbyist!
EDIT: Actually, thinking about it, that waveform deformation is almost certainly interference or impedance in the oscilloscope wires I'm using, I'd guess? The waveform goes through two inverters before going out to the CLK bus line, so it
should be a square waveform, right?