Voltage control circuit for lab power supply. Which topology?

[tbj]

Hi all.

I'm currently designing a lab power supply.

Specs are: 0-15v 4A; 0-30V 2A

I'm having some trouble settling on a topology for the voltage control circuitry. This will be discrete (op amp driving a pass transistor). My research has led me to three possible ways to do this, each with their own advantages and disadvantages.

This is the first one - the op amp drives the pass transistor directly in an emitter follower configuration.



Problems:

- The no-load voltage of the main transformer when filtered and rectified may be as high as 36 volts. This is higher than the maximum voltage of most op amps, even without considering the need for a negative rail to allow the op amp outputs to go to 0v.
- The op amp needs to output a voltage equal to the desired output voltage of the supply plus the collector-emitter drop of the pass transistor. Even if the maximum supply voltage of the op amp is not exceeded, it is considered bad practice to drive op amp outputs too close to the supply rails, right?

Second idea: resistor R3 biases the base of the pass transistor 'on'. Transistor Q3 pulls the base voltage down to the required level to obtain the desired voltage at the emitter of the pass transistor.



Advantages:

- The op amp can be powered from a lower voltage because Q3 is responsible for setting the voltage at the pass transistor base. This solves both problems in the previous design.

Problems:

- Power is wasted in the bias resistor at low output voltage settings
- I had trouble getting the circuit to work properly when prototyped - the transistor could not pull the voltage down at the pass transistor low enough at low settings - not sure why?

Third idea - this seems the best to me. Q4 is switched on by Q3, setting the voltage at the transistor base.




Advantages:

- Q4 will pass enough current to ensure the voltage can remain in regulation regardless of load on the pass transistor.

Disadvantages:

- This circuit oscillated terribly at about 1khz when prototyped - no idea why!


Can someone suggest the best method to go with here? I'm stuck!

Cheers, and sorry for the n00b questions.

[Thor-Arne]

I expect it oscillates because the feedback loop needs to be slowed down.

You might try a resistor and a capacitor in series between the negative input and the output of the op-amp, values I've used is 47k and 10nF.
These values vary deepening on the parts used.

Hope that helps.

And please post the part values used in the prototype.

[codeboy2k]

Yes, you need to slow down the loop, as said.

Read these two messages I posted previously on this topic:
https://www.eevblog.com/forum/beginners/attempt-at-a-fixed-psu/msg687475/#msg687475
https://www.eevblog.com/forum/beginners/please-critique-my-digital-power-supply-design/msg636101/#msg636101

[TimFox]

Idea 2:  adding the NPN inverts the gain, so you need to exchange the - and + op-amp inputs for negative feedback.
All ideas:  you need to add frequency-compensation networks for stable operation.  See the usual textbooks.