I am looking for someone that could help finish to design a prototype of a board based on some tests I have been working on.
The prototype should maximise the potential of the capacitive sensing capabilities of Cypress’s PSoC architecture to use as many input pins as possible. Overall complexity shouldn’t be too big.
Ideally but not necessary the schematics and board layout would be done using KiCad.
Key elements:
Cypress PSOC Architecture, main focus on CapSense
RS485 Communication
Voltage Regulator
Please PM me for more details.