EEVblog Electronics Community Forum
Electronics => PCB/EDA/CAD => KiCad => Topic started by: Sal Ammoniac on September 15, 2020, 06:10:55 pm
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Anyone aware of a KiCad tutorial for laying out a PCB for BGAs? I'm starting a project using an MCU in 100-pin BGA (0.8mm) package on a four layer board. I've found some info online that discusses fanning out BGA pins, but almost nothing related to best practices for power/ground and bypass caps.
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App note from STM32. Maybe it helps.
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App note from STM32. Maybe it helps.
It helps a little. Figure 22 shows bypass caps on the back of the PCB, but the image is so fuzzy it's hard to tell exactly how the caps are connected.
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Many semiconductor suppliers have instructions for this.
Search for "BGA escape routing".
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As far as I know KiCad has no special features for breaking out BGA's.
Tutorials on how to do this do not need to be KiCad specific.
A tip I once heard was to start with the center of the BGA. If you do the outer ball rows first, here is no room left to do the breakout of the center.
I don't know if a 100 pin BGA can be done on a four layer board without sacrificing too much of the power planes. I don't have the experience to advise on that, except the obvious: Too many layers makes the board more expensive. Too few layers and you won't get it routed.
Perhaps such questions are better asked in the general eda forum:
https://www.eevblog.com/forum/eda/ (https://www.eevblog.com/forum/eda/)
There are links to other projects made with KiCad on KiCad's website. Studying some of those boards may help you.
https://kicad-pcb.org/made-with-kicad/ (https://kicad-pcb.org/made-with-kicad/)
For example, the Olinuxino A64 is a complete KiCad project with an Alwinner A64, DDR ram and such, which you can clone from github to study how they did it.
Decoupling cap placement for BGA's is no different from other chip packages. Using short wires and 100nF caps are generally enough for low to medium speed logic (upto 50MHz or so) For higher speed logic you need to use different sized capacitors to get a low impedance over a wide frequency range.
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Decoupling cap placement for BGA's is no different from other chip packages.
Isn't it? Aren't decoupling caps for BGAs typically put on the back of the board? That's different from what I've always done for LQFP packages, which is to put the caps on the same side of the board as the IC itself.
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Decoupling cap placement for BGA's is no different from other chip packages.
Isn't it? Aren't decoupling caps for BGAs typically put on the back of the board? That's different from what I've always done for LQFP packages, which is to put the caps on the same side of the board as the IC itself.
Its not a requirement unless you're up at GHz speeds , but may be convenient if its a dense board with components both sides anyway. Otherwise its just another manufacturing step that will increase costs. I've done a couple of ice40 designs where the caps were same side close beside the bga package.
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If you have good power planes it is perfectly fine to put the decoupling on the same side as the BGA, directly connected to the planes. But it doesn't make breaking out any easier.