Let me try and follow here. In my case I have:
5V --> 10K --> RESET --> 100nF --> GND
|
ISP RESET PIN
In normal operation the 5V will charge the capacitor so there is 5V across it, 0 across the resistor, 0 current?
When the ISP programmer pulls the RESET to ground, assuming it has no resistor, then 5V will drop across the resistor wasting about 5uA. The capacitor will discharge into the ISPs ground. If it doesn't have a resistor on that pull down then it will take a flash pulse of current from the 100nF but finish up with the RESET pin at ground potential. The 100nF will have 0V on both sides an stay discharged.
When the ISP releases the RESET pull down then 5V will pass through the 10K resistor, charging the 100nF cap back up until again we have 5V at RESET, 0V across the resistor and 5V across the capacitor.
... or I'm missing something here.
Let me try and follow here. In my case I have:
5V --> 10K --> RESET --> 100nF --> GND
|
ISP RESET PIN
In normal operation the 5V will charge the capacitor so there is 5V across it, 0 across the resistor, 0 current?
When the ISP programmer pulls the RESET to ground, assuming it has no resistor, then 5V will drop across the resistor wasting about 5uA. The capacitor will discharge into the ISPs ground. If it doesn't have a resistor on that pull down then it will take a flash pulse of current from the 100nF but finish up with the RESET pin at ground potential. The 100nF will have 0V on both sides an stay discharged.
Your analysis is perfect, except you're kinda dismissing the importance of that "flash pulse of current" that you mention. Yes, the reset line will eventually finish at the ground potential, but how long does that take? If the ISP programmer thinks that it's pulled the RESET line low for x microseconds, but the RC filter formed by the output impedance of the ISP programmer and the capacitor values has a time period of 2x microseconds, then the ATMega328P will completely fail to be reset successfully. Different ISP programmers and various clones might have different output impedances and reset line pulse widths too, which means that a poor choice of capacitor value could result in inexplicable, intermittent operation and a lot of tears.
Put another way; if you placed a 1 Farad capacitor on the reset line, I'd wager that most ISP programmers would fail. The difficult question is, how small do you have to make the capacitance before it becomes reliable? Is it easier/better to just use a lower resistance resistor?