The bigest problem in getting Eagle to KiCad conversion to be as simple as possible, came down to two problems.
wire's (sch) don't retain net informative, (IE you move the net label away from the wire, and the wire no longer belongs to that net) where as Eagle it dose.
and in pcb has the same proble.. track's and via's don't retain netinformation if there are not connected to a pad.
That's a reasonably common problem. Quite a few CAD packages started life as "polyline editors" with back-end processing...
I ask KiCad develpers about this, and they was no intrest in fixing it, as it was a lot of work, and there intrest's remain in other place's.. which is ok, arfter all there giving there time
free why should they care about importing Eagle design's or other PCB package.
If you look at my nasty nasty hack to get around those 2 problems (and it's really nasty) it works.
But you would still be up for that same nasty hack if you wrote a import plugin for Eagle.
And given how nasty the hack is I very much doubt if the KiCad people would allow it into there code base.
I can see it is non-trivial to change the database, but you can use infrastructure that exists now, to help here.
ie in your case, if Eagle can create a NETIST, and you want to check the quality of the KiCad SCH, get kiCad to create a NETLIST too, and then compare connected-sets.
This simple process of NETLIST Handover, lets users confirm & find subtle issues like line-overlap.
KiCad (& many others) also has a simple graphical tag for connected or not connected (small circle on terminal)
Once you have NETIST sign-off, you have a reference design in kiCad, and can modify/change from there.
I can see the appeal of a Converter that is not locked to Eagle, as that opens up pathways from many other CAD packages.
Python seems a natural, as that comes with kiCad?
I think a example will show up the problem,
The unconnected track problem: In Eagle unconnected tracks retain net information, which is good, as when you have flood fill's the unconnected tracks get merged correctly with the unconnected track, if there are the same net.
while in KiCad this is not the case, now on a simple board with no food fill's.. no problems, but take a complex board, with many layers, and many flood fill's your in for a really bad time fixing up all the unconnected tracks.
The only way I handled this was to report all unconnected tracks on 2 eagle layers, as there is no way to add tracks/via's using python or C++.. etc
So unconnected tracks are not fixable in any way you can trust by programing. Where if the change KiCad to retain net info on tracks the hole night mare vanishes
Doing the conversion in a eagle ULP as I do, or python or C++ on KiCad make's no diffidence. you still hit the same brick wall.
That's why you can't trust the conversion script with unconnected tracks or unconnected Via's (thou I have a nasty hack which converts via's to pad, but it only works in none blind via's, and it has to change the sch file to keep consistent net list from sch to pcb )
So at the end of the day, why go to all the trouble for no gain, excepted to use KiCad only and not eagle, which also has the downside you can't convert any pre 6 version's of eagle sch/pcb/libs ? So you still need Eagle in those case's
Sorry, but I can't see it's worth the effort, It would be much better use of my time fixing the root problem in KiCad, but as I said, I don't think it would be accepted, form the feed back I have received.
Lachlan