How to understand Net class and various labels?

[max.wwwang]

Another question from a new user and someone who's not familiar with the jargons in EDA ---

How to understand Net class and various labels: net label, class directive label, global label, and hierarchical label?

I quickly went through the documentation. Apparently, it's not written for people who are new to EDA. I don't even know what "net" is. Or is it "NET" as an acronym of something? Is it simply a (fishing) net or a network? So I need to start from here.

Appreciate any explanations with plain language.

[Psi]

a Net just means an electrical connection of something, like wires or pcb tracks that connects one or more components together.
If you had a battery and a lamp you would have 2 nets. If you add a switch you'd have 3 nets.
If you add a 2nd lamp in parallel with the current lamp the number of nets does not change.

Net class
A group for storing a list of nets. You can place lots of nets into a 'net class' that you created and then apply design rules on the net class. This makes it easier as you can simply add/remove nets to that group as needed, instead of making a design rule for each net. Which is annoying if the net name changes.

Net Label
Just a name you give to a net to make it easer on yourself. eg, Instead of the automatically generate net NetQ10_3 you put a net label on that net in the schematic and call it Piezo+ (assuming its to do with the piezo etc..)

I'll let others do class directive label, global label, and hierarchical label.
I don't know much about kicad and it might use those differently.

[Psi]

I asked chatGPT for an explanation as i was curious what i'd get.

[max.wwwang]

a Net just means an electrical connection of something, like wires or pcb tracks that connects one or more components together.
If you had a battery and a lamp you would have 2 nets. If you add a switch you'd have 3 nets.
If you add a 2nd lamp in parallel with the current lamp the number of nets does not change.

Net class
A group for storing a list of nets. You can place lots of nets into a 'net class' that you created and then apply design rules on the net class. This makes it easier as you can simply add/remove nets to that group as needed, instead of making a design rule for each net. Which is annoying if the net name changes.

Net Label
Just a name you give to a net to make it easer on yourself. eg, Instead of the automatically generate net NetQ10_3 you put a net label on that net in the schematic and call it Piezo+ (assuming its to do with the piezo etc..)

I'll let others do class directive label, global label, and hierarchical label.
I don't know much about kicad and it might use those differently.

That's great. Thanks.

At least net is crystal clear to me know. It's basically a wire in the topological sense (or in the sense of electrical connectivity). I need to look into "design rule" to be able to fully understand Net class and its purposes.

[Psi]

Another thing to know is a 'net tie'.  Which basically means something that ties/connects two nets together.
This would seem pointless at first, but it's needed when you have the paradox of something that is all electrically connected together but you want to 'treat' it like more than 1 net for convenience and PCB routing.  Like analog and digital ground.

So you have a net for DGND and a net for AGND. Then at one point in your schematic and in your PCB there is a "net tie" to link them together. If you didnt use a net tie and tried to connect them together yourself then the software would throw an error saying you have a short circuit between two nets.

[Doctorandus_P]

Design rules, are things like "Track width is 0.3mm", or "Clearance between tracks is 0.25mm". And a "Net Class" binds a few of those basic rules together. This is not unique to KiCad, but probably all EDA suites use very similar system and names.

So, on a digital design, you make for example a netclass for "signal wires". It's all the nets that need thin PCB tracks and a small clearance, so you do not use up too much PCB real estate area. Then you put all the nets which do not need a lot of current into that net class.

You probably want to make a second net class for power. Something like track width of 1.5mm and the same low clearance, because voltage is low. And you put all power supply nets in it.

If you have a PCB with a high voltage, then you probably want to make a special net class for that, with a much wider clearance that is applicable to the voltage you use.

Sometimes these things are a bit contradictory, and then you can use a net tie. A good example for using a net tie is for a shunt resistor in a power supply or current source. The "main" wires going to the shunt resistor can carry a high current, so you put those nets in a net class with wide tracks. But no matter how wide those tracks are, they will always have some resistance, and therefore a voltage drop over that resistance (as long as current is flowing). So for measuring the voltage over the shunt resistor, you want wires directly from the shunt resistor to the ADC. These wires carry very little current, and they do not need to be wide. But the sense wires are still the same nets as the power tracks. If you now use a net tie, you can separate the wide high current tracks from the thin feedback lines. And you put these net ties very close to the pads of the shunt resistor on the PCB.

Netclass Directive Labels are new in KiCad V7. Unlike the other label types, they do not give a name to a net, but they tell in which netclass a net is. This is especially useful for nets that do not have a label by themselves.

[max.wwwang]

Another thing to know is a 'net tie'.  Which basically means something that ties/connects two nets together.
This would seem pointless at first, but it's needed when you have the paradox of something that is all electrically connected together but you want to 'treat' it like more than 1 net for convenience and PCB routing.  Like analog and digital ground.

So you have a net for DGND and a net for AGND. Then at one point in your schematic and in your PCB there is a "net tie" to link them together. If you didnt use a net tie and tried to connect them together yourself then the software would throw an error saying you have a short circuit between two nets.

This is a beautiful explanation of the concept/term of "net tie". So to me now, nets "tied" by a net tie are, by themselves, one net (electrically), but only treated as two 'logical' nets for other reasons (mostly related to design rules such as separation of digital/analogue and/or PCB trace width, etc.).

Huge thanks!

[max.wwwang]

Design rules, are things like "Track width is 0.3mm", or "Clearance between tracks is 0.25mm". And a "Net Class" binds a few of those basic rules together. This is not unique to KiCad, but probably all EDA suites use very similar system and names.

So, on a digital design, you make for example a netclass for "signal wires". It's all the nets that need thin PCB tracks and a small clearance, so you do not use up too much PCB real estate area. Then you put all the nets which do not need a lot of current into that net class.

You probably want to make a second net class for power. Something like track width of 1.5mm and the same low clearance, because voltage is low. And you put all power supply nets in it.

If you have a PCB with a high voltage, then you probably want to make a special net class for that, with a much wider clearance that is applicable to the voltage you use.

Thanks. These are good examples of design rules. I will do my homework to understand more, and more generally.

Sometimes these things are a bit contradictory, and then you can use a net tie. A good example for using a net tie is for a shunt resistor in a power supply or current source. The "main" wires going to the shunt resistor can carry a high current, so you put those nets in a net class with wide tracks. But no matter how wide those tracks are, they will always have some resistance, and therefore a voltage drop over that resistance (as long as current is flowing). So for measuring the voltage over the shunt resistor, you want wires directly from the shunt resistor to the ADC. These wires carry very little current, and they do not need to be wide. But the sense wires are still the same nets as the power tracks. If you now use a net tie, you can separate the wide high current tracks from the thin feedback lines. And you put these net ties very close to the pads of the shunt resistor on the PCB.

This is a very good example of "net tie"!

Netclass Directive Labels are new in KiCad V7. Unlike the other label types, they do not give a name to a net, but they tell in which netclass a net is. This is especially useful for nets that do not have a label by themselves.

Ok. So, given it's "directive", and what it is for as you explained, I can understand it as a means of assigning net class to a net without having to give it a label.

All very helpful!!!

[Benta]

As it seems you're starting out here, I wouldn't try to absorb all this at once, but start by using the things you'll need for every schematic/PCB.
1: nets = connecting lines between part pins on your schematic.
2: net labels = names you can add to your nets to describe them (eg, as explanation of what the net does). If your schematic is well drawn, you have limited use for these, but they're helpful when doing PCB layout. It's a tradeoff between clutter and useful information.
3: global labels = special graphic symbols used for getting signals into and out of a schematic sheet *)
4: hierachical labels = special graphic symbols for connecting to a hierachical sheet. Conceptually (this is my personal approach) you can think of a hierachical sheet as a "home-built IC". The hierachical labels are the "IC" pins.

This is good for a first start.

Next up is power flags and buses (with labelling!).

*) there are people who use global labels inside a schematic instead of connections, I don't know why. It's a horrible practice and corrupting the idea of global labels, resulting in incomprehensible schematics. I recommend you don't go that way.

Have fun, KiCAD 6 is great, I haven't tried 7 yet.

[max.wwwang]

As it seems you're starting out here, I wouldn't try to absorb all this at once, but start by using the things you'll need for every schematic/PCB.

Indeed it seems too heavy a dose for one go. 

1: nets = connecting lines between part pins on your schematic.
2: net labels = names you can add to your nets to describe them (eg, as explanation of what the net does). If your schematic is well drawn, you have limited use for these, but they're helpful when doing PCB layout. It's a tradeoff between clutter and useful information.

That's very true. I quickly realised the same thing even after a very short time of playing with it.

3: global labels = special graphic symbols used for getting signals into and out of a schematic sheet *)

Not quite get this yet. Does this mean they are only a 'formal' or presentation thing without any (or with only little) electrical/logical meaning?

[Edit]
after reading this, I now know global label is not a representational or visual means. To define it in an incremental way (i.e. basing it on other simpler defined terms) global labels are net labels that are global, i.e. across all the sheets. They are, first and foremost, net labels --- "global label" is only the short form of "global net label".

4: hierachical labels = special graphic symbols for connecting to a hierachical sheet. Conceptually (this is my personal approach) you can think of a hierachical sheet as a "home-built IC". The hierachical labels are the "IC" pins.

This is a very nice analogy. I can quickly get this.

This is good for a first start.

Next up is power flags and buses (with labelling!).

*) there are people who use global labels inside a schematic instead of connections, I don't know why. It's a horrible practice and corrupting the idea of global labels, resulting in incomprehensible schematics. I recommend you don't go that way.

Have fun, KiCAD 6 is great, I haven't tried 7 yet.

Thanks. Leave these for the next dose! 

[SiliconWizard]

How do you "tie" nets with different labels in KiCad so that it avoids warnings? Is it a new feature in v7?

In v6, it will give you a warning. Which can be pretty annoying  - sometimes I have nets with several labels for good reasons. But I don't want to disable this warning altogether, as it is useful.
You can always tag each warning as an exception - except that in v6 (last 6.0.11), those warnings tend to creep back even after you tagged them as exceptions, if you make changes in connections in your schematic. Pretty annoying.

[max.wwwang]

How do you "tie" nets with different labels in KiCad so that it avoids warnings? Is it a new feature in v7?

I don't know if it's a new feature of V7.0 as I only started from this version without any experience with earlier versions.

I only figured this out (how to do it) --- fairly easily --- just a minute ago by watching a short video. It's done by placing a 'component' (or symbol) that is a "net tie", which may have different number of pins (at least 2). So essentially, you can take it as a 0 Ohm resistor separating different nets logically but --- because of the zero resistance --- the nets connected by it will always have the same potential (in theory). At the PCB stage, such special components (net ties) will be treated as wire (trace).

This is how I understand this tool and how it's used in KiCad.

[SiliconWizard]

How do you "tie" nets with different labels in KiCad so that it avoids warnings? Is it a new feature in v7?

I don't know if it's a new feature of V7.0 as I only started from this version without any experience with earlier versions.

I only figured this out (how to do it) --- fairly easily --- just a minute ago by watching a short video. It's done by placing a 'component' (or symbol) that is a "net tie", which may have different number of pins (at least 2). So essentially, you can take it as a 0 Ohm resistor separating different nets logically but --- because of the zero resistance --- the nets connected by it will always have the same potential (in theory). At the PCB stage, such special components (net ties) will be treated as wire (trace).

This is how I understand this tool and how it's used in KiCad.

Oh, ok. Just a trick then. Yes, you don't connect them directly, you use anything in between (that will act as a short in the end), to "trick" KiCad's ERC.
Fair enough.
But I'd still like to be able to get multi-label nets in KiCad - being able to define nets that have multiple labels, could be handled via an edit dialog for nets.

[max.wwwang]

Oh, ok. Just a trick then. Yes, you don't connect them directly, you use anything in between (that will act as a short in the end), to "trick" KiCad's ERC.
Fair enough.

It's precisely that, as far as I understand. But I do think it's not an elegant solution to place a net tie with the "place a symbol" dialogue. I think net tie deserves a dedicated menu item and toolbar button, because it's not a real component, but just a conceptual/logical facility. But anyway the current way does the job!

But I'd still like to be able to get multi-label nets in KiCad - being able to define nets that have multiple labels, could be handled via an edit dialog for nets.

I don't have an answer to this as a newbie  . But if I was the developer of KiCad, this can be addressed by "adding another layer of indirectness" --- as the saying goes (I know this is very vague! )

[Benta]

3: global labels = special graphic symbols used for getting signals into and out of a schematic sheet *)

Not quite get this yet. Does this mean they are only a 'formal' or presentation thing without any (or with only little) electrical/logical meaning?

No, they certainly have electrical meaning. I attach an example with a lot of global labels for inputs and just one for output.
Note that the power nets are not present (which will throw a lot of ERC errors).

[max.wwwang]

No, they certainly have electrical meaning. I attach an example with a lot of global labels for inputs and just one for output.
Note that the power nets are not present (which will throw a lot of ERC errors).

Thanks. I had realised that and added edit to my post above. Essentially, global labels are global net labels.

[Benta]

Essentially, global labels are global net labels.

Right.
You're off to a good start. Not everything in KiCAD is intuitive, but keep playing around.
Enjoy.

[max.wwwang]

Right.
You're off to a good start. Not everything in KiCAD is intuitive, but keep playing around.
Enjoy.

Will do. Thanks for all the help!
I was just deeply attracted by it the first moment when I started using it. As a free tool, it's so empowering!