Author Topic: Traces and ratsnests  (Read 2622 times)

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Offline GregJ7Topic starter

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Traces and ratsnests
« on: May 31, 2019, 03:26:06 pm »
I have run into some novice things in KiCad/PCBNew I couldn't figure out myself. It's hard to find what I'm looking for in the documentation, though I did try. I used KiCad/EESchema to create the schematic (although if I can figure out how to use one of the 30 circuit simulation software apps I've tried, then would hopefully import the schematic from that).

1. PCB laid out the components wonderfully. I thought PCBNew would also lay out 2-sided traces for me, but it didn't do anything with traces. What did I fail to do?

2. I want to print out the layout with its ratsnest so I can breadboard it then put it all on a prototype board with wire connections. I can't find a feature anywhere for the ratsnest to appear on a print. What am I missing?

3. I'm not sure I actually want a print of the ratsnest I see on the screen Overlapping lines are not differentiated. Is there anything I can do about this, so it is more clear which terminals the lines are connected to?
 

Offline sokoloff

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Re: Traces and ratsnests
« Reply #1 on: May 31, 2019, 04:00:56 pm »
I have run into some novice things in KiCad/PCBNew I couldn't figure out myself. It's hard to find what I'm looking for in the documentation, though I did try. I used KiCad/EESchema to create the schematic (although if I can figure out how to use one of the 30 circuit simulation software apps I've tried, then would hopefully import the schematic from that).

1. PCB laid out the components wonderfully. I thought PCBNew would also lay out 2-sided traces for me, but it didn't do anything with traces. What did I fail to do?
You failed to route the traces manually (or manually with the slight aid of the auto-router).

2. I want to print out the layout with its ratsnest so I can breadboard it then put it all on a prototype board with wire connections. I can't find a feature anywhere for the ratsnest to appear on a print. What am I missing?

3. I'm not sure I actually want a print of the ratsnest I see on the screen Overlapping lines are not differentiated. Is there anything I can do about this, so it is more clear which terminals the lines are connected to?
For 2 & 3, I'd quickly route the board and then use the different trace colors to disambiguate any crossing traces. For most boards that are simple enough to breadboard, you can probably get by with 2 layers, but since you're not fabbing the board, there's no real cost to doing a 4 or 6 layer "board" design to make routing easier.

For only #2, you could do a screenshot and then print that. Shift-Command-3 on Mac or Windows-PrntScrn on Windows.
 

Offline GregJ7Topic starter

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Re: Traces and ratsnests
« Reply #2 on: May 31, 2019, 09:50:58 pm »
? I thought the #1 thing PCB layout software did for the user was look at the connection needs and tell me how many layers I need to make all the connections as traces, and then lay the traces out for me. Surely it doesn't just show me how to arrange my components in a compact way—presumably minimizing the induction on the board—and create a Gerber file for me..?
 

Offline donotdespisethesnake

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Re: Traces and ratsnests
« Reply #3 on: June 01, 2019, 08:37:47 am »
? I thought the #1 thing PCB layout software did for the user was look at the connection needs and tell me how many layers I need to make all the connections as traces, and then lay the traces out for me. Surely it doesn't just show me how to arrange my components in a compact way—presumably minimizing the induction on the board—and create a Gerber file for me..?

I am afraid you have a very different expectation to reality. I wonder why you thought that?

PCB layout generally doesn't do anything of the things you expect. It does not even arrange the components in any particular order. It is basically a drawing tool in the same way that eeschema is.
You need to decide how many layers you need
You need to place the components where you think best.
You will likely need to route the traces manually, depending on the complexity and requirements of your board. KiCad does not contain an autorouter, but there is a commonly used third-party one called Freerouter.
Bob
"All you said is just a bunch of opinions."
 

Online Siwastaja

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Re: Traces and ratsnests
« Reply #4 on: June 01, 2019, 10:38:27 am »
? I thought the #1 thing PCB layout software did for the user was look at the connection needs and tell me how many layers I need to make all the connections as traces, and then lay the traces out for me. Surely it doesn't just show me how to arrange my components in a compact way—presumably minimizing the induction on the board—and create a Gerber file for me..?

Would be great indeed. Hasn't happened, and won't happen in the near future. Not even in the most expensive, most advanced EDA tools.

This is actually similar to expecting that a compiler would write the software for you, given a top-level specification.

Laying out a PCB is surprisingly complex and requires a lot of knowledge. Board parasitics are almost always in important role, so it's not just about finding shortest connections.

Modern AI is still at a toddler level, yet designing a complex PCB requires over-average IQ and years if not decades of experience. Seeing the rate AI and modern algorithms develop, maybe this is possible in 2050? And I think this is optimistic.

There are autorouters to do the most boring part of the job, but these require a lot of configuration to guide the process. This configuration step is where the designer inputs said "knowledge" into the system, and this requires a lot of work. The problem is, inputting "knowledge" into an algorithm means it needs to be formally defined, so inputting it does take more work than just applying the knowledge within your brain while drawing the layout, some of which happens subconsciously after seeing "good design practices" elsewhere. Some of this "good practice" is actually wrong, but it tends to average out quite well.

A concrete example? Even the most basic beginner would understand how to place the 0.1uF power decoupling capacitor right next to the IC power pin, and use a thicker track for power. For auto placer and auto router, this already requires multiple formal definitions, or quite a lot of artificial intelligence to figure out common names for power pins, deducing that capacitors on the same nets need to be close, and so on. And this is the simple case!

Many ICs have specific requirements on layout and placement. So the AI should be able to read the PDF and understand the text and figures that even many experienced designers struggle to understand. Then, often these datasheets give wrong advice. An expert designer knows this situation and use their experience to bypass the bad advice.

Autorouters are only relevant when designing computer motherboards or things of similar complexity. You don't want to manually route a length-matched, impedance controlled 128-bit wide bus, or break out 1000 pins from a massive BGA manually, but you need to know how to setup characteristic impedances, EMI shielding, board stackup and so on. These are complex concepts with no single easy answer or universal formula, and require a lot of input parameters, so automation is difficult. Instead, EDA software vendors have noticed that it pays back to make the actual drawing as easy and fast as possible, by designing neat shove, push, walk-around drawing modes, matched pair routing, bus mass routing, etc.

Note that component placement is often constrained by connectors, switches, buttons, LEDs etc.
« Last Edit: June 01, 2019, 10:50:04 am by Siwastaja »
 

Offline GregJ7Topic starter

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Re: Traces and ratsnests
« Reply #5 on: June 01, 2019, 02:27:03 pm »
Thanks for the great explanations. While I do not particularly care about short route lengths, I was subconsciously thinking of mapping traces as a graph theory problem. As a software developer, the fact that you refer to AI rather than graph theory means, as you surmised, I am ignorant about all the information required to do a good job of mapping the traces out (such as the examples nicely given). I was thinking it was simpler problem that graph theory could currently solve—although algorithms are probably still not fast enough for a very large number of nodes.

Having said that, the best layout software should still be able to help speed up the process, which presumably it does.
 

Offline sokoloff

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Re: Traces and ratsnests
« Reply #6 on: June 01, 2019, 04:33:57 pm »
In a lot of cases, the physical layout matters. "I want this LED over here, and these pushbuttons in a 45° offset rectangle over here and the USB connector over here..."

Sure, you could express all those as constraints, create a costing function for various tradeoffs inherent in design, and let an AI at it. I don't think the high-end commercial packages are there yet, let alone the fastest growing and most promising looking (but still fairly young) free and open-source package.
 

Offline Doctorandus_P

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Re: Traces and ratsnests
« Reply #7 on: June 05, 2019, 02:17:06 am »
What you are looking for is called a "board house".

You give them a schematic scratched on the back of a napkin and a bag of money and they return a fully working board to you.
 


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