Covering/closing vias with solder mask & manufacturer requirements

[honx]

We have received some contradicting requirements/advices from PCB manufacturers about covering vias with solder mask and I'd be interested in other peoples experiences and opinions. The design in question was rather fine (0,3mm vias on a 6 layer PCB).  The vias go all the way through, no blind or buried.

The original design had vias uncovered on the top and covered with solder mask on the bottom. First manufacturer (in China) had no problem, manufactured and the PCB worked fine.

Second manufacturer (in Germany) said they wouldnt/couldn't manufacture half open vias and that we had to open or close them completely. When asked why they couldnt give us a reason but said they had always done it like that.

Another German manufacturer said, they would only manufacture vias where at least one end was open. They said that when both ends were covered, theres a danger of trapping liquid inside that would evaporate and burst open the via during reflow.

I know there are techniques for filling/closing vias but that is not my point.

I'd be interested how other people handle this.

Do you avoid either half-open or closed vias? And if yes, why? (I'm mainly interested in the "why")

What problems could arise either during PCB manufacturing or while reflowing?

[DerekG]

Do you avoid either half-open or closed vias? And if yes, why? (I'm mainly interested in the "why")

What problems could arise either during PCB manufacturing or while reflowing?

The Chinese manufacturer probably used solder with lead in it. This reflows at a lower temperature.

The German manufacturer will abide by the EU Hazardous Materials Legislation & so probably (most definitely) uses tin only solder (no lead). This means that the reflow process must be done at a much higher temperature (relatively speaking). Any solder mask over the via risks being "bubbled" by the melting solder below it. Solder mask is often used to provide voltage insulation (& prevent moisture ingress) to the circuit below. For this reason, the board may then fail ISO specifications if the solder mask "bursts".

The German manufacturer will definitely manufacture all their boards to the current ISO Standard & so will not be willing to have the solder masks compromised in any way.

The solder paste used in SMD manufacture does contain volatiles which would normally boil off during the reflow process. These need to go somewhere, which is why at least one end of the via is (preferably) left open when using lead free solder.

The German Manufacturer who said you could close both ends was going to modify their manufacturing process such that copper was plated through the hole & then the solder mask was applied so that no solder entered the vias from either side. If current carrying capacity or heat dissipation is important, then solder inside a via is the preferred method (not that you can be guaranteed that any/much will flow up a 0.3mm via).

I hope this helps.

[honx]

The chinese manufacturer also used a lead-free process, both were ROHS for the european market.

I understand the reasoning that moisture/liquid trapped inside a via that gets closed on both ends may evaporate and burst the solder mask. But that would have to be from liquids used during PCB manufacturing, wouldnt it? Once solder paste is applied the via is already closed on both sides and no paste can get inside. Regardless if this requirement is (still) relevant, at least its a reason that makes sense.

Its the "either completely open or completely closed" requirement that puzzels us..

I'm not sure what you mean by the last paragraph about the modified process & copper plating. As is understand, the inside of a via is always copper plated from the inside and then solder may be put on top of it.

The manufacturer that said either both sides open or both sides closed remains a mystery and they couldnt give me an explanation for this requirement other than "we always do it like this".


We came up with one other theoretical scenario when talking about it at the office, but its a bit far fetched.

If a via is only closed on one end and it that is "from below", the via is like a "cup" and solder paste could get in the via (but not much since the stencil doesnt have an opening there).

Now, when the bottom side gets assembled (and the "via cup" is upside down), the solder inside the via may set free gasses (that did not fully evaporate when reflowing the top side) on the side where the via is closed. Those gasses may be trapped between solder that is still solid and the solder mask and those cannot go anywhere and may crack open the solder mask.


hmmm.....hmmmm....

[DerekG]

I understand the reasoning that moisture/liquid trapped inside a via that gets closed on both ends may evaporate and burst the solder mask. But that would have to be from liquids used during PCB manufacturing, wouldnt it?

The "moisture" is contained within the solder flux (acid) which may not be fully evaporated by the board manufacturing process. You would normally receive your boards with a solder finish to enhance the reliability of your soldering process & to prevent any open copper from oxidising in the air.

I'm not sure what you mean by the last paragraph about the modified process & copper plating. As is understand, the inside of a via is always copper plated from the inside and then solder may be put on top of it.

If you want one (or both) sides of the via closed with solder mask (so no solder gets into the via), this generally involves two applications of solder mask instead of the usual one. The first application covers over just the closed vias & the second (later) application covers the copper tracks themselves. In between these two solder mask applications, the tin (or lead/tin) would be applied to the tracks (& pads) to prevent the copper from oxidising.

There is also one other reason (which is a good manufacturing process at your end - the board manufacturer may not care about it). If you close off the top via layer, you prevent air escaping through the via when wave soldering the bottom layer. This prevents the solder from being "pushed" through the via which reduces thermal heat dissipation & current flow through the via.

[free_electron]

simply encroach the via's. : make an openein gin the soldermask the size of the drill hole .

it depends on several factors ;
if they are using liquid soldermask and are injection printing then the hole will be filled with soldermask. it'll dry up and become a solid fill. not a problem.
if they are using dry film or are not injection printing then the risk exists that a cavity forms inside the hole. during post processing ( soldering , fluxing / defluxing / cleaning ) liquid will enter the 'pocket' and this will burst or form microcracks giving problems later. Especially dendrite formation is problematic (so called CAF problems)

so you want to avoid trapping anything in the hole : simply encroach the via.

typically a board fab will post process gerber data anyway. they may ahve a default process that opens soldermask to the drill size.

you need to talk to your board manufacturer.

[John_ITIC]

https://www.google.com/?gws_rd=ssl#q=PCB+via+outgassing

[T3sl4co1l]

simply encroach the via's. : make an openein gin the soldermask the size of the drill hole .

Note: add soldermask plus hole positioning tolerance to that (minimum 3 mils), otherwise one side will likely goop just a little into the hole (but, likely not enough to plug it, either).

Note that none of this matters if the vias aren't actually being soldered.  I assume you wouldn't be using tented vias for thermals.

If this is a high density fanout situation, and you can't afford the space for dogbone style BGA connections (which could/should use tented vias, to prevent shorts), then they should be untented, and you'll have to deal with solder wicking (if any -- <= 12 mil vias don't usually wick much, especially on lead-free, which doesn't flow as strongly).

Tim