Best low-ish cost PCB assembly house with BGA capability

[tom66]

I have a board with a Zynq + DDR3 memory BGA devices that I'm looking to get prototyped.  Sadly, the prototyping costs so far have been eye-watering.  Almost £900 in the UK and ~$1200 USD from a US manufacturer, per board, and that is before the parts cost or PCB.

The board has two BGA devices, a couple of QFN devices, various TSSOP/QFN parts, and about 500 SMD passives 0402 - 1206 in size. It is a double sided load, made necessary by the FPGA/SoC decoupling.

I had thought about doing it in house, but this would be my first BGA layout, and the Zynq will be difficult to get right. At £60 per FPGA, too, it's not something I can really afford to throw away until it is right. Difficulty in inspecting the solder balls and determining if a fault is related to design or soldering is also a concern, so professional assembly here is attractive.

Input appreciated, especially from anyone who has had success with a given assembly house.

[T3sl4co1l]

That's a damn good deal.

Wait, holy shit, that's a ballbuster?  What kind of budget are you on?

You can do it yourself but you'll spend as much in equipment and materials if you don't have them already, and an order of magnitude more in labor, placing and soldering and testing and reworking it, plus the lost project timeline.  (Assuming any sane business model anyway, I guess?)

Tim

[SMTech]

£900 is a lot but I bet it scales pretty nicely once you get to about 5.
Low volume batches come with unavoidable costs, if you are supplying the parts they still need to:
Load them onto feeders,
Program the pick and place,
Document or label up all the little odds and sods that haven't come in production ready packaging,
Get a person to manually fit those odds and sods
Buy a stencil for both sides @ ~ £140 each (unless they have a solder jet printer), I personally wouldn't be happy with one of those Chinese ones for this.
Cover the overheads of any extra processes you might expect them to be carrying out like X-Ray.

Things like

a couple of QFN devices, various TSSOP/QFN parts

are often not friendly parts to deal with in small quantities, coming poorly packaged and sometimes even with bent legs, dealing with that takes time.

That said ignore the BGA for a minute (that I don't know and cannot be bothered to lookup just how big and evil it might be) and I would expect our facility to quote a figure based on a PCB of this component count taking about 1/2 day and if you were supplying the parts the price for 5 would be quite similar to the price for one, its the setting up and tooling that costs money after all. Sadly because it is BGA and we don't have some of the toys we would like we wouldn't quote on this one, and we're busy. I'm led to believe that a lot of smaller places like ourselves are under quite a lot of pressure to undertake this work as the larger EMSs lead times and willingness to do the little stuff are becoming prohibitive. In the short term that might just mean you have to suck it up and pay a bit more, in the longer term you might find its easier to get this work done as more the smaller guys can invest in appropriate equipment with some expectation of a return.

[spongle]

Things like

a couple of QFN devices, various TSSOP/QFN parts

are often not friendly parts to deal with in small quantities, coming poorly packaged and sometimes even with bent legs, dealing with that takes time.
\

Yeah I'd be asking some pointed questions if my QFNs came with bent legs

[OwO]

I did exactly the same kind of board (Zynq + DDR3) and it's trivial. I used JLC SMT for all the smd passives and did the BGA myself. Without JLC SMT it's still possible but will take 1-2 hours hand-placing all the passives. The only tools you need are a hot air station (any cheap one will do but beware of safety - always cut power to it when not in use) and a temperature controlled iron (for tinning the pads for the non-bga parts). Do not apply paste on the BGA area, only apply flux. The whole thing took less than $100 (PCB + PCBA + parts). A good quality stencil costs $10-$20. Ignore whoever tells you this is a $1000 project.

[OwO]

If you don't already have the design done, try to design the board so that most of the passives are on the bottom side and all the chips are on the top side. That way you can use JLC SMT when it becomes available and not have to solder passives. How many layers is this? If it's more than 6 layers you should try to optimize it further. A good Zynq + 32 bit DDR3 design can be done with 4 layers, so 6 layers is "comfortable" and any more is a waste.

[tom66]

It's a 6 layer board.  I would have thought 16-bit DDR3 (800MHz) would be difficult on 4 layers.  I have had enough difficulty escaping the traces from the BGA and the JLC stackup is a pain as only the top and bottom layers are ideal for impedance matched signals.  I have done DDR2 layouts before on 4 layers with some care but this interface aims to run at 800MHz so I wanted to be confident about the signal integrity. Therefore, maximum of two layer changes, and all traces routed against ground plane, 40 ohm impedance matched, and length matched to 2% of bit period.  The board is already laid out and the passives are sadly on both sides although most of the small ones are on the bottom.

I'm aware that PCB assembly is expensive.  I'll look into doing the passives at a fab and assembling the BGA directly.  It's definitely an option I've considered.  The risk is inspection of the BGA.  If there is a bad solder ball or a short between balls, debugging this type of problem could be near impossible.  I have had plenty of issues with connectors and reliability before that I'm keen to avoid. They have already delayed this project too much.

The 6-layer board at JLCPCB is only about £120 for 5 copies, pretty cheap. So I was happy with that, and then maybe paying twice the parts cost for assembly (£200 parts cost, so £500 per board to assemble.)  The first quote of £2,400 (including parts, but no PCB) was eye-wateringly high. 

[SMTech]

Things like

a couple of QFN devices, various TSSOP/QFN parts

are often not friendly parts to deal with in small quantities, coming poorly packaged and sometimes even with bent legs, dealing with that takes time.
\

Yeah I'd be asking some pointed questions if my QFNs came with bent legs

Badoom tish.

[Ice-Tea]

Ignore whoever tells you this is a $1000 project.

Unless you're not in China. In which case it makes perfect sense.

[xlnx]

A good Zynq + 32 bit DDR3 design can be done with 4 layers

OwO - I would be hugely interested in more details about how you did this, if you are able to share. I have been looking into the MiniZed board, it uses a 6-layer board and it is very cleverly done. I assume that with a 4-layer board you can't escape all BGA pads, but that is not necessarily a showstopper if only a few I/Os are needed.

[tom66]

I found 6 layers hard enough but that was effectively only 4 layers as only two layers were useful for high speed signals. So I could believe 4 layers is possible with some clever engineering with 16-bit data bus.  32-bit bus is a lot more difficult, but perhaps possible with a T-type arrangement for the address bus as the data byte groups are on opposite sides of the Zynq part.

IIRC it's acceptable to route the control group against VDD so perhaps you could do that, using a VDD plane as a reference as well as power for the DDR3 chip. Saves you having to have two ground planes.

The pain in the ass comes with routing the termination resistors around the bottom of the DDR3 chip. Though I've seen some designs that do this on the top side, far from the DDR3 chip, there doesn't seem to be much guidance on how close these need to be (just "near") so I tend to put them right under the DDR3 chip.

The insane one I've seen is a DDR2 layout done on 2 layers with all signals on the top layer.  I have no idea how they did it.  But I know it was only 333MHz.

[asmi]

I routinely assemble boards of similar complexity at home without any issues. Get yourself a 10x stereo microscope, good vacuum pickup tool, manual stencil printer that works with double-sided boards, and a reflow oven. I've built a small program that generates assembly PDF from Gerbers and pick-and-place file (here is example: https://1drv.ms/b/s!AkGeV4xlumxjg-8fafZun0vw2O5eGg?e=FtVd8X ), that helps a lot during assembly as there are many different components and there is no way you will remember the placement with out going back-and-forth to the PCB and schematics. I've found that I spend post of assembly time preparing parts and then putting them away rather than for the actual placement. This means that assembling several identical boards at the same time is not going to take significantly more time than just a single board.

[tom66]

@asmi Thanks.  I will consider it.  The equipment may be relatively expensive compared to assembly, though I do need to get a good stereo microscope sometime, it's been on my wishlist for far too long.

As for budget, unfortunately I am limited right now for various reasons, although that will change in a couple of months.  Hopefully this is a project which will be interesting but I am keeping it under wraps for now.  So $1000+ for does put it a little out of reach as it is entirely self-funded.

[asmi]

@asmi Thanks.  I will consider it.  The equipment may be relatively expensive compared to assembly, though I do need to get a good stereo microscope sometime, it's been on my wishlist for far too long.

A decent stereo microscope will be about $200 via AmScope, T-962 reflow oven is about the same, good manual stencil printer is about $400 on aliexpress, the most expensive tool in my gear is a vacuum pickup tool (I use the one from Zephyrtronics, which is great even for 0201, but it is pricey). All of that is effectively a one time expense though.

As for budget, unfortunately I am limited right now for various reasons, although that will change in a couple of months.  Hopefully this is a project which will be interesting but I am keeping it under wraps for now.  So $1000+ for does put it a little out of reach as it is entirely self-funded.

Well I'm doing this as a hobby, so it's self-funded too, but I didn't buy all of that equipment at the same time, it's what I accumulated over time. The absolutely critical parts are reflow oven and stereo microscope, the rest can be done without for a little while.

[TimCambridge]

Do not apply paste on the BGA area, only apply flux.

Does flux-only apply to a BGA on an ENIG board?

With prototype boards I have experimented with leaded HASL plus flux for the QFN parts, that works well at the usual leaded temperatures, but I've never tried ENIG + flux.

[asmi]

Does flux-only apply to a BGA on an ENIG board?

With prototype boards I have experimented with leaded HASL plus flux for the QFN parts, that works well at the usual leaded temperatures, but I've never tried ENIG + flux.

I always apply solder paste to BGA pads when working with them. Never tried the flux-only approach. And you need ENIG (or OSP) to work with BGAs (especially large ones, like Zynq or Artix FPGAs) as these are the only finishes which are completely flat.

[Larry80]

If you don't already have the design done, try to design the board so that most of the passives are on the bottom side and all the chips are on the top side. That way you can use JLC SMT when it becomes available and not have to solder passives.

This is an interesting idea, so you get 1-side done on JLC and then some of them can be reflown later on the other side? 1st side is glued, so they stick on second reflow?

[asmi]

This is an interesting idea, so you get 1-side done on JLC and then some of them can be reflown later on the other side? 1st side is glued, so they stick on second reflow?

Surface tension of a molten solder is quite high - even relatively large caps (like "type D" tantalum ones) never ever fallen out on any of my boards.
Didn't try any ICs though.

[SMTech]

If you don't already have the design done, try to design the board so that most of the passives are on the bottom side and all the chips are on the top side. That way you can use JLC SMT when it becomes available and not have to solder passives.

This is an interesting idea, so you get 1-side done on JLC and then some of them can be reflown later on the other side? 1st side is glued, so they stick on second reflow?

Why is everyone always so convinced double sided needs glue? It doesn't, glue is used when heavy components are on the bottom reflow side, or to hold surface mount parts in place when going through flow waver soldering.

[Bud]

This is an interesting idea, so you get 1-side done on JLC and then some of them can be reflown later on the other side? 1st side is glued, so they stick on second reflow?

Surface tension of a molten solder is quite high - even relatively large caps (like "type D" tantalum ones) never ever fallen out on any of my boards.
Didn't try any ICs though.

I routinely do SOIC-8 and SOIC-16, they come out just fine.

[asmi]

I routinely do SOIC-8 and SOIC-16, they come out just fine.

That's good news, thanks! But what about more tricky things like QFNs and small-to-medium BGAs (say, up to DDR3x16 - BGA-96)? The space on 6+ layer PCBs is expensive, and I would save quite a bit of it if I could place some ICs on the bottom side.

[Bud]

My guess is they should be ok. The more pads a part has the more molten solder surface tension  will hold it on the pcb.
Edit: but you probably should research if your BGA will tolerate double reflow. I would be less  concerned about QFN, i also do QFN, though small ones like 6x6mm.

[OwO]

OwO - I would be hugely interested in more details about how you did this, if you are able to share. I have been looking into the MiniZed board, it uses a 6-layer board and it is very cleverly done. I assume that with a 4-layer board you can't escape all BGA pads, but that is not necessarily a showstopper if only a few I/Os are needed.

https://github.com/gabriel-tenma-white/sdr5
It's a Zynq 7010 in the 400-ball package and 32 bits DDR3. I have prototyped 2 units so far and both pass memtests and read/write eye tests at 1066MT/s.

The stackup in the DDR area is like this (top to bottom): signals |0.1mm| ground |1.0mm| signals |0.1mm| VCCDDR.
There are some more pictures here: https://www.eevblog.com/forum/fpga/kintex-7-fpga-board-with-ddr3-memory-and-pci-e/msg2267439/#msg2267439

You can also see the board is HASL. I have never done BGA on ENIG so I'm not sure if solder paste is mandatory there, but on HASL with the flux-only method I haven't had any failures out of 8 total BGA solderings so far.

[xlnx]

OwO - thanks a lot for you sharing this - this is very, very inspiring!! 

[Psi]

The issue is the burred or blind vias that maybe needed.

This is what makes the pcb price skyrocket because it usually makes it a HDI PCB instead of a normal pcb.

If you can redesign it to not be HDI the price will be cheaper.

If your BGA will need burred/blind vias then i would perhaps recommend finding a cheap ready-made BGA adapter pcb.
Something to break-out the BGA pads onto a PCB with half-holes which you can then solder to your non-HDI pcb.

Edit: im not 100% sure if this price you quoted was for PCBs, Design + PCB, or just Design?

[mrpackethead]

Why is everyone always so convinced double sided needs glue? It doesn't, glue is used when heavy components are on the bottom reflow side, or to hold surface mount parts in place when going through flow waver soldering.

Becuase they dont' know any better.

"A constant of approximately 0.0269 g/mm2 represented the
ratio at which a molten SAC305 solder joints failed to hold
a QFN on the bottom side of a PCB during reflow, as a
function of component mass versus total perimeter of wetted
surface. Applying a 20% failure buffer to this value
produced an average failure ratio of 0.0215"

http://www.circuitinsight.com/pdf/weight_limit_qfn_smta.pdf

[ddavidebor]

I have a board with a Zynq + DDR3 memory BGA devices that I'm looking to get prototyped.  Sadly, the prototyping costs so far have been eye-watering.  Almost £900 in the UK and ~$1200 USD from a US manufacturer, per board, and that is before the parts cost or PCB.

The board has two BGA devices, a couple of QFN devices, various TSSOP/QFN parts, and about 500 SMD passives 0402 - 1206 in size. It is a double sided load, made necessary by the FPGA/SoC decoupling.

I had thought about doing it in house, but this would be my first BGA layout, and the Zynq will be difficult to get right. At £60 per FPGA, too, it's not something I can really afford to throw away until it is right. Difficulty in inspecting the solder balls and determining if a fault is related to design or soldering is also a concern, so professional assembly here is attractive.

Input appreciated, especially from anyone who has had success with a given assembly house.

Try getting a quote from PCBWAY
They end up always being the cheaper / 2nd cheaper assembly in low quantities (I manufacture weird equipment in small batches).

[tom66]

JLCPCB quoted me ~£130 for 5 copies of a 6" x 7" 6-layer PCB.  Very impressive price.  I decided to go with 6 layers instead of 4 to give the DDR memory bus the greatest chance of working well.