Author Topic: Help with a problematic board layout  (Read 1207 times)

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Offline qpit3aTopic starter

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Help with a problematic board layout
« on: September 22, 2022, 10:43:37 pm »
Hi,

I have made a board that is a a pre-amp for a frequency counter.  I am a beginner at board layout however I thought this would be simple as it's only meant to work up to 20Mhz, not so.  What happens is that when I power this board up I get switching noise in the input (I think) from either the comparator or the op-amp which means the board itself is causing interference which defeats the hysteresis I set on the comparator.  Note the comparator feedback is now about 400k. Any suggestions what I should do?   
Note I have modified the schematic a bit and so the PCB now has a few mods.

Thanks for any help.

Updated to put correct schematic, pcb layouts...
« Last Edit: September 23, 2022, 02:16:47 am by qpit3a »
Peter Cupit
 

Offline Ghanou

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Re: Help with a problematic board layout
« Reply #1 on: September 26, 2022, 07:59:40 am »
why would you use the highly accurate GPS signal as a reference clock, just to to end up bodging it up with screw terminals  :palm: , doesn't make any sense. its like buying a rolls royce just to equip it with a 15 inch chinese tires. screw terminals are for power not for signals, this was my first observation.
however i don't think it is what's causing the switching noise, is it only on the inputs? and not on other signals as well, because that might be an indication that it's coming from the power supply, which you have not provided any information about.
edit: what is the frequency of the switching?
 
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Offline qpit3aTopic starter

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Re: Help with a problematic board layout
« Reply #2 on: September 26, 2022, 09:42:39 am »
Thanks, I have been looking at a lot of board layout videos and have begun to see some problems.   Think I needed a ground plane. The power supply is a Siglent SPD3303X-E ( which I trusted ).  I will do some more measurements.  I have re-read comparator datasheet and poor layout can easily cause issues.
Peter Cupit
 

Offline jonpaul

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Re: Help with a problematic board layout
« Reply #3 on: September 26, 2022, 11:25:52 am »
Bonjour, spec of design eg input min, max, frequency min max, etc ?

1. scope photos or screen grabs of power, input, output?

2. Circuit needs review and redesign.

3. Chinese PSU specs esp. ripple and noise?

4. PCB... after circuit is fixed.

See counter buffers and prescalers from HP, Fluke, Tektronix, counters, most counter manuals are available free.

Jon

Jean-Paul  the Internet Dinosaur
 

Offline qpit3aTopic starter

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Re: Help with a problematic board layout
« Reply #4 on: September 26, 2022, 01:13:31 pm »
Hi,

Thanks for the reply.
I have found that the amplified signal gets in the power and so does noise from the digital board.
Pics are in order
Signal into pre amp with power off
Signal into pre amp with power on
Output from pre amp
Power with no signal generator turned on  (and pre amp and digital board)
Power with signal generator turned on (and pre amp and digital board)

Wondering if this circuit is worth saving - can it work like I want ie 100mv sensitivity up to 20Mhz?
Peter Cupit
 

Offline jonpaul

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Re: Help with a problematic board layout
« Reply #5 on: September 26, 2022, 01:26:02 pm »
At 20 MHz use BNC not screw terms, add 50 ohm term res at input and output.

Remove first two ICS, use just the 74HC14 all sections,

Add ground plane

Add 1..10 nF monolithic by-pass caps at the 74HC14.

Read up on high speed PCB design, books and website of Dr Howard Johnson are the best.
http://www.signalintegrity.com/Pubs/HSDDsem.html

Just the ramblings of an old retired EE

Jon
Jean-Paul  the Internet Dinosaur
 

Offline r6502

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Re: Help with a problematic board layout
« Reply #6 on: October 15, 2022, 12:02:55 am »
helo qpit3a,

I think, your design has a gndproblem and a power supply problem.

Comperators like the LTC1720 will drar a high current peak during switching, therefore it is needed to have a batery of caps close to the supply pins. I modified your design here and addes 2 caps 10n and 1µ.

general the caps for for bypassing the chips are to fare away from the power supply pins in your design. do also not switch the layer when connecting bypass caps this adds aditional inductivity to the trace that reduces the bypassing ippact of the cap. connect always 1st the pad of the bypass cap from the power rails and than connect the power pin  direct from the pad of the bypass cap. do not connet the power inbetween the the two pads.

I also changed to all SMD design exept of the BNC jacks.

I used 1N4148 as input protection (did not have the correct footprit for that)

Separate signal and power GND. With high current peaks on power rails you impact the signal GND and so your signal as well.

place a GND plane for signal GND on top and bottom Layer. place a lot of stiching vials on the GND planes

if possible go to 4-Layer design. here place GND layer as 2nd Layer for PWR GND and 5V Plane as 3rd Layer.

I also redra your schematic, as yours is not very good to read. I mostely build the library smbols myself, as the parts suplied in the lib are usually ugly. I also separate power connection and and functional gates: here the double comparator with 2 seperate comperator symbols and a seperate power symbol. I also put aditional notes on the schematic, her I calculated the gain of the preamplifier and the hysteresis of the comparator. this helps during initial operation of the circuitry.

So at the end I hafe a question to you: for what ist this preamp used for? Will it be used as input section for µC counter input?

It helps also, to decouple the power from the comparator with an aditional inductivity. Here infos on bypassing, have also a look on part 2 and 3 (link at the end) and here Analog Devices App Note MT-101 you find aditional hints.

Guido
« Last Edit: October 15, 2022, 12:18:49 am by r6502 »
Science can amuse and fascinate us all, but it is engineering that changes the world - - Isaac Asimov
 
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Offline r6502

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Re: Help with a problematic board layout
« Reply #7 on: October 15, 2022, 12:32:18 am »
I forgott 1 thing:

Input voltage devider:

in my schem C1 should be 1µF.

AC input devider formed by R10||C3 and series of C2 - R3||R4 will attenuate the signal as well.

Guido
Science can amuse and fascinate us all, but it is engineering that changes the world - - Isaac Asimov
 
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Offline qpit3aTopic starter

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Re: Help with a problematic board layout
« Reply #8 on: October 16, 2022, 05:22:37 am »
Hi,

Thanks for all your feedback and work on the reply, I learned quite a bit from you.  The circuit was intended to be the front end to a frequency counter.  I have since realized that the op amp I chose is not fast enough to do what I wanted,  I just read 300mhz but I hadn't understood that that is for a gain of 1 only, and you have to be careful with large signals for the op amp as it has a settling time and other criteria that affect bandwidth.  I have since  found and have made a new board for the  design here: https://www.westmountainradio.com/pdf/Article_Fernandes.pdf which uses discreet fets and transistors.  At present waiting for the new board to be returned.  The new board is two layer but the bottom later is a ground plane and the parts are surface mount.   I used BNC as suggested.

Thanks again.

« Last Edit: October 16, 2022, 05:24:12 am by qpit3a »
Peter Cupit
 


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