Need Help Desciphering Layout Specs

[phillipsoasis]

I am making a board (111mm x 146mm, 4 layer) with a https://www.onsemi.com/download/data-sheet/pdf/pzt3906-d.pdf PZT3906 transistor. It has a heat sink pin and I am uncertain as to how much copper I have to put around that pin so it has adequate heat dissipation. The datasheet says I need the following for a maximum of 1 watt heat dissipation:

PCB size: FR-4, 76 mm x 114 mm x 1.57 mm (3.0 inch x 4.5 inch x 0.062 inch) with minimum land pattern size.

I know FR-4 is just the material for the board. Are the dimensions the min size board it needs, or the space this one part needs? What size pad do I need under the heat sink pin? I believe the heat sink pin is connected to the collector, but I don't see that in the spec sheet. Or, do I leave it unconnected?

[bson]

It's the total area of continuous, exposed copper.  Depending on airflow it doesn't have to be on just one side, as long as the stitching offers sufficient thermal conductivity.  I haven't looked at the package, but maybe a heat sink is easier with a small board.

[phillipsoasis]

The package is SOT-223 4L.

Thanks for the clarification. I do not have room for a 3" x 4.5" copper area on my board, so I will have to go back to the TO-92 package, hand solder it, and add a heat sink.

Unless you have another idea? There is nothing special about the transistor. Just a general purpose PNP transistor carrying about 250 mA. Should be under 100 mW of power dissipation.

[tooki]

100mW isn’t much. That’s 1/10 of the 1W the datasheet uses in its dissipation calculation. So you don’t need anywhere near the board area for heat dissipation as they did.

[phillipsoasis]

How would I calculate how much copper I need attached to the heat sink on the chip?

[tooki]

It's the total area of continuous, exposed copper.  Depending on airflow it doesn't have to be on just one side, as long as the stitching offers sufficient thermal conductivity.  I haven't looked at the package, but maybe a heat sink is easier with a small board.

I don’t think that is correct, because the datasheet expressly says “with minimum land pattern size”, meaning it doesn’t have expanded pads — which large copper would be.

When SMD parts need lots of cooling, they always include more detailed information for thermal calculation. This is a basic jellybean low power transistor. I don’t think there’s any reason to infer that it needs particular attention to cooling.

[phillipsoasis]

I found this, which may help others in the future:

https://www.ti.com/lit/an/snva419c/snva419c.pdf

[temperance]

For 0.1 W a heat sink might not be required. Take a look at a similar transistor like a BCP56 which states thermal resistance values for three footprints.

https://www.nxp.com/docs/en/data-sheet/BCP56_BCX56_BC56PA.pdf

With a 1 cm² footprint you are at 125 K/W. Even the standard footprint will be fine with 200 K/W.

[T3sl4co1l]

100mW is fine for SOT-23 (MMBTxxxx), unless you need to run it much closer to Tj(max).

Tim