OurPCB - affordable multi-layer board manufacturer - my experience

[asmi]

Hi guys,

I've just posted a quick review of OurPCB fab which manufactured for me 10 6-layer boards 10x10 cm each with 0.1/0.1 mm trace/spacing, 0.2 mm drills, controlled impedance and custom stackup, and all of that for $237.33! I personally think the price is a bargain. I know that some other people here are looking for affordable manufacturer for mid-spec multi-layer boards like mine, so I decided to share it here.

The post is turned out to be quite long, so I posted it into my (almost empty) blog here: http://thingselectronic.blogspot.ca/2017/11/ourpcbcom-pcb-fabrication-house-review.html If you are someone like me, who would like to make that next step up in complexity of your projects, but don't want top break the bank - I definitely recommend you to take a look.

[Psi]

Yeah, used them before.
OurPCB is good when you need something a bit more advanced with good quality but still at a good price.

[fcb]

Bookmarked!

[NorthGuy]

OurPCB=WellPCB.
Good quality, see my post in the other thread: https://www.eevblog.com/forum/manufacture/how-to-order-10-50-my-own-pcb/25/

WellPCB quotes $99 for 5 100x100mm 6-layer ENIG boards. This is substantially less than $237.

BTW: All Chinese PCB manufacturers use the same quoting software which always ask if vias are tinted or not. What does it mean? The gerber file specifies whether vias are covered by soldermask or not. Worse yet, I can have some vias covered (as under BGA) and some not (as TPs for testing). Are they going to alter my design to fit my answers? If not, what is the reason to ask?

[asmi]

WellPCB quotes $99 for 5 100x100mm 6-layer ENIG boards. This is substantially less than $237.

My order was for 10 boards, you also need to specify impedance control and "Track Width/Space: 3-4mils" (which you can't specify together in their quote system for some reason). This brings the quote more-or-less to what I paid for the order once you add shipping charges.

BTW: All Chinese PCB manufacturers use the same quoting software which always ask if vias are tinted or not. What does it mean? The gerber file specifies whether vias are covered by soldermask or not. Worse yet, I can have some vias covered (as under BGA) and some not (as TPs for testing). Are they going to alter my design to fit my answers? If not, what is the reason to ask?

This option is applicable if you send a project file instead of gerber files. In allpcb's quote form, there is a note to that effect: "*For Gerber files, This choose is useless. it will be made according files as default."
But it's best to send Gerbers as it's the only way which gives you full control over resulting boards.

[NorthGuy]

My order was for 10 boards, you also need to specify impedance control and "Track Width/Space: 3-4mils" (which you can't specify together in their quote system for some reason). This brings the quote more-or-less to what I paid for the order once you add shipping charges.

I missed this option. When I click "Track Width/Space: 3-4mils 10% Extra" the price doubles to over $200. This is an interesting treatment for "10% Extra". But the price is great nonetheless and the quality is excellent based on your pictures. I can live with 5mil trace anyway, so it's even better.

How did you request the custom stackup? Do you know what is their default stackup?

This option is applicable if you send a project file instead of gerber files. In allpcb's quote form, there is a note to that effect: "*For Gerber files, This choose is useless. it will be made according files as default."
But it's best to send Gerbers as it's the only way which gives you full control over resulting boards.

Thank you. This explains the puzzle. It never actually occurred to me that you can submit anything but gerbers.

[asmi]

I missed this option. When I click "Track Width/Space: 3-4mils 10% Extra" the price doubles to over $200. This is an interesting treatment for "10% Extra". But the price is great nonetheless and the quality is excellent based on your pictures. I can live with 5mil trace anyway, so it's even better.

I think if would be best if you'd email them all parameters and request a quote for it. I can't get myself to trust these online quote systems in all but very simple cases. Designing a 6-layer board takes a long time, so I didn't want to begin this process until I was confident I could actually afford to manufacture it afterwards. The quote I was provided with was good for 30 days, which is plenty of time to complete design without rushing anything, and it gives you somewhat of assurance that price won't suddenly shoot into the sky.

How did you request the custom stackup? Do you know what is their default stackup?

When I've asked them about stackup, here's a response I received verbatim:

My factory said they can not provide you the stack up file now. Because you need impedance control. When you have a gerber file and told me which trace need impedance contral, the factory can adjust the stack up file to meet you request of the impedance control.   

Since you need *some kind of stackup* to base your design off of, I went ahead and designed the stackup myself based on cores and prepregs that are commonly used in the industry. They did tell me that dielectric constant of FR4 they use is 4.5. Then I provided a screenshot of the stackup from Orcad PCB editor that I used to calculate traces, as well as included a text file describing stackup and specifications for CI traces (trace width, ref layer #, expected impedance, diff trace width and gap, diff trace impedance) . In case you're interested, here's the exact package I've sent them: https://1drv.ms/u/s!AkGeV4xlumxj6xk0oycLAwCPVPC3 There is "!Info.txt" file with all that information.

[thommo]

Hi Asmi,

Thanks for taking the time to place this post - it's exactly what we are looking for and perfect timing. We have an 8L 4/4 0.2mm proto board that has just been completed and are looking for alternate supply sources right now.

I'll be sure to let you know how things work out.

Thanks again - Peter

[NorthGuy]

When I've asked them about stackup, here's a response I received verbatim:

My factory said they can not provide you the stack up file now. Because you need impedance control. When you have a gerber file and told me which trace need impedance contral, the factory can adjust the stack up file to meet you request of the impedance control.

Looks like what they're trying to say that if you don't request "Impedance Control", you can get any stackup they want. If so, to get anything in particular you need to request "Impedance Control". Anyway, the price they have for their boards, given that you get the stackup you want is great.

@blueskull: How do you know WellPCB is the same as OurPCB? They look different to me. And the quality of OurPCB's boards on asmi's pictures appear to be better (to my eyes anyway) than the WellPCB's boards you have posted.

[asmi]

Looks like what they're trying to say that if you don't request "Impedance Control", you can get any stackup they want. If so, to get anything in particular you need to request "Impedance Control". Anyway, the price they have for their boards, given that you get the stackup you want is great.

To be honest I have a hard time imagining 6+ layer board project which doesn't have any high-speed traces. So to me this seems more like an academic discussion.

[mrpackethead]

Thanks for bringing this one up.  This fills a bit of a hole for me, so i'm goign to give them a shot.

[NorthGuy]

Mine doesn't look that nice is because it uses 4 mil process and a lot of non-IPC standard, extremely small pads (for instance, my 0402 footprint is 0.6mm*1.0mm). My design is approaching their limit.
Also, via-in-pad without plugged vias look inherently nasty, but it works.

This is a strange board indeed. Does the board impersonate a QFN chip?

[asmi]

Mine doesn't look that nice is because it uses 4 mil process and a lot of non-IPC standard, extremely small pads (for instance, my 0402 footprint is 0.6mm*1.0mm). My design is approaching their limit.
Also, via-in-pad without plugged vias look inherently nasty, but it works.

Mine uses 0.1 mm process. As per QA certificate, the smallest trace is 4.1 mil, and smallest spacing is 3.7 mil. The board also contains few dozens of 0201 caps, its' pad size is 0.3x0.35 mm IIRC.
After thorough inspection under x20 stereo microscope, the only thing I could find was ever so slightly offset soldermask (less than 0.025 mm offset) - I could only see the offset under microscope. Everything else was perfect!
These boards are the best I've ever seen - even very small silkscreen letters (0.64 mm height) is quite readable. Comparing them to regular "$5 boards" is just silly.

[asmi]

Can you post a copy of your report? I would like to see if the company name matches.

I will post it in the evening as I don't have them with me at work. Can you please post yours? Just want to compare reports as I noticed one thing odd in my report - my report says boards are thicker than they actually are according to my measurements.

[asmi]

I can live with 5mil trace anyway, so it's even better.

BTW, I missed 5 mil part. Keep in mind that with 5 mil traces you can not do this:


You need 4 mil/0.1 mm traces for that, and I think this alone is a reason enough to go for 0.1 mm traces.

[NorthGuy]

I can live with 5mil trace anyway, so it's even better.

BTW, I missed 5 mil part. Keep in mind that with 5 mil traces you can not do this:

You need 4 mil/0.1 mm traces for that, and I think this alone is a reason enough to go for 0.1 mm traces.

That is true. But often you can work out something. For example, look at the dogbone just south of the area you marked in red. If you turn it right 45 degrees (so that it becomes horizonral), it'll give the room for the trace to escape. You could use this space to split the two side-by-side traces giving each of them its own spot. You could do similar thing to the dogbone on the top, or you could put a trace into the slot left of the dogbone.

[asmi]

That is true. But often you can work out something. For example, look at the dogbone just south of the area you marked in red. If you turn it right 45 degrees (so that it becomes horizonral), it'll give the room for the trace to escape. You could use this space to split the two side-by-side traces giving each of them its own spot. You could do similar thing to the dogbone on the top, or you could put a trace into the slot left of the dogbone.

This will likely screw up escapes for internal layers, as they go between dogbone vias right under BGA balls. Having ability to route two traces between balls/vias gives a lot of flexibility and help to reduce amount of layers needed for full breakout. This is especially important for DDR3 DQ byte groups as all traces within a group needs to be routes on the same layer to minimise DQ-to-DQ skew. If you take a look at my gerbers, you will see that I route two DQ byte groups on adjacent layers, and each group is routed on the same layer. For ADDR/CTRL lines this is not that critical, but still I tried to account for that by making traces on layer 3 slightly longer than on layer 4 (as z-height of layer 3 is less than that of layer 4).
You can fully route out 6 outer rows in just two layers - first 3 on top layer, and other 3 on the next internal one (since there will be on breakout vias for outer 3 rows as you break them out directly on the top layer), where with just one track between balls/vias you will need 4 signal layers to achieve that (2 rows on the top, 2 more on the first internal, the rest will allow only one row per layer due to presence of dogbone vias from previous layers - unless you go for blind vias). So 2 layers saved right here!

[PhillyGreg]

Thanks for taking the time to take all the photos and write it up!

This will likely screw up escapes for internal layers, as they go between dogbone vias right under BGA balls. Having ability to route two traces between balls/vias gives a lot of flexibility and help to reduce amount of layers needed for full breakout.

It's also a big help with the MGTs and Diff pairs. I've got 32 sublvds pairs to break out on the Artix (484 pin). And since bank 14 is needed for configuration, I can't use it for HiSPI, leaving 15 and 16.
It's a tough job getting that many pairs out, with 5 mil trace. I've routed myself into a corner more times than I can count at this point. (Note I'm referring the the FG package, the FB requires smaller pads)
In some cases a second row pair has to split either side of a VSS ball and via. With 4mil one pair fits either side of the ball.
(I don't have m laptop with me today or I'd post a couple screen grabs of the design rule comparison I've been doing to see what direction to go.)

Also package size is a big factor, on a 256 or even 484 on 6 layers, and mostly lower speed signals you can get by with 5mil traces and get a decent fanout.
On the 900 pin package, unless you have layers or pins to burn, 5mil isn't going to be fun.

I agree with NorthGuy, in quite a few cases you can route around it and when it costs $400 - $1k a pop I do.
At $200 ish, my time and sanity is well worth the premium.

[marshallh]

The real test is to see if you can still get good quality after the fourth or fifth order.
In my experience nearly every chinese fab starts to screw you around that time, you have to go elsewhere for a while.

[NorthGuy]

You may be right. I can get 1-board 6-layer 5 mil order from PCB-Pool for about $130, which is $650 if I go through 5 iterations until it works as I wish. When I looked at different quotes for 4mil couple months ago, it was around $600 for 4mil process, which means $3k for 5 iterations - quite a bit more expensive. $230 is certainly not as bad. I still have my reservations as to the reliability of the process - last thing you want to deal with is some sort of internal short or a broken trace. 5 mil (or 6 mil which works just as well) looks much more reliable to me, but I may be wrong here. I started design with 6 mil rules, originally with a 256-part part, but since then I moved to 484-pin part. It's not too late to move to 4mil ...

[asmi]

I still have my reservations as to the reliability of the process - last thing you want to deal with is some sort of internal short or a broken trace. 5 mil (or 6 mil which works just as well) looks much more reliable to me, but I may be wrong here. I started design with 6 mil rules, originally with a 256-part part, but since then I moved to 484-pin part. It's not too late to move to 4mil ...

They do 100% flying probe testing, so you can be sure that at least electrically they will be good. I can see the evidence of such test under microscope - there are dots on the pads where probe touched them.

[NorthGuy]

They do 100% flying probe testing, so you can be sure that at least electrically they will be good. I can see the evidence of such test under microscope - there are dots on the pads where probe touched them.

On your pictures it looks very good, at least for outer layers.

It gets worse with 484-pin parts. Balls are getting bigger and require 20-mil wide pads (as opposed to 16-mil for yours). So, it is only 4 mil between pads and traces. Xilinx even suggests 3 mil, but this is a miscalculation.

But bank 15 is 10-row deep. Sticking 2 traces between balls would save a lot of work ...

[asmi]

On your pictures it looks very good, at least for outer layers.

It gets worse with 484-pin parts. Balls are getting bigger and require 20-mil wide pads (as opposed to 16-mil for yours). So, it is only 4 mil between pads and traces. Xilinx even suggests 3 mil, but this is a miscalculation.

But bank 15 is 10-row deep. Sticking 2 traces between balls would save a lot of work ...

If you open my gerbers, you will see a fair amount of 0.1 mm (3.9 mi) traces and spacings under BGAs, even if in some cases it didn't have to be that way. I did some random electrical tests of these traces, and there was no problems - shorts or opens. Not that I don't trust manufacturer's test, it was more of my way to shut up internal sceptic in me
The point is - if and when I will come around to designing another board of similar caliber, I will have absolutely no qualms going for 0.1/0.1 mm trace/spacing. It is too big of enabler to pass up to. Just try it out yourself and you'll see why I think that way.

Oh - and another practical consideration. This was the first fab I used that managed to manufacture solder stops between pins of QFNs with 0.4 and 0.5 mm pitch, as well as between pins of 0804 4-resistor arrays - and in some cases these stops are just 0.1 mm wide! This is a BIG help for soldering, as you no longer have to be super precise with solder paste dispensing. For example, yesterday during assembling power supplies part of this board I accidentally moved stencil and smeared some solder paste so that it looked more like a line along QFN pins, but it was late in the evening so I decided to give it a try without fixing (normally I'd fix this with sharpened toothpick under microscope). After reflow it came out perfect, with zero bridges - and all of that thanks to solder stops! Even though one of QFNs (tiny 3x3 mm DC-DC converter TLV62130) came out a bit misaligned - still zero shorts.

So getting small traces right is good, but getting quality solder mask is equally important - especially if you will be assembling boards by hand. Also I ran one board through two full-duration LF reflow profiles - and solder mask didn't change color (like SM on many cheap boards tend to) - I couldn't tell it apart from fresh board. Like I said, I'm very impressed by the quality - not just in copper, but overall manufacturing. It's kind of hard to show in photos - it just "feels" right. Maybe they will screw me over one day - but until that day comes, I give them a benefit of the doubt.

[asmi]

Well it looks like I will have to give them another order much sooner than I expected I just realized that I've made a FAIL of EPIC proportions which rendered board unusable!!

[asmi]

Here's my PCB report:

Company: Uniwell

Sections: final inspection report, e-test report and microscopy report.

Yes, mine's the same, except I've got one more page with "Polar" logo on it with impedance tests results.