Electronics > Manufacturing & Assembly

Partial depth PCB holes

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Eamonn Harter:
Due to space constraints on a PCB design, I have a need for partial depth holes in a 2 layer board.  This would be in a 62mil thickness 2 layer board, and the finished depth of the holes would be 45mil.  Each hole would be 26mil in finished diameter and centered in a pad of at least 50mil diameter.  At this point, I am unsure if they could be finished with copper plating or not, but my PCB fab says that they can manufacture partial depth holes.  Does anyone have experience with partial depth PCB drill holes?  And how would I enter this information into Altium Designer?  I could use a fabrication note, but would rather have a more solid way to enter this information directly in the Gerber and NC drill files so that the Chinese manufacturer knows exactly what to do.  I read somewhere on here that you have to enter this into the PCBDOC files and it's not possible to have it in a library component.

The specific component that will fit into the partial depth holes is a press-fit Mill-Max pin.

What you are talkign about is a 'blind' hole.     This technique is often used on multilayer boards for vias, so they do not go all the way through the board.   You can also have buried vias.

Altium will let you set up vias that go between various layers.. However since your board is only two layers,  there is only one drill pair.       

I have never heard ( though never asked for ) of what you are asking for.. I suspect it will be expensive, and the accuracy of the Z depth for the holes will be interesting.. It would have to be milled.

I think in AD17+ they added blind holes as an option, without having to set up drill layer pairs?  I haven't touched it so I'm not sure.

Otherwise, the canonical way to represent them, in Altium, I think, would be to set inner layers, at the depth desired, and use vias on those layer pairs.  You would then add a fab note that the inner layers are not to be fabbed, that they are intentionally empty, and that the design is to be fabricated as a 2-layer design with blind holes of specified depth.

No, I don't think there's a streamlined way to do this.  It would be nice to generate extra fab outputs, say a drill file for thru holes, a separate one for blind holes including correct depth commands, and so on; and you can probably do this, but how it's going to be represented in the EDA files, and if there are unnecessary side effects (like including layers you don't want), dunno.

Ed: and yeah, for a pin like that, you'd normally have a thru hole, and that's that.  Mind that the minimum depth, to the shoulder of the hole (the drill will have a conical tip, or if an end mill is used, it will have some corner radius), has to be at least the maximum length of that pin.  With a tolerance of maybe 5 or 10 thou depthwise (don't expect miracles -- do check with the fab to see what their capability is), the typical hole will likely break through the other side of the board anyway.  If you need a sealed hole, consider using the next size thicker PCB (typically around 0.093" / 2.4mm?), or a soldered pin. :-+


Why don't you just punch through? For the pin you chose, it's intended mounting is to be compressed sideways to fix the knurl in place. It doesn't matter if you punch through or half drill.

There is such a process, called back drilling, which is a post-fabrication milling/drilling process to get rid of excessive through hole plating, mainly used to reduce high speed signal stub length for better SI.

Another way to do it is to use a special drill size, and spec it as part-drilled in the tool list.


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