Author Topic: Routing power traces through unused i/o pins  (Read 2318 times)

0 Members and 1 Guest are viewing this topic.

Offline Psi

  • Super Contributor
  • ***
  • Posts: 8442
  • Country: nz
Routing power traces through unused i/o pins
« on: November 27, 2013, 02:58:07 am »
Hey guys,
On a PCB i'm making I really want to get MCU VCC to the other side of the MCU for the reset pullup, but the layers and layout is very constrained.

I'm thinking about routing the VCC trace through an unused i/o pin on the MCU and it got me thinking about the general issues that might cause.

The only three i can think of are

- Depending on layout, current draw in the trace, and trace resistance it maybe possible that the i/o pin voltage could be higher than the voltage at the VCC pin.
This could cause power to backfeed into the i/o pin with unpredictable results.
(In my circuit this can't happen, as power goes to VCC first, then off through the i/o to the reset pullup resistor)

- Accidentally coding the MCU to set that i/o pin to output low, which would short it out.

- Bad practice. (or is it?)

Can anyone think of others?
« Last Edit: November 27, 2013, 03:02:13 am by Psi »
Greek letter 'Psi' (not Pounds per Square Inch)
 

Offline kizzap

  • Supporter
  • ****
  • Posts: 477
  • Country: au
Re: Routing power traces through unused i/o pins
« Reply #1 on: November 27, 2013, 03:23:31 am »
One thing I have seen people do is leave the soldermask over the pad of the pin, thus isolating the pin from the pad. Depending on your application this might be a usable solution (dependent on vibration, etc.)

If the pin 100% will never need to be used could you break it off?

-kizzap
<MatCat> The thing with aircraft is murphy loves to hang out with them
<Baljem> hey, you're the one who apparently pronounces FPGA 'fuhpugger'
 

Offline digsys

  • Supporter
  • ****
  • Posts: 2208
  • Country: au
    • DIGSYS
Re: Routing power traces through unused i/o pins
« Reply #2 on: November 27, 2013, 04:59:26 am »
Quote from: Psi
- Accidentally coding the MCU to set that i/o pin to output low, which would short it out.
- Bad practice. (or is it?) 
Absolutely bad practice !! Even the idea of cutting the pin is fraught with fear :-)  ... c'mon, you can do it !!
Chuck a via or two near it or 1 trick I use -  add a 0R 1/8W resistor to the design. That way you can pick up Vcc a greater distance away.
Hello <tap> <tap> .. is this thing on?
 

Offline Psi

  • Super Contributor
  • ***
  • Posts: 8442
  • Country: nz
Re: Routing power traces through unused i/o pins
« Reply #3 on: November 27, 2013, 05:44:33 am »
yeah, i wont be cutting the pin off, or leaving soldermask over it.

But having +5V on an i/o pin seems fine otherwise?
Greek letter 'Psi' (not Pounds per Square Inch)
 

Offline Psi

  • Super Contributor
  • ***
  • Posts: 8442
  • Country: nz
Re: Routing power traces through unused i/o pins
« Reply #4 on: November 27, 2013, 05:55:34 am »
digsys was right, i had another look and found a way that hadn't occurred to me before.

So all sorted now, and no i/o pin pass-through :)
Greek letter 'Psi' (not Pounds per Square Inch)
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf