Using PCB Fill Zones For Power

[MxWinters]

Hi everyone, I have a quick question, I am designing a PCB to send off to JLCPCB to get made for a project, I have finished the schematic and PCB designs and its ready to send off. Before I do though, can I ask if using the infill zones to send power to various components is acceptable? For example in my design the VIn pin on the power inlet header is connected to the top infill zone (red circle) and the IC's VCC pins are the connected to that top infill zone to get power. The chip's GND pin are then connected to the bottom infill zone (black circles). KiCad hasn't thown up any errors by me doing this and the design rule checker comes back with no errors or warnings but I was just wondering if it is good engineering practice to use the infill zones for power? I'm only drawing about 250mA peak at 5 volt through the infill zones so current shouldn't be an issue. 

Hopefully the attached images shows what I mean.

Thanks for your time, Stay Safe
Morgan

[ataradov]

I would not do that. It is confusing and also does not make a lot of sense.

Use regular traces and flood fill the reset with the ground.

Having power planes is a common practice, but only on multi-layer boards with dedicated power layers.

[jmw]

I've done top pour = VCC, bottom pour = GND on 2 layer boards. Sometimes you want VCC everywhere, and it gives you maybe a few dozen pF between VCC and ground depending on the board size. There's no rule that says both sides have to be flooded with ground.

[Mangozac]

it gives you maybe a few dozen pF between VCC and ground depending on the board size.

Which has no real benefit in typical applications.

There's no rule that says both sides have to be flooded with ground.

There's not, but I personally still wouldn't do it unless there was a specific need. Considering that it's standard practice to connect pours to GND all you're going to achieve is creating confusion.

[MarkR42]

Absolutely yes you can and on multiple layer boards (4 or more) using a whole plane for power and another plane for ground is very common, then you usually don't need any power traces (for pth parts) at all.

[Siwastaja]

Usually you won't flood fill an entire layer with power on just 2-layer PCB but if you have very little routing why not. A power distribution board that just connects a few connectors (and maybe a few bulk capacitors) together but has little other circuitry would be a typical example where I have done a 2-layer design where one layer is ground fill and another power fill. This can be also called a "DC link sandwich", there is not that much coupling capacitance but that's not the point, the lack of inductance (and easy mounting of capacitors) is.

Typical and good way of using pours/fills for power is to draw the polygon over some limited area and let the EDA tool handle all those tiny details that take a long time to manually draw, but still not waste the whole layer.

"Confusion" is a strange argument against it, given how usual power planes and relatively large power fills are (for obvious reasons). If you just assume any large copper area is ground, you are assuming wrong. OTOH, if you are carrying some hundreds of mA between devices that have proper bypass caps in them, a full powerplane can be called overkill, a simple wider track would work the same.

[NorthGuy]

I think having a ground plane on a 2-layer board is very convenient. Whenever you want to connect something to the ground, you just place a via.

Of course, if you have lots of routing then it'll be very little left of your ground plane. Then you struggle to keep the ground plane contiguous, and it becomes nuisance rather than help.