AD4630-24 new SAR ADC from Analog Devices

[KT88]

I was wondering about the DS-claim "CNV-pin needs low jitter clock to achieve ADC-specs" and how to fulfill it.

This is important in particular for frequency domain applications not so much if one is interested in DC (averaging over many samples).
Considering a slope: if the sampling moment is off the amplidude has changed in the meantime.
This becomes more important with higher frequencies and resolution (more LSBs are affected).

[MiDi]

Little sister AD4632-24 with 0.5MSPS released, sharing same datasheet.