Electronics > Metrology

ADR1001 - Ovenized Voltage Reference System

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Noopy:

--- Quote from: imo on March 20, 2023, 02:28:37 pm ---@Noopy: TCHIP pin - that pin is not indicated in the known pin description - there is the "NC".
In the LTSpice model there is a signal called TCHIP, which outputs the chip temperature in Celsius (at least it is my current understanding).. What that pin 2 actually does then?
Weird.. :o

PS: it goes to the T transistor near the zener, but the signal follows also somewhere around the zener (and there is a resistor hanging on it as well)..

--- End quote ---

In my view pin 2 is the pin to check the temperature with the transistor T. Put a Pull-Up or a current source there and you get the Vbe of the transistor.
In the schematic of the Eval-Board there is just n.c., perhaps because it´s just for internal use...  :-//

Take a closer look at the transistor, it´s just connected to TCHIP (and to GND). The two metal layers are hard to read.

branadic:
Thanks to e61_phil for sponsering the ADR1001 for teardown and thanks for the teardown images. I see what I have expected to see, a single die solution, which confirms that ADR1000 and ADR1001 drift behavior is not comparable.

-branadic-

magic:
Single die and different physical structure of the reference core than ADR1000.


--- Quote from: Noopy on March 20, 2023, 04:17:34 pm ---In my view pin 2 is the pin to check the temperature with the transistor T. Put a Pull-Up or a current source there and you get the Vbe of the transistor.
In the schematic of the Eval-Board there is just n.c., perhaps because it´s just for internal use...  :-//

Take a closer look at the transistor, it´s just connected to TCHIP (and to GND). The two metal layers are hard to read.

--- End quote ---
That's what it looks to me as well, a simple thermal diode between TCHIP and REF_GND. Not functional without external bias and certainly not calibrated centigrade.

The TCHIP trace comes from north in the lower layer and connects directly with the base and collector (south).
The REF_GND trace comes from south in the upper layer, jumps through a via to the lower layer near the emitter and connects with it.
The crossing of these two traces is why it looks confusing.


Similarly confusing are the connections from BUF_F. I think it first goes north in the upper layer, then jumps to the lower layer and moves south. Near BUF_F pad it branches west in the upper layer to the output stage and also continues south to the feedback network. Hence a section of metal trace and of course bonding wire and pin are outside the loop.

The output stage looks like a bunch of paralleled emitter followers powered from VIN, so not exactly LDO. The model is wrong.


The unconnected pad under 5V divider output appears to be 2.5V. Maybe there is some lineup expansion coming ;)

iMo:
Isn't that bulk material sapphire? SOS technology perhaps?
And what about the resistor's material?

magic:
Doesn't look much different from any standard nocomplementary bipolar process with NPNs and lateral PNPs.
Probably junction isolation, I think the substrate is grounded to HTR_GND and if I'm right this will need to be the lowest supply rail in the circuit.
It could be lower than REF_GND in particular. Earlier, somebody with apparent insider knowledge reported that BUF_GND can also be lower than REF_GND and -5V output from the buffer amp is officially supported.

Some sort of metal film resistors are deposited on the surface and trimmed by laser; Analog has been doing this since forever.

Visually it's all very similar to their older AD58x references from late '80s or the ADR1000.

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