Electronics > Metrology

ADR1001 - Ovenized Voltage Reference System

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This reverse biased pnp at D1 anode seems strange to me. I first thought it is a current sink but as you stated it doesn´t seem to act like this. But what else does this thing? Some kind of overvoltage protection?  :-//

That there is no opamp fits with my analysis. That puzzled me a little. Have to think about that...

West of the reference cell is a bias generator. I agree with that too.

There is no absolute need of an op-amp for the voltage output. The normal circuit uses the base votlage of the Q1 resp. Q2+Q3 transistor as a more or less fixed referene point. There is not real issue in just using a seprate transistor in a high gain amplifier. A more specialized amplifier can be a bit simpler than a full single supply OP-amp.
I am not sure of the process allows for good PNPs, that maybe needed for a single supply OP-amp.

The PNP found withput an obvious purpose could be a thing for the start-up, e.g. to prevent a stable state with zero current.

Sounds reasonable, thanks!  :-+

I was also surprised with the low count of transistors on the die, I expected much more stuff there TBH, but indeed you do not need full-fledged opamps for dealing with a rather limited voltage/current ranges. Would be interesting to see the schematics of the entire chip, even I doubt we will see it in the upcoming DS.

I expected ADR1000 with resistors integrated on-die, some cheap R2R dual opamp from Analog and a bunch of wires jumping back and forth.
Maybe the package is too small for that. Such design would also need a few MLCCs.

The reference loop is very simple. I haven't looked at thermal regulation, but there aren't too many transistor there. The buffer opamp is oddly complex, more complex than the usual OPwhatever7 we have seen in the opamps thread.

No way in hell they will bother reproducing full schematic in the datasheet. Not sure if I will bother either, but you can ask if you have specific questions. Or trace the circuitry yourself.

Regarding the "weird" pins,
TCHIP is a thermal diode, as discussed. Beware that it dumps its bias current to REF_GND, so using it may increase reference voltage by some μvolts.
PWRGD is an open collector output, its emitter also goes to REF_GND. According to eval board wiki, it only turns on during warm-up and turns off when the chip hits operating temperature.

--- Quote from: Kleinstein on March 28, 2023, 05:43:03 pm ---I am not sure of the process allows for good PNPs, that maybe needed for a single supply OP-amp.

--- End quote ---
They could put a whole LT1013 there. But what's the point.

The Q2+Q3 stage has ~200x gain by my estimation (any other opinions?), so Vbe stability and thermal tracking of the next stage can be 200x worse than Vbe stability of Q2+Q3.


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