EEVblog Electronics Community Forum
Electronics => Metrology => Topic started by: iMo on September 23, 2022, 09:57:06 am
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FYI - attached a short presentation from ADI on the upcoming ADR1001..
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What a time to be alive. :)
Considering the fact that its using a LCC-package and the time it apparently takes for the ADR1000AHZ to reach stability and feel cozy, i assume it wont replace Fluke 732s and PWMed LM399/ADR1399 any time soon.
Maybe more suitable as a less stable version of the LTZ1000 for stuff like ADCs/DACs such as AD5791 and AD4630-24.
Opinions on it and its purpose?
But it will surely be interesting to see what exact specs it claims. :popcorn:
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We should wait on the DS..
Btw, is that a typo in the internal schematics? I would wire it this way..
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Finally the gossips around ADR1001 become reality. It seems that AD follows their initial roadmap.
Lets wait one more week and see the datasheet - it is still 21th of September :-)
Personal for me ADR1001 and low cost LM399/5V makes more sense.
They can be connected to the modern world as opposed to dinosaurs versions LTZ1000/LM399/ADR1001/1399
They are also attractive from business perspective - high quantity mass production
@Echo88 - What about redesigning of our fresh HPM7177 circuit?
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I think they have made the ADR1000 more or less obsolete at this point because why would you need it. LTZ1000/A's are still in production for those who want that and ADR1001 has all the stuff you want all in a juicy ceramic ppm safe package
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So far the performance in the ceramic package is still to be proven in real life. Even the ADR1399 and ADR1000 are still relatively new and so far the noise data look good, but the few results shown here about longer term drift (still hardly 1 year) are not that great. So far the ADR1000 is nice for low noise, but if one needs low long term dirft the LTZ1000A is still the safer bet.
For a heated reference the ceramic case is also not ideal as it may need relatively high power compared to the TO46 / TO99.
The ADR1001 is also likely quite expensive.
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..For a heated reference the ceramic case is also not ideal as it may need relatively high power compared to the TO46 / TO99.
The ADR1001 is also likely quite expensive.
I think the price would be the decisive factor on the ADR1001 success. Provided it is a single die solution the price could easily be at the "level of the ADR1000". In that case the ADR1001 will be the game changer even with a little bit less performance, imho.
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The ADR1001 is also likely quite expensive.
AD roadmap showed LM399/ADR1399 5V version too
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(based on speculation) I think the Adr1001 will cost roughly 25 to 35 euro more than adr1000. May be different with adi price hikes.
Some of my ltz1000 references use around 16mA the Adr1001 will use under 40ma at room temp with default settings. But obviously that varies with setup and board I would e be surprised if you can get that comfortable down to sub 25mA (all at 12v)
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For the heater the ADR1001 also has one advantage, that may save some power: the transistor to drive the heater is internal and also contributes to heating. In normal steady state the voltage at LTZ1000 the heater resistor is more like in the 5 V range. So quite some voltage is lost unused. This especially helps at the low end with a relatively low set temperature and limited abient range. To keep the resistor drift low, a high set temperature is anyway not that attractive.
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For the heater the ADR1001 also has one advantage, that may save some power: the transistor to drive the heater is internal and also contributes to heating..
The sim of the HEATER vs TRANSISTOR power loss for set 55C and Vcc=12/15/24/30V.
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I think they have made the ADR1000 more or less obsolete at this point because why would you need it.
Probably not - the aging of the internal resistors could possibly show a slightly higher LTD compared to the best discrete resistors...
I would expect the ADR1001 to be positioned between the ADR/LTZ1k and the ADR1399/LM399 in both (system-) cost and performance.
Just my 2 cents...
Cheers
Andreas
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the adr1k1 has more or less the same drift as the ADR1000 since they are almost the same. Which is quite severe in first few hundred hours so compared to the ltz1000.
The 5v output has the same drift over the first 1k hours dont know much beyond that though but i think will take longer to plateau than the 6v6 output.
I'd love to show some things but you will be more satisfied later on if I leave you blue-balled for now...... :-+
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I think there are two duplicated ADR1001 rumors messages in metrology section
https://www.eevblog.com/forum/metrology/adr1001-ahz-spotted-in-analog-devices-wiki-post/ (https://www.eevblog.com/forum/metrology/adr1001-ahz-spotted-in-analog-devices-wiki-post/)
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Don't know about the part, but the EVAL board is rather expensive.
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Those official eval boards are always much more expensive than their actual BOM. They're more oriented toward engineers looking to implement the targeted device by the thousands and have lots of documentation surrounding them.
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Anyone from ADI is here? can you send me a PM?
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My experience has been that Analog expects “real” engineers to engage directly on their website, www.analog.com (http://www.analog.com), where they have forums, free samples, etc etc.
To be eligible you must work directly in the electronics industry IIRC.
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Those official eval boards are always much more expensive than their actual BOM. They're more oriented toward engineers looking to implement the targeted device by the thousands and have lots of documentation surrounding them.
When we order eval boards in the company, especial from ADI, we get them normally for free. This may depend on your contact to the sales engineer as well. We of course tell them expected money generated in series production with the particular project. But even, if you have to pay for the eval boards, it is an design advantage, as you get a functional application with the part you plan to use for your application.
Guido
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Neat to know, and that makes sense. The chemistry field is the same way as the likes of Sigma Aldrich. Institutions and Unis practically get chemicals for free cause they know they will make their money tenfold back from the recognition.
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In a commercial environment I’ve often been happy to order expensive dev boards. In general, it was about time:
- I knew I could bodge together an existing product with the dev board for some new chips and see what happens
- I needed to choose between a shortlist of a few parts, so I bought dev boards for comparison
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I got one on order too.
Just want to see if anyone from ADI is in this forum.
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You have Adr1001 on order?
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Yes, the EVM, FAE helped to order it from ADI. Not sure when it will arrive...
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I haven't seen a picture of the ADR1001 EVM, but if they use the very same tinned banana jacks soldered to the board and the SMA connector as they do for the ADR1399, I wouldn't be too surprised to hear about the observed shifts, these are not proper connections for a voltage reference in this accuracy range.
-branadic-
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https://wiki.analog.com/resources/eval/adr1001e-ebz (https://wiki.analog.com/resources/eval/adr1001e-ebz)
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It has 2 banana for the vref sense , 5V and I think the gold SMA connector is 10V but I dont have the adaptor for it so I am running it off the front panel USB of my DMM7510 and testing it at the same time :-DD
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https://wiki.analog.com/resources/eval/adr1001e-ebz (https://wiki.analog.com/resources/eval/adr1001e-ebz)
Thanks, so let me repeat my statement, these connectors:
(https://wiki.analog.com/_media/resources/eval/0056732_2.jpg)
are not the proper choice for the application, neither in terms of mechanics nor in terms of t.e.m.f.. Hence I suggest to remove them and directly solder a proper cable directly to the board. I don't understand why they went away with the solution used on ADR1000 EVM
(https://www.analog.com/-/media/analog/en/evaluation-board-images/images/eval-adr1000h-ebz_angle-web.gif)
although Pomona 3770 are not perfect, but way better than the solution used here.
-branadic-
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so I am running it off the front panel USB
Hello,
my experience is: USB (cables), switchmode supplies (on the EVM) and uV stability do not fit well together.
I have observed up to 100uV shift due to EMI.
To check for EMI-influence try one of the following:
- touch the (isolated) cable between VREF and DMM. (one after the other and both together).
- you can also touch directly the Pins (perhaps with a thin wire to avoid thermal EMF).
- put your setup on a metal sheet (wiring close to the metal and DMM housing connected to the metal) to reduce influence.
- use battery supply (4 NiMH AA cells) instead of USB.
with best regards
Andreas
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so I am running it off the front panel USB
Hello,
my experience is: USB (cables), switchmode supplies (on the EVM) and uV stability do not fit well together.
I have observed up to 100uV shift due to EMI.
To check for EMI-influence try one of the following:
- touch the (isolated) cable between VREF and DMM. (one after the other and both together).
- you can also touch directly the Pins (perhaps with a thin wire to avoid thermal EMF).
- put your setup on a metal sheet (wiring close to the metal and DMM housing connected to the metal) to reduce influence.
- use battery supply (4 NiMH AA cells) instead of USB.
with best regards
Andreas
I Ended up using the from SMA connector, with a semi ridge cable that connects directly to the DMM (suspended in mid air), the thermal EMF effect is for sure there, if I touch the outer right of the SMA connector, the output will shift up and when I release it ,it will slow decay back to normal.
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These eval pcbs had no effort put forward to optimise the precision and stability. They are literally for plug and play to see if the system they are attached to would even work.
There will probably be other eval boards/applications notes made for them to showcase how they can be optimised and better utilised.
the main issue with these boards is the usb power supply. The noise it injects into the outputs far out weighs the adr1001's noise. The connectors are all TEMF nightmares as well. So if you want to improve the boards remove the connectors and use an external low noise psu
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These eval pcbs had no effort put forward to optimise the precision and stability. They are literally for plug and play to see if the system they are attached to would even work.
If you read the wiki page carefully you find this comments about the power supplay options:
"POWER SUPPLY CONSIDERATION
Use a USB-C charger or other USB-C source to power the board. You should see a Green LED. Alternately, 5V can be applied between VUSB and DGND from a bench supply. This will power the isolating LMT8048 module, providing isolated power downstream. Alternately, the downstream regulators can be back driven at VPRE/AGND (Max 20V) or at V+/AGND (Max 16V). AGND is the Reference ground, so this approach is not isolated."
This means you could see the USB connector and the isolation as an optional bonus.
Besides that the reference itself is put on a milled out island to isolate it from mechanical stress.
With a little bit of grounding and shielding pretty much every level of noise performance should be achievable if an appropriate power source is used.
One last note: An EVAL board is meant to (more or less) quickly evaluate the functionality of a part which this one clearly does, if you ask me...
If a demo circuit is meant to deliver the full performance one would call it a reference design which would in case of such a precision reference more circuitry like EMI filters, output buffers or a specific ADC / DAC...
Cheers
Andreas
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Hi All,
Been having EVM for about 2 weeks now.
1. If you receive them early, with parts, some of the pin 1 marking was wrong so if you want to solder any of them better watch out for it..
2. There is 1Mohm resistor between REFGND and DGND, It is causing strange EMI problem even when I wave my hand near the board, in the end I have to bridge them and it is very stable now.
Regards,
Li
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There is the C11=1uF capacitor directly wired against ground at the 7V-->10V/5V buffer's output, hmm..
Also the ISET resistor's value is almost complete outside the package (R8=120ohm).
And the C13=1uF is wired from the buffer's input to the ground.. Interesting.
Let us wait on what the datasheet says..
PS: below my attempt to understand the wiring - so at the 7V output there is a divider feeding a gain=1 buffer.. Is the EVM's output 5V only? [it should be..]
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The two ill be getting will be the same. The text printing is off by 90 degrees. With the ones you have are the pins still the rigth orientation? with the long pad being pin 1?
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There is the C11=1uF capacitor directly wired against ground at the 7V-->10V/5V buffer's output, hmm..
Also the ISET resistor's value is almost complete outside the package (R8=120ohm).
And the C13=1uF is wired from the buffer's input to the ground.. Interesting.
Let us wait on what the datasheet says..
PS: below my attempt to understand the wiring - so at the 7V output there is a divider feeding a gain=1 buffer.. Is the EVM's output 5V only? [it should be..]
EVM is 5V only, if you want 10V you have to cut traces....
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These eval pcbs had no effort put forward to optimise the precision and stability. They are literally for plug and play to see if the system they are attached to would even work.
If you read the wiki page carefully you find this comments about the power supplay options:
"POWER SUPPLY CONSIDERATION
Use a USB-C charger or other USB-C source to power the board. You should see a Green LED. Alternately, 5V can be applied between VUSB and DGND from a bench supply. This will power the isolating LMT8048 module, providing isolated power downstream. Alternately, the downstream regulators can be back driven at VPRE/AGND (Max 20V) or at V+/AGND (Max 16V). AGND is the Reference ground, so this approach is not isolated."
This means you could see the USB connector and the isolation as an optional bonus.
Besides that the reference itself is put on a milled out island to isolate it from mechanical stress.
With a little bit of grounding and shielding pretty much every level of noise performance should be achievable if an appropriate power source is used.
One last note: An EVAL board is meant to (more or less) quickly evaluate the functionality of a part which this one clearly does, if you ask me...
If a demo circuit is meant to deliver the full performance one would call it a reference design which would in case of such a precision reference more circuitry like EMI filters, output buffers or a specific ADC / DAC...
Cheers
Andreas
Hi, I have receive my 2nd EVM so I am going to by pass the USB supply and see if I can have a better result.
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Anyone here modified the board to 10V output ? I finally picked up my 2nd board under a tree near B5 and cut the BUF_S to BUF_F and made the datasheet recommended adjustment. the output was 9.888XXXV which is far from the spec. I dont really want to switch out parts... so if anyone made the same mods. let me know.
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Looks like the output may be loaded possibly what exactly did you change?
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Looks like the output may be loaded possibly what exactly did you change?
I cut the BUF_S that was connected to BUF_F, connect it to TP7 and connect TP6 to GND to form a 10V .
The output is not loaded , it is measured from a DMM7510 and I took the setup to ADI and verified the same result...
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I would also disconnect the 7->5V divider (R1/R2), see below.
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You wont get 10V anymore this will result in 6.6V*2 because the op-amp divider is a divide by 2. The way to get 10v is to use the 6.6V to 5V divider and multiply it by 2
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You wont get 10V anymore this will result in 6.6V*2 because the op-amp divider is a divide by 2. The way to get 10v is to use the 6.6V to 5V divider and multiply it by 2
Divide by 2? A high time to see the datasheet..
Thus 4 resistors involved in 7->10V output??
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Thus 4 resistors involved in 7->10V output??
That is exactly what Eric Modica presented at MM2021:
You still have access to the 6.6 V raw zener output, which as we have verified has equivalent noise to the ADR1000. If you want to buffer that out to a 5 V converter compatible voltage you can huck up the ouput buffer to VDOUT and you have the worlds first absolut accurate ovenized voltage reference. If you would like to gain that up, if you would like 10 V for talking to a DAC or to your own home roled converter, you can use this trim divider here, R3 and R4, to put this amplifier in a gain of 2 to get 10 V out.
-branadic-
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This is as per the datasheet specifically the resistors are matched to 0.05% typical
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Haven't seen an official datasheet yet, but LTspice already contains ADR1001 Spice model.
-branadic-
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The ADR1001 chip has arrived.. And nope, I am not going to send it to Noopy, yet.. :D
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So sad... :'( :'( :'(
;)
Where/How did you get it?
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Haven't seen an official datasheet yet, but LTspice already contains ADR1001 Spice model.
-branadic-
Really strange marketing and communication. Something similar happened recent wit ADR1399
First EVM, then leaked info than samles and last but not at least the datasheet.
The same think happened with ADR1001 - I assume that analog development are switched to agile. Documentation and final parameter will be published later on.
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There is none model in latest LTSpice (for Win64). You may find the model in the "beta version" for win64.
PS: (the ADR_OUT oscillates without the C3=1uF, 10nF or 100nF between BUF_F and BUF_S does not help either)..
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The need for the extra capacitor is likely due to the compensation of the output amplifier. It looks like this is not a normal, unity gain stable OP-amp. This is absolutely OK for this use and 1 µF at the output would not be a problem. There is still the question if this applies to the actual chip or is only a model thing.
Considering the compensation, this makes me think how they get stability for the reference circuit itself. The LTZ1000 circuit usually needs at least 2 (usually 3) capacitors for the compensation to make it stable. Usually the capacitors are quite sizable (e.g. 100 nF) and would be hard to integrate to a chip. For the actual reference it may work with a modified compensation of the internal OP-amp. Without those capacitors the internal control loop would likely be somewhat different. This may effect the higher frequency noise - though usually not a thing to worry about.
The tricky part could however be the temperature control loop. This part includes a rather long time constant corresponding to the thermal loop and this would be really tricky to implement with the small on chip capacitors. The thermal loop would anyway be different with most of the heate power from the transistor and not a resistor. So the thermal part will be different from the LTZ / ADR1000.
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Below setting the REF_TEMP via the upper resistor in the 10k/10k divider.
The resistor values from 1k to 10k step 1k, the lowest temperature with 1k.
With 100nF at ADR_OUT it stops oscillate, btw.
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And R_ISET resistor (100-200ohm step 10ohm) vs. ADR_OUT at 59degC.
The higher the value the lower the output voltage.
PS: aprox -160uV/ohm..
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Recently i discovered oscillation in a DIY reference output buffer. There was a large cap on the amplifier output, but in my case with a small resistor 51R between the amplifier output and the cap. While there was no oscillation visible on the cap (reference voltage output), i found a very small AC signal on the amplifier output, maybe 100 or 200 uVss, hardly visible on the scope. First i couldn't believe it and began measuring Gnd and Vcc in various places, to see what "no oscillation" looks like. But finally i decided there was oscillation and modified compensation to fix it.
And it's somewhat plausible as those amplfiers usually include a miller type compensation inside which gives near 90° phase shift at higher frequencies. Then the output stage with that large cap gives another 90°, so it's an oscillator. Of course if you omit that 51R resistor, you won't have a chance to see the oscillation on a scope, but it may still be there.
Don't know how a 20 uV high frequency oscillation affects the input parameters of an operational amplifier. I'd guess it may cause some uV of offset shift.
Regards, Dieter
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Out of curiosity I've tried to model the experiment with the 120ohm ISET resistor (https://www.eevblog.com/forum/metrology/ultra-precision-reference-ltz1000/msg625785/#msg625785) janaf made 7y back with his LTZ1000..
The model shows -258uV output change with the +1.2ohm delta (janaf's measurement was -91uV @7V).
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Still looking for the DS..
Especially I want know what is ADI's recommendation for those 3 resistors around the package. The 120ohms ISET (zener's current) one on their evaluation board is an 0805 smd VPG "foil" one. Why they have not placed that 120ohm resistor inside the package? Is it expected to set the zero TC with it?
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The 120 ohm resistor set the operating current. Some 0.5 to maybe 10 mA are realistic, depending on the power one is willing to spend on the reference. The low current would come with more noise and likely a slightly worse TC (at least for the non heated case). Very high a current also comes with problems, like more effect of lead resistance. Higher current will also need a higher set temperature.
So it makes sense to have the resistor external to have the choice.
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Below some internal resistances in my sample..
PS: a planned prototype board with a dead bug..
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Before I start to mess with my iron - here is the schematics..
Not sure whether to put the 78L15 on the board (the protoboard is 5x7cm large), also see below my idea on wiring all the GND paths (?).
All parts are TH, no smds at this stage..
The 120ohm will be a 220ohm trimmer at the very beginning of the experiment, the 2k67/10k temperature divider should set 59C (based on sim, provided it is enough as the dead bug wires will work as a heat-sink :D )..
Any feedback welcomed..
PS: UPDATE: schematics - added SET TEMP Jumper, fixed the heater currents, added an input filter and 4n7 at the output..
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Using a trimmer for the 120 Ohms is not really going to work well: the wiper resistance is usually not really stable. If one wants to test a few different currents it would be more like using more resistors in parallel with jumpers for some of them.
The capacitors for the heater current look a bit generous. One extra capacitor should be enough.
For the capacitance at the very output one should check the data-sheet / instructions on how much capacitance is needed / wanted. The old plan had 1 µF. Chances are some extra capacitance with ESR would help. I would at least plan for space for something like an additional 1 µF+10 Ohm loadging the output. A 1 µF electrolytic may already have enough ESR.
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I've made a change with the heater caps above. The trimmer will be not placed on the pcb, my idea is to set the output voltage (at 59C) as close as possible to 10V with the "120ohm" (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg4530551/#msg4530551), and then replace it with PTF or foil resistor. There will be place for 1uF at the output.
I've been using a protoboard so no problem with adding or removing parts, except the ADR1001, of course :D
PS: I tried to find the zero TC by varying the ISET in the simulation, with no success. It looks like the zener in the model does not have all the spice params required for TC.
PPS: the heater opamp is powered from VIN, imho, so the question is whether the C4 should not be grounded to power gnd..
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Changing the current changes more than just the absolute value of the voltage. It may work if you are lucky and get 10 V with a resistor close to 120 ohm. However the required current can also be rather high or rather low and this way compromise the TC or noise or power consumption (may than need a higher set point).
There should be no really high frequencies involved. So the exact position of the capacitor ground should not really matter.
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Yep, messing with the 120ohm is the main exercise for this week.. I want to see how the output follows the ISET (compared to above sim). The sim above shows some 0.2mV @10V per ohm around the 120ohm (and 2.2-4.4mA Iz for 200-100ohm).
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It works!!
The first smoke test shows 9.980414V 10.004074 output with still cold 34401A.
The package is below 50C (finger test, 21C amb) with the TSET divider as above.
1uF/63V alu capacitor at the output.
The zener current with R_iset=120.5ohm is 2.9mA.
EDIT: fixed the output voltage.
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If the wires are solid copper (not manganin) it looks like they conduct quite some heat away from the chip. Chances are one should run the chip with a relatively low set temperature.
An interesting point to observe may be the heater current. The 10 ohm resistor in the heater supply could be used for this, not just supply filtering.
Chances are one would see the effect of air fluctuations.
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Yep, the heater takes
50.5 11.4mA (amb 22C) with the setup in free air.
The heatsink wires are made of oxygen free copper :D.
An insulation around the package may help a little bit.
The voltage at the zener opamp's output is 6.58043V. It could be the TSET divider loads the output too much. Waiting on the DS..
+1V change at the input of the 78L15 makes no change at the output voltage (or it is less than 10uV).
PS: a pity they wired the buffer output directly to the output divider. There is still one pin NC (2), with the hot side of the divider on that pin 2 one could fine tune the output voltage then..
PPS: when I put my finger on the top of the package the current goes up to 57.2mA.
I replaced the 120.5ohm Iz set resistor with a 98.6ohm one, the output voltage went up by aprox 5.5mV, that is aprox -250uV/ohm (at 10V out). Close to the above simulation.. No chance to get closer to the 10V by altering Iz.
EDIT: fixed the heater current.
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Yep, the heater takes 50.5mA/14.54V (amb 20C) with the setup in free air.
Wow, that is quite some juice. Looking forward to see more results (t.c., noise, drift, ...) and of coarse datasheet plus availability of it.
-branadic-
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That heater current is on the free air at aprox 20-21C ambient, temp set to 59C (based on the model), bonded with around [EDIT: I finally have checked out the dia of the wire] 0.25mm dia Cu wires (the total cross section 0.98mm2). The package power loss P=U*I=0.2W..
Good for initial playing with without making a pcb, it should be done differently, sure.
I ran a measurement last night, but not worth of publishing it at this stage, the ISET resistor was 100ohm unknown TC from my junk box, it took around 5 hours to stabilize (the board put into an insulation box, 35 tbd C in the box created by the beast package, ambient aprox 21C), the last 8 hours it stayed within 1ppm @10V. It needs to be burned-in for at least 3000h, imho.
PS: I was told by Jaromir that this is the first documented home made board with ADR1001, so this is the first naive measurement, not worth of publishing.. :D
EDIT: fixed power loss.
Note: below measurement with 50mA heater current.. (wrong setting).
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Measurements such as t.c. and noise don't require burn-in before.
On the other hand I would characterize t.c. with the heater turned off to spot the zero t.c. temperature for a given current first. If the zero t.c. temperature fits your requirements of the final application (max. ambient temperature) with enough headroom for the oven control to operate, I would set the oven temperature exactly to that sweet spot. If not, adjust the current, measure t.c. again, find the new zero t.c. temperature and adjust your oven to that new temperature. Similar to how it's done in W/F7000 (https://xdevs.com/article/b7000/). That is a valid general approach for any oven controlled, temperature compensated zener, except ADR1399 and LM399 as you don't have access to the zener itself.
It also makes sense to observe the first 3000 h or whatever the datasheet claims, too. Especially the difference between the zener and the 10 V output to see how stable the amplification is over time.
This way you - and if you publish your findings here, we - get the most knowledge out of your experiment with this component. ;D
-branadic-
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So far this is quite similar to what other drift curves have come out look like. So its fairly passable. Chances are your unit didnt have any burn in at all at the factory hence the rapid initial fall off.
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Hopefully nobody from ADI here watching my experiments.. :palm:
I have got fully different situation after today's lunch.. ::)
I installed a pin header (a jumper switch) for switching the external TEMP set divider on/off.
I will update the schematics above soon.
I fired up myADR1001, watching the new data while messing with the jumper.
What I see now is following - the output voltage shows 10.0002V or 10.004V based on whether the TEMP divider header is open/closed.
The heater current changes from 20mA to 11.4mA based on the jumper, on free air.. :phew: OMG..
I've spent an hour thinking what went wrong before when I saw 50mA heater current - the only conclusion here is one of the PTF resistors had no contact (unbelievable) and the heater's setting point was pulled/pushed by the second resistor hard to one side, forcing the heater to max current.
I will investigate a little bit more - and I will fix all above info.. Starting again.. I love these experiments, indeed!
:D
PS: updated above the schematics, and fixed the heater current info. Starting again with some basic measurements..
PPS:
LTspice simulation:
TEMP JUMPER
CLOSED: 59C with heater current 13.2mA
OPEN: 70C with heater current 17.7mA
Board:
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can you explain more about the temp divider your using? like a quick schematic photo to expain what your actually doing.
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Schematics with description in my Reply #58..
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Yeah afaik you shouldnt have the temp set coming from a divider instead have it tied (THROUGH A RESISTOR) to ground or ref6v6
shorting to GND will give you a Tset of 125c
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In my case the upper 2k67 was opened, thus the lower 10k set the high current. That is strange as the soldering was ok, imho, as you may see on the photo above. I messed around the resistors as I was installing the jumper and it started to work the right way. I have to doublecheck whether the resistor has not get cracked or what.. Anyhow, the reference has got good burn-in.. The outer package temperature was below 50C so it did not smoke in reality..
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Yeah it would have happily lived at 125c since that is one of the potential settings of the adr1001. Though i wouldnt feed it from a divider unless you are using a trimmer. At that point i would simply use a single resistor
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OK, this is the "first" myADR1001 measurement ran over night in an insulated box. The external TEMP divider is disconnected, thus working with the stock TEMP setting (70C based on the simulation). Blue is the temperature inside the box.
Anyhow, it looks like my 23y old LM399 works pretty well :D
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Did anyone create a PCB for ADR1001 yet? Would love to build a board, my PCB design capabilities are almost 0 though.
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at this point its mostly just making sure that the thermals are taken care of properly along with bypassing the IC.
otherwise the pcb design can be very simple. It only gets complicated in the case of the LTZ/ADR1000 where every sniff and fart needs to be accounted for.
So effectively the point of the ADR1001 is to make the pcb as simple an compact as physically possible
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There is the question how to make the pcb.. People here will tell you a FR4 or similar "works" based on humidity, temp, etc., thus creating mechanical stress..
That would be the same discussion as with the ADR1399 in smd..
Perhaps a thin flexible pcb?
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I think even having "best effort" FR4 layout by someone would be amazing, even if its just to gain data and experience with ADR1001 chip.
Its still a lot more professional than soldering legs to ADR1001 and make due with euro board.
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Yeah it would have happily lived at 125c since that is one of the potential settings of the adr1001. Though i wouldnt feed it from a divider unless you are using a trimmer. At that point i would simply use a single resistor
OK, so do you mean to wire the resistor based on where you want to set the temperature (we would probably see that in the DS ;D ) - see below for example.. ?
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Yes this is how it should be done. Doing it with a divider ends up being redundant and just wastes the space for another resistor. Plus the datasheet table references it this way for the corresponding set temps
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Has anyone been able to verify the ADR1001's noise? The data sheet says 0.6μV p-p. That's 0.3μV better than the ADR1000 specs 0.9μV p-p! ^-^
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I removed the external TEMP divider, left the jumper X1. It could be used for a faster burn-in at higher temperature (connecting TSET via a resistor to GND, provided ADI recommends that).
Also I added an 0.22ohm resistor to the green ~110ohm ISET one, the output voltage dropped by aprox 60uV.
I also created my diy 111ohm ww resistor, an over night measurement showed an 1ppm relaxation, thus such stuff needs special cure and expertise.
At this moment my home 34401A (calibration doublechecked by Jaromir's great LTZ calibrator) reads 10.000111V :D so I let it be for a while running and let us all wait for the official ADR1001 release including the datasheet v1.0. !!
:-+
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Below my today's DIY 110.3ohm WW resistor wound with a 14.9ohm/100mm manganine wire.
Fine tuned by slowly cutting millimeters off, such my meter reads 9.999.998V (the board in the insulation box, temp aprox 30C) :D
The wire has not been cured yet, just baked for a couple of minutes at 60mA (wire below 50C).
Also ADR1001 will go lower (??), as the experience here with the ADR1000 shows, thus I will try again with the resistor to get it over 10 a little bit..
PS: hopefully I will not be listening short wave broadcasting at the 10V with such a nice loop antenna :D
I will try it next time bifillar, or I will change wire direction while in the middle..
PPS: FYI - below a simulation of the fine tuning sensitivity (in uV/ohm) with 3 possible options: RA, RB, RC resistors for 10V output.
All are with negative slope, a pity.
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I removed the external TEMP divider, left the jumper X1. It could be used for a faster burn-in at higher temperature (connecting TSET via a resistor to GND, provided ADI recommends that).
Also I added an 0.22ohm resistor to the green ~110ohm ISET one, the output voltage dropped by aprox 60uV.
I also created my diy 111ohm ww resistor, an over night measurement showed an 1ppm relaxation, thus such stuff needs special cure and expertise.
At this moment my home 34401A (calibration doublechecked by Jaromir's great LTZ calibrator) reads 10.000111V :D so I let it be for a while running and let us all wait for the official ADR1001 release including the datasheet v1.0. !!
:-+
Release was postponed unfortunately :(
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honestly if its released later and is better/more stable than if it were released today than i dont mind the delay. but at this point i think this is the third or fourth delay lmao :horse:
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honestly if its released later and is better/more stable than if it were released today than i dont mind the delay. but at this point i think this is the third or fourth delay lmao :horse:
fully agree.. lets see if june is the month :D
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The output voltage went up by some +1ppm a day after the soldering the manganine ISET resistor in.
Out of curiosity I made then a simple TC sweep to get an idea on the board's TC.
Board in the insulation box, the temp sensors inside the box off the chip.
See the results below.
Disclaimer: this is not the metrology grade measurement nor the dmm used is, and the sample has not been officially released yet.
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Do you have this at home or in an office?
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FYI - see below the output voltage (10V) vs. input voltage dependence for myADR1001 (on free air, aprox 22C ambient).
The 78L15 has been removed and I will try with 78L12 instead. It seems the ADR1001 starts to operate around 11.5V Vin (configured for 10V output).
"Power_Good" output has not been monitored yet.
PS: done, now with 78L12, stable, and with 10.000.030V output (in the insulated box at 29.2C)..
PPS: when loading the output with 100k the voltage drops down by 20ppm. Is Vin=12V enough for the output buffer then?
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My mod for the ADR1002 - INV0 allows a) for output voltage fine tuning with a positive slope, b) easier output buffering (an external opamp or transistor "inside the control loop")..
;)
-
..
PPS: when loading the output with 100k the voltage drops down by 20ppm. Is Vin=12V enough for the output buffer then?
Removed the 78L12 and tried with 12-16V.
With Vin=16V the 100k load resistor (wired directly at the board's posts) drops the output voltage down by 17ppm (>10Gohm dmm set).
Hmm..
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Some 20 /17 ppm of drop from loading with 100 K suggest an output resistance of soem 1.7 to 2 ohm.
It depends on the internals if 12 V supply is enough to drive a 10 V output, but 16 V should definitely be enough. With a higher valtage there can be a thermal problem: more load current gives more power loss from the driver and this can disturb the thermal balance of the chip. Even with the extra amplifier the ADR1001 is not really suitable to directly drive an external / variable load.
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One could use a simple NPN Emitter Follower (2N3904) "inside the loop" if the supply is high enough to support an output of 10 volts, or a PNP Emitter Follower (2N3906) if the supply is lower. Either should produce an output impedance well below 1 ohm if the internal op amp has reasonable open-loop gain.
Best,
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One could use a simple NPN Emitter Follower (2N3904) "inside the loop" if the supply is high enough to support an output of 10 volts, or a PNP Emitter Follower (2N3906) if the supply is lower. Either should produce an output impedance well below 1 ohm if the internal op amp has reasonable open-loop gain.
Best,
Yep, that would work with the ADR1002 (see above) but not with 1001 - there is the hot side of the divider wired inside the chip to the buffer's output.
How would you wire the npn inside the loop with the 1001?
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I imagine it could still work if you forgo gain and go for 5V output.
But 0.2mV output step under 100kΩ loading? From an opamp? At DC? ???
Are you sure everything is star grounded and Kelvin sensed properly?
I recall playing with a breadborded circuit which displayed negative PSRR.
I take it as evidence that given bad enough grounding, everything is possible.
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The wiring has been made exactly as in the schematics above (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg4555591/#msg4555591), therefore I draw it in that messy way.
I grounded the internal output buffer at the "power_gnd" star.
PS: there is none wire with more than 15mOhm used on the board, so the 170uV delta at 100uA is less probable..
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Okay, so you connect a DVM across BUF_INP and BUF_S, and you see the offset voltage jumping
0.2mV 0.1mV due to 0.1mA output loading?
BTW, beware that DVM capacitance on input pins could upset an opamp and cause it to oscillate. Series resistance may help.
Actually, output capacitance could do it too, did you check?
I gather it's a preproduction sample, do you have any datasheet / application info or just working completely in the blind?
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I put 100k directly at the 10V_out and 10V_gnd star posts at the board and then the 1m lead wires go to the 34401A set to >10G.
The delta I see is ~170uV with 16V power and 100k resistor.
There is the 1uF||4n7 at the buffer's output so I doubt the input of the dmm could upset it more.
It looks to me like they wired 1.7ohm to the buffer's output.
It is a prepro sample (1001XEZ), none DS, all info we have is in this thread..
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Yes, I know you measured it differently. It was a suggestion, not a question ;)
There is the 1uF||4n7 at the buffer's output so I doubt the input of the dmm could upset it more.
Are these values recommended by Analog or something that just happened to be in your junk box? Why are they there?
It looks to me like they wired 1.7ohm to the buffer's output.
That's one possibility.
But why would they do it?
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There is the schematics of the evaluation kit available (also in this thread) I took as the base.
The kit has been pre-released and some people here have it (the same chip batch I have).
There is the spice model as well with the test jig.
They use 1uF mlcc ceramics there, after a discussion here I opted for aluminum as it has a higher internal resistance.
The 4n7 is there to suppress higher frequencies coming from leads (there is a ferrite bead/cmchoke w/ 3turns on the leads too).
-
...
How would you wire the npn inside the loop with the 1001?
You would need to break the loop somehow, likely not easily within the 1001. Seems ADI already did this with the 1002, which seems like a good idea to include an EF even if the lower output Z isn't required.
Best,
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Well, if there is internal 1.7Ω resistance, it's not modelled in SPICE ;)
And it's unclear how the value would increase to 2Ω on 12V supply.
OTOH, the model does predict instability with more than 10Ω output ESR.
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Well, if there is internal 1.7Ω resistance, it's not modelled in SPICE ;)
And it's unclear how the value would increase to 2Ω on 12V supply.
OTOH, the model does predict instability with more than 10Ω output ESR.
That's not showing instability, but the output "Z" as it's driven by a current source of 10ma delta I, which produces a voltage response of delta V. This equates to dynamic output Z of delta V/delta I.
Most op amps don't go unstable with large or larger ESR values hanging off the outputs, they go unstable with smaller ESR, assuming a sufficient shunt capacitance to create enough phase shift with the dynamic output Z to cause the phase margin to degrade.
To check for instability one could inject a current step at the output and look to the response and settling of the output voltage change.
Best
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Yes, that was the point. The model shows very low output impedance, less than 1mΩ, surely not more than 1Ω.
Every decent buffered voltage reference has load regulation specs in single digit ppm per mA.
Instability was a separate sim, which anyone curious may easily produce himself.
Regarding stability, most opamps are also stable without 1µF output capacitance, so this is not exactly a usual opamp.
I don't have my hands on this chip so I won't tell you how it works, but the model operates down to ridiculously low input voltage like 10.1V. If the model is right and this is really an LDO, maybe a maximum limit on ESR doesn't look so exotic anymore.
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Compared to the simulation the real world chip could have some resistance from the "pin" , maybe bond wire (internally there could be two - so AD would have a way around much of it). So a little output restance would be normal, but 1-2 Ohm sounds too much.
An unnoticed, relatively small residual amplitude oscillation could cause all kind of strange effects. The output capacitance (too much ESR) could be an isssue.
If unstable, chances are that also just extra capacitance at the output could change the voltage.
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...
How would you wire the npn inside the loop with the 1001?
You would need to break the loop somehow, likely not easily within the 1001. Seems ADI already did this with the 1002, which seems like a good idea to include an EF even if the lower output Z isn't required.
The 1002 does not exist, afaik, that "1002" above is my suggestion (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg4578724/#msg4578724) to ADI for the upcoming 1002 (if any).. :D :D
I would wire the output buffer's input directly to the first divider, with only 1 pin for the external capacitor, that is how they can get 1 pin free and that pin could be routed to INV0 (in my above 1002 schematics).
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The opamp is wired to make it as configurable as possible to either act as an inverter to get -5V or a double to act as 10V output or even to just buffer the output. Having the feedback network internally i think is better for stability.
Its also not guaranteed to be used with Vdout specifically hence the external input connection
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The internal resistor network is nice. However the direct connection to the op-amps output is a problem as this makes the amplifier sensitive to loading.
In the current configuration it is only usefull with rather low load on the OP-amps output (e.g. more than some 100 K). Still the resistance should not be more than 1 ohm - more like 0.1 ohm.
-
...
How would you wire the npn inside the loop with the 1001?
You would need to break the loop somehow, likely not easily within the 1001. Seems ADI already did this with the 1002, which seems like a good idea to include an EF even if the lower output Z isn't required.
The 1002 does not exist, afaik, that "1002" above is my suggestion (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg4578724/#msg4578724) to ADI for the upcoming 1002 (if any).. :D :D
I would wire the output buffer's input directly to the first divider, with only 1 pin for the external capacitor, that is how they can get 1 pin free and that pin could be routed to INV0 (in my above 1002 schematics).
Agree, this is one way ADI could have created the I/O pinouts. Since this is apparently an early rendition of what they will offer, and don't "see" any advantage to what they've done pin-out-wise, maybe they are "listening" and will follow your "suggestion" ;)
Best,
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Replaced the 1uF alu with 1u5/25V tantalum one. Vin 15V.
dmm 10.000.016
w/ 100k 9.999.850V
166uV diff
Hmm, it seems I have to go back to my previous schematics (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg4530455/#msg4530455) with an opamp and some transistors, in order to be able to drive 10k load ;D
@magic: where your ltspice model comes from?
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You could repeat this test with 200K and 50K resistors to see what happens. To me the observed behavior appears strange, as the voltage divider 0.5 already represents a load of 20K. These things sometimes happen if you put a load to a previously unloaded opamp or when the opamp output current changes direction. Or the force/sense scheme you are missing limits the amplifier performance. Or there may be oscillation and the connections you make are antennas. Anyway, without datasheet it's guesswork.
Regards, Dieter
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@dietert1 - I will do tomorrow, sure. I did today with 10k and 1k but the voltages dropped too much for my taste so I did not mess with it for too long.
Btw. - switching dmm input from >10G to 10Meg changes the reading by aprox 4-5uV (but that is a different story as the lead wires are long).
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The opamp is wired to make it as configurable as possible to either act as an inverter to get -5V or a double to act as 10V output or even to just buffer the output.
Not holding my breath for negative output if parts of the reference structure are tied to the substrate like in ADR1000.
There will likely be absolute maximum rating: BUF_GND = REF_GND ± small delta.
Replaced the 1uF alu with 1u5/25V tantalum one. Vin 15V.
dmm 10.000.016
w/ 100k 9.999.850V
166uV diff
:wtf:
I would definitely check with a scope because it's an utter waste of time to debug an unstable circuit.
Then, measure voltages on all relevant pins and see if it really is the amp or something else that changes. And what happens at the inputs of the amp. If BUF_S is rock stable then yeah, wtf.
I agree that less than 1mΩ is perhaps too optimistic (and even if it's real, you won't see it without measuring on the pins directly), but more than 1Ω seems a bit much. What's the resistance of your wires, by the way? I think even that is still less than 1Ω.
@magic: where your ltspice model comes from?
I just installed the latest LTspice, ver 17.0.36, 32-bit.
BTW, I think this model may be transplantable to older releases. I was able to include it even in LTspice IV, but I haven't put the files in the library yet and I don't know how to include a symbol from the working directory, so I couldn't put it on the schematic and see if it works. Sorted it, outcome: "Fatal Error: Singular matrix: check node u1:isense_m" ::)
edit
I see that the current version on the website is 17.0.35 and I'm pretty sure that this is what I downloaded before.
Nevertheless, help → about says that I'm on 17.0.36.
Can't explain this. Have fun :-DD
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The opamp is designed to be able to give a negative output voltage
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@magic: yep, the 17.0.36.0 dated Dec13 2022 has got the model finally (win64 version), I downloaded just now.
My wires are made of copper, sure, no more than 17mOhm per wire on my board.. :D
But shit happens..
PS: I've a look at the pins with my oscope (analog 80MHz) and I do not see any oscillation at the output with load or without load (or it is below 1-2mV).
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The opamp is designed to be able to give a negative output voltage
No NPN collector nor PNP base on the same die as the LTZ/ADR1000 reference structure can go lower than zener anode.
Every such element is the N of a diode whose P is the anode, with predictable consequences.
So I see a few possibilities:
1. ADR1001 will stop working sensibly if you apply negative voltage to BUF_GND.
2. ADR1001 somehow uses a different reference structure, maybe on a different process (dielectric isolation?).
3. The amplifier is a separate die (feedback resistors may still be ovenized on the main die, they are likely dielectrically isolated anyway).
4. They somehow designed an amplifier which outputs negative voltage without using NPN collectors or PNP bases below ground.
Off the top of my hand, I'm not sure how the output stage of 4 could work and 2 or 3 would drive cost up.
Given the naming of the BUF_GND pin, my initial bet was on 1, but maybe you know something :-//
edit
OTOH, the buffer's feedback network pins are called INV. Maybe you guys are right.
Actually, this device could simply be a standard ADR1000 application built in hybrid technology, consisting of modified ADR1000 plus a few opamps, maybe even a MLCC or two.
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In the ADI's EZone there is a Q/A on the heater opamp HTR_GND pin with the answer it can go negative up to -15V (together with the HTR_ILIM pin).
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@dietert1: below the V_out vs I_load I get today..
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In the ADI's EZone there is a Q/A on the heater opamp HTR_GND pin with the answer it can go negative up to -15V (together with the HTR_ILIM pin).
Note that the positive supply of the heater opamp is taken internally from REF6P6S. Quiescent current variation due to changing negative supply voltage or base current variation of the heater NPN may cause loading errors there. That's what the simplified schematic suggests, at any rate.
BTW, your schematic shows VDIN connection to REF6P6F, but I suspect that you used REF6P6S, which is the better option of course.
@dietert1: below the V_out vs I_load I get today..
This looks like a resistor, but didn't you say that the slope was different on 12V supply?
Monitoring BUF_S could tell if the internal output of the scaling amp stays constant or if it drops under load too.
Monitoring BUF_INP could tell if the input to the amp is constant.
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The 6V6F, 6V6S, VDIN are pins 4,5,6 and are wired together in my wiring.
That 12V slope was "aprox". Take the 1.7 as the slope. I stopped measurements at 12V at this stage as it is too close to 11.3V where the stuff starts to show values.
There are 2 REF_GNDs on the package in reality (14 and 15), I have two separate wires connecting them to the 10V_GND star.
PS: I measured the voltages around the ref_opamp and buff_opamp with a 47k load on/off, I do not see a relevant change except the measurement noise.
PPS: long time back I draw a schematics for mike_mike called "power_supply_shorter" he was using extensively afterwards. Perhaps a high time to try with it here.. :D :D
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The datasheet does actually state that the network can be used with the internal opamp to create negative output voltages.
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Ok, after a good lunch my current understanding is as follows:
1. there is an 1.7ohm resistor wired after the divider
2. with the 10V the resistor applies as the buffer's feedback BUF_S goes to the output divider, so the resistor works as "the bond wire"
3. with 5V the resistor does not apply as the buffer's feedback goes to the output pin, after the resistor (the resistor is within the loop)
4. they put the resistor there to mitigate instability with 1uF MLCC output capacitor
5. the buffer itself works, as I do not see a change in the feedback path when loading its output (at 10V setup)..
:-+
PS: hopefully my adr1002 will arrive soon :)
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Ok, after a good lunch my current understanding is as follows:
1. there is an 1.7ohm resistor wired after the divider
2. with the 10V the resistor applies as the buffer's feedback BUF_S goes to the output divider, so the resistor works as "the bond wire"
3. with 5V the resistor does not apply as the buffer's feedback goes to the output pin, after the resistor
4. they put the resistor there to mitigate instability with 1uF MLCC output capacitor
5. the buffer itself works, as I do not see a change in the feedback path when loading its output (at 10V setup)..
:-+
I must concede that this is what it looks like |O
Did you confirm that the 1.7Ω resistance disappears in 5V output mode or just speculation? (Of course, it seems almost certain at this point.)
And it looks like the resistance will also affect -5V applications.
edit
The only way it could still be your fault is if the resistance is outside the chip somehow, a dodgy solder joint or something.
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@magic: it is my current understanding..
I have installed a new jumper switch, shortening pin 12 (BUF_F) and pin 9 (BUF_S) hard. Nothing else rewired.
With the jumper I can switch between 10V and 5V out.
I wired it such the jumper wires are bonded directly to the chip wires, to avoid resoldering other existing joints.
When I short the switch with special golden jumper I can see:
Vout 4.999718V 4.999723 (I may precise it later on as my dmm warms up, it was switched off), mind the buffer's load here is aprox 9k internal resistor against gnd.
With 47k load I do not see any change in the readings (the resolution here is +/-1uV without averaging).
With 4k7 load I see a drop of 7-8uV (7.7mOhm internal resistance?).
Edit: a night run shows 4.999723 within 5uV.. The output divider ratio gives aprox 2.000116 then (both 10V and 5V ran with the same output load current).
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Yep, this confirms that the ref and the amp are working correctly.
1.7Ω is a lot of resistance; if it exists on your board you should be able to find it with a DMM.
If it isn't there, it has to be in the chip.
(We already know that it exists somewhere between the internal feedback divider and your jumper.)
This means load regulation from this 10V/-5V output is worse than TL431 :-//
edit
Theoretically, a different explanation is possible too. If input bias current of the amp is significant and changes with output load current, then BUF_S voltage is no longer half the output voltage and things get weird. But let's do the math: with 1mA load current, 10V output decreases 1.7mV. BUF_S is constant, so current through the upper 9.3kΩ resistor decreases 0.2µA. This would be caused by 0.2µA change in input bias current, which seems very unusually large.
I don't even think it's worth trying to modify the circuit to test this theory. I'm running out of even the most crazy and far-fetched alternatives to the simple explanation that there is 1.7Ω in series with this output not compensated by feedback.
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I've measured the resistance between my chip's board's bonding wire on the pin 12 and the "+10V" post.
34401A shows some noisy milliohms, an another meter a zero.
-
I have installed a standard output buffer with 20mA current limit (bottom left in the shot), currently with an OP27 for initial experiments, later on I have to decide whether I put there an OPA189 or 2057. The ADR's output is filtered by 1u/50V foil wima and then the opamp etc. The voltage at the opamp's output is around 4.5V-4.7V based on the load.
With 820ohm load the voltage drops by 18uV in this setup (15V). The 10V output voltage is by couple of ppms higher than before (opamp's offset, or less load via the 1.7ohm bonding, it seems).
-
Yep, the OPA189 looks better there, I do not see an offset (op27 did +5.5ppm). The loading with aprox 12mA shows a 16uV drop, thus +- same as with the op27.
PS: the question now is whether to add a series resistor with the ADR's output, like 4k7-10k, to create a low pass with the 1uF foil at the opamp's input.. And keep, say, an 100nF foil at the ADR's output for its stability.
PS: I did with 10k and 100nF foil as below, no change at the output (within the mesurement noise)..
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The filter you inserted will also suppress chopper noise in reverse direction. As far as i remember input current spec of OPA189 is +/- 70 pA times 10 KOhm gives 0.7 uV offset. I used the same for an ADR1399, except i had 2x 5 KOhm to make a Sallen-Key low pass. The 1 uF 50 V WIMA may not be the best solution (leakage depends on temperature). Better pick an MKP cap for higher voltage with less leakage current.
Regards, Dieter
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For example Wima MKP 4 series? Two 1u would not fit on my current board, sure :)
There is a low pass filter already before the ADR's buffer (5->LP->10V), there is also a Wima 3u3/50V in that first LP I had on stock.
Not sure the second one LP with OPA189 would help much, except the chopper noise.
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For reference filtering an MKS capacitor should be OK. It will take some extra time for settling, but the reference would anyway likely want at least a minute or so before getting sub ppm stability anyway.
A PP capacitor would be lower leakage and faster settling, but also larger. There may be slightly smaller form factors (e.g. japanese brands) than Wima MKP4 series.
It depends on the use of the reference if the fitler function helps much. The more higher frequency noise that is filtered out may or may not be relevant.
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This is the "final" run with OPA189 buffer, the RC filters as above, 15V power, against a 34401A 100PLC over night (20C ambient). This time with median7 and TEMA filter I test just now. You may see the LM399 typical drift I saw also this fall as I did a check of the dmm with the LTZ1000 based calibrator. You may also see the change in the temperature noise - that is because the sensor was loose in the box, I put it somewhere on the board and it moved closer to the "chimney" (the cut off area around my ADR "trampoline") as I touched the box. The air turbulence there is large thus the sensor provides more noisier data. The ADR1001 itself has to be put inside an insulation as it is done in the ADI's evaluation kit.
The next precision measurements are on the experts here who are equipped with the best rigs, and I will let my PreProd Sample burn-in in peace.
Hopefully the ADR1001 comes soon, as the work with it is easy and cheap... :-+
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Hopefully the ADR1001 comes soon, as the work with it is easy and cheap... :-+
Latest news on my side: The release of the ADR1001 has been pushed out to July of 2023 :'(
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Where do you all get these pre-production samples from??? :wtf:
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Where do you all get these pre-production samples from??? :wtf:
Sample request on AD wegpage.
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Where do you all get these pre-production samples from??? :wtf:
Sample request on AD wegpage.
I don't find it on the Analog website and I even talked to the FAE... :-//
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Where do you all get these pre-production samples from??? :wtf:
Sample request on AD wegpage.
I don't find it on the Analog website and I even talked to the FAE... :-//
It usually helps to work in the industry. And talk to people that want to sell you stuff, not the one's engineering it.
edit: Being in an engineering job i curse about sales people all the time, when you need something they are your best friend though :)
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Where do you all get these pre-production samples from??? :wtf:
Sample request on AD wegpage.
I don't find it on the Analog website and I even talked to the FAE... :-//
It usually helps to work in the industry. And talk to people that want to sell you stuff, not the one's engineering it.
Check! :-+
Check! :-+
Nevertheless... :-//
Will try again... :blah:
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In theory one could have a OPA189 at BUF6V6, one at VDOUT, one at BUF_F to be able to monitor 5V, direct zener voltage and 10V respectively or anything speaking against that?
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It should be OK to have more than 1 output buffer at the same time. Here it would help, if the input to the buffer also has some filtering (e.g. 1 K and 100 nF range) to keep switching spikes away from the reference chip.
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The buffer with the OPA189 I've been using is unstable with output loading capacitancies like 100n-220nF ceramics. With a tantalum 1.5uF (or 1.5uF ser 4R7) the output is stable. In the tina-ti simulation it looks stable for any Cout, but frankly, I would be much more happier to do it in the ltspice - is the OPA189 model somewhere available?
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The buffer with the OPA189 I've been using is unstable with output loading capacitancies like 100n-220nF ceramics. With a tantalum 1.5uF (or 1.5uF ser 4R7) the output is stable. In the tina-ti simulation it looks stable for any Cout, but frankly, I would be much more happier to do it in the ltspice - is the OPA189 model somewhere available?
How is behaviour without any output capacitance? KX ref for example does not use any output capacitance if i remember correctly. Is it needed?
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The buffer with the OPA189 I've been using is unstable with output loading capacitancies like 100n-220nF ceramics. With a tantalum 1.5uF (or 1.5uF ser 4R7) the output is stable. In the tina-ti simulation it looks stable for any Cout, but frankly, I would be much more happier to do it in the ltspice - is the OPA189 model somewhere available?
How is behaviour without any output capacitance? KX ref for example does not use any output capacitance if i remember correctly. Is it needed?
I've soldered the OPA189's load capacitors (4n7||220n||1u5) already in the pcb and cleaned up so I cannot tell yet. I wanted to remove the 1u5 tantalum I had there before and replace it with 220nF and I got weird voltages (bridging the 10V output posts with the 1u5 tantalum cured that instability, thus I soldered it in afterwards). I wanted to simulate it but with no result as I do not have OPA189 model in my ltspice..
PS: the KX does not use an output buffer with the power/current limit stage, afaik, moreover TiN is using the 2057 in his designs, not the OPA189..
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The buffer with OP and extra transistor could use a split feedback to improve the stability with capacitive load. So an extra resistor (e.g. some 1 K) in the DC FB path and an capacitor (e.g. 10 nF) for a direct FB from the OP-amp.
The higher GBW makes the OPA189 more sensitive to capacitive loading.
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FYI - my power supply for myADR1001 board - built around MC1723 from Motorola, date code 8445 :)
It works nice!
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is the OPA189 model somewhere available?
Spice model for OPAx189 is awailable: https://www.ti.com/product/OPA189#design-tools-simulation (https://www.ti.com/product/OPA189#design-tools-simulation) -> OPAx189 TINA-TI Spice Model (Rev. E) (https://www.ti.com/lit/zip/sbomaf1)
To include the model in LTSpice seamlessly:
Copy OPAx189.LIB into:
%UserProfile%\Documents\LTspiceXVII\lib\sub\Contrib\TIIf it is put in other directory, change path in OPAx189.asy accordingly.
In:
%UserProfile%\Documents\LTspiceXVII\lib\sym\Contrib\TI
create new file:
OPAx189.asy
and insert:
Version 4
SymbolType CELL
LINE Normal -32 32 32 64
LINE Normal -32 96 32 64
LINE Normal -32 32 -32 96
LINE Normal -28 48 -20 48
LINE Normal -28 80 -20 80
LINE Normal -24 84 -24 76
LINE Normal 0 32 0 48
LINE Normal 0 96 0 80
LINE Normal 4 44 12 44
LINE Normal 8 40 8 48
LINE Normal 4 84 12 84
WINDOW 0 16 32 Left 2
WINDOW 3 16 96 Left 2
SYMATTR Value OPAx189
SYMATTR Prefix X
SYMATTR SpiceModel %UserProfile%\Documents\LTspiceXVII\lib\sub\Contrib\TI\OPAx189.LIB
SYMATTR Value2 OPAx189
SYMATTR Description 55 V, EMI Enhanced, Zero Drift, Ultralow Noise, Rail-to-Rail Output Op Amp
PIN -32 80 NONE 0
PINATTR PinName In+
PINATTR SpiceOrder 1
PIN -32 48 NONE 0
PINATTR PinName In-
PINATTR SpiceOrder 2
PIN 0 32 NONE 0
PINATTR PinName V+
PINATTR SpiceOrder 3
PIN 0 96 NONE 0
PINATTR PinName V-
PINATTR SpiceOrder 4
PIN 32 64 NONE 0
PINATTR PinName OUT
PINATTR SpiceOrder 5
Enjoy new third party part in LTSpice!
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LTspice misses something - it loads the OPAx189 part into the schematics, but I get
Fatal Error: Unknown subcircuit called in:
xu1 n007 out n001 0 n005 %userprofile%\documents\ltspicexvii\lib\sub\contrib\ti\opax189.lib opax189
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LTspice misses something - it loads the OPAx189 part into the schematics, but I get
Fatal Error: Unknown subcircuit called in:
xu1 n007 out n001 0 n005 %userprofile%\documents\ltspicexvii\lib\sub\contrib\ti\opax189.lib opax189
OPAx189.asy fixed, seems "SYMATTR Value2 OPAx189" is mandatory
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Thanks MiDi we have got the first OPA189 buffer AC sim.. :D
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I ordered some boards on jlcpcb now and gonna make a digikey order today to populate the boards. If adr1001 chips, boards and components arrive in time i could turn the boards on before new year. But i have 3 week vacation now :=\
Happy holidays to everyone that reads this!
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Thanks MiDi we have got the first OPA189 buffer AC sim.. :D
In actual use you might consider adding a small "protection" resistor in series with the Op-Amp - input, since this is "exposed" directly to the Output as shown in the schematic.
For added protection for reverse polarity a shunt diode across the output and Overvoltage protection a diode to the +15V supply (which may need a Shunt Zener and/or reverse diode to regulator input).
Anyway, these suggestions are just for protection against abuse which isn't necessary in most cases for the folks here.
Trying to get our hands on a ADR1001 to play around with, left a note at Analog Devices requesting such.
Best,
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I plan to wire a transil (12V) at the output.. I've got one already, but they sold me a bipolar one. It starts to conduct at some 11.5V, that is good. Before that I can see some uAmps through it. The Q is how the transil contributes to the noise then.. I already soldered an 18V transil at the power input of the board. The board has none voltage regulator on it. The protection resistor at the OPA's inv_input could be done too..
PS: I wish all the people here to get the samples under the Christmas tree, it is really a great gift to play with during the holidays !!! :-+
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myADR1001 sandwich.. The same foam block from the bottom..
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I would say you should get a denser foam. By the looks of it thats very light weight foam and might not do anything but stop drafts
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Another night run of the sandwich this time. First part on the free air, then put into an insulated box. The 12V TVS on the output, power 14.345V (the set voltage of the 723 power module which will be used with it). The free air temperature measured far of the sandwich, and in the box the sensor touching the foam. The next step is the LM35 will be soldered directly on the pcb (being the most expensive part there on the pcb :D ).
PS: The LM35 mounted on the board, shows some 2C more in the box than the previous loose one, good. That is all, no other messing with the sandwitch, it will be put into a styrofoam insulation and put into a new nice box together with the psu (thus something similar to the Fluke 732D :D )..
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Ok, myADR1001 sandwitch in a new box, together with the psu, densely packed into an insulation. The on-board sensor shows aprox 35C and the voltage dropped by aprox 6-7uV to 10.000.010V. That is somehow in sync with my previous simple TC measurement (aprox -0.144ppm/C). I am especially happy with the nice blue glow of the VR tube inside.. :)
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This is the aging drift I see so far with myADR1001#1 (I will update the graph here). The output voltage dropped by aprox 1ppm (against previous measurements here) after finalizing the box, the temperature difference between the board and ambient is aprox 14.7C with the final foam isolation. The measurement starts at 9.999.999V == 0ppm. Measured against my (t)rusty HP34401A with some post-processing (gain, offset and TC adjusted, smoothed) with stock ADR temperature setting (TSET disconnected). On Jan 7th there was a 10min long power off of the box (before the measurement). The power voltage at the board is 14.345V and stable within 0.5mV so far. The temperature sensor voltage and power voltage are available at dedicated front posts as well.
PS: any new ADR1001 owners here?
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Looks good at this point its more or less starting to plateau. I find it interesting that some samples after peaking in there drift curve they often (but not always) return back towards the original power up.
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With such a nice Vref in hand I've been analyzing my measurement process - I will start a new thread as I want to understand what I've been doing :)..
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It's way to early to draw any conclusions by now
1. It's only one month with just a few measurement points and some events in between.
2. Measurements were taken with a 34401A only, no comparisons (differences to other references) were taken, so what we see is probably limited by the measurement equipment.
-branadic-
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Sure, we need more people with a better equipment involved, indeed.. Based on ADI's info on their EZone they plan to release this gadget officially in October this year.. ::)
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Does the EU plan to release first? Neither our sales or precision ref group contacts in US can get the ADR1001 (so they say),but did provide data sheets and info.
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The sampling policies may be different company to company. Chances are if the adr1k1 is released in US or EU first it would more than likely be US first. Otherwise i dont think they will release it in either first but first at the same time
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An update..
Note:
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
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Thanks for sharing the curve @ 24.01.2023 is continues - no signs of power-offs. The results of 27.01 are also very close to those of 20.01
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An update..
Note:
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
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have you also been logging ambient temperature or only board temp?
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Yes I do, the ambient vs board temperature difference depends on the exact position of the box in the workspace, however. The average difference is 14.72C with 0.18C stddev.
PS: the Vcc of the board dropped down by 1mV since the start of logging.
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Any hint from people who know? How are the two ground pins REF_GND (14 and 15) wired inside the chip? Are those pins electrically equivalent? Or, are those pins wired to different internal blocks? Is there any DS recommendation how to wire them?
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Is there any form of datsheet available yet??
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both ref_gnd are electrically equivalent and are connected internally. They seem to be tied nearer to there own nodes for sensing but it is not clearly stated which is which.
the datasheet isnt going to be public too soon.
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From ADI:
pin 14 and 15 split static voltage reference ground currents. We doubled up the pins to half bondwire and lead resistance as they carry large tempcos which are of course undesirable.
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Yes, but it is still confidential - Draft Rev 0.
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The DS is still confidential, but my myADR1001#1 10V reference box is 1100hours in the burn-in today :)
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Thanks Noopy's bonding wires measurements from his ADR1000 shots I made a simulation with ADR1001, T from 20C to 50C, with two REF_GND Al bonding wires (estimated 1.5mm x 50um), several 50mm x 1mm pcb traces around the critical parts (an example only) and Manganin RISET. You may see the voltage drops which contribute to the overall tempco due to large TC of the Al and Cu.
The 10V tempco is aprox 0.1ppm/C in the simulation.
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An update..
Note:
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
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Thanks for sharing. I can observe few thinks
1. Tempco is still dominating the graph.
2. Tempco is on the higher side >-1..2ppm/K
Did you do an initial temperature sweep to determine the TC?
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The test of reference drift is always a comparision to a 2nd reference in the case of IMOs data this seems to be an 34401 DMM. I am afraid the data can also be seen as a test on the stability of the DMM.
Beeing well aged the DMM may not have that much drift over time, it can still have quite some TC. Chances are the temperature effect is more on the DMM than on the reference. 1-2 ppm/K is not that bad for a 34401.
To check if the reference has significan TC one would have to intentionally change the temperature of the reference circuit and keep the DMM temperature constant for that test.
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Here is a TC sweep I did 2 months back.
Note: the ref board was put into a different box as it is now, the board was not in the form of the "sandwich", no output buffer installed, the temp sensor was not soldered into the board as it is now (but in the same position).
https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg4572577/#msg4572577 (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg4572577/#msg4572577)
I've been preparing some measurements for March (after ~2k hours of burn-in) with different and much better dmms, and I am well aware of the fact myADR1001#1 measurement is not a metrological grade as of today. But better to do something than nothing.. ;)
PS: my 34401A is temperature compensated as has been shown couple of times here (with the actual measurements as well).
See this thread https://www.eevblog.com/forum/metrology/tempco-and-calibration-of-a-dmm-simple-data-post-processing/ (https://www.eevblog.com/forum/metrology/tempco-and-calibration-of-a-dmm-simple-data-post-processing/)
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An update..
Note:
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
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I powered off the box for 16 hours long in order to see how fast it returns back. Ambient 21.7C.
The 34401A powered on for 7 hours prior to the test.
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Hello,
what are the measurement parameters?
If I do a measurement with 100 NPLC in 10V range (so 1 measurement all 4 seconds) I usually get a much more noisier looking display for values below 10V (there I get 0.1 uV resolution numbers over the interface).
Or: are the raw values above 10V (there the resolution is 1uV) and only due to the T.C. correction the values are lower than 10V.
Or: do you do some rounding to 1uV steps?
with best regards
Andreas
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@Andreas: The raw data I get off the 34401A are above 10V (like 10.000.031) with 1uV resolution (100NPLC). Then I do TC and gain/offset correction and median_5 (rolling over last 5 samples, the "median" made upon odd number of samples does not change the resolution as it does not make any math calculation with the data). All in double precision. Thus the process translates the results below 10V, and the "1uV" resolution remains, afaik.
PS: to be exact - the "1uV" is the "resolution you see" on the graph. When you will zoom into my graph you will see very small steps in the "flat" portions of the graph as well - that is the "TC compensation" acting based on the internal DMM temperature values..
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An update..
Note:
34401A, 100NPLC, 10M
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
18.2.23 powered off for 16 hours
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Release unfortunately has been pushed back to the end of the year....to pre-age these further maybe?
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its more than likely to get more long term data for the drift and to refine the process and possibly even increase the yield. That and pre-aging as you said quite likely
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An update..
Note:
34401A, 100NPLC, 10M inp
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
18.2.23 powered off for 16 hours
5.3.23 powered off for 20minutes
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An update..
Note:
34401A, 100NPLC, 10M input
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
18.2.23 powered off for 16 hours
5.3.23 powered off for 20minutes
17.3.23 - the first "metrological LAB measurement" in the new setup - Fluke 8588A, certified.
Tambient = 23.2C, humidity 47%
Tboard = 37.63C
Vref = 9.999.895Volt (10Meg input, several 10x2secs measurements averaged after 90 minutes sitting in the lab, powered off for aprox 3hours).
Next LAB measurement in the summer this year, hopefully.. :)
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Very soon I have some news too... ^-^
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Very soon I have some news too... ^-^
I cross my fingers for you - do you plan the "zener light show" as well?
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Very soon I have some news too... ^-^
I cross my fingers for you - do you plan the "zener light show" as well?
Thanks but finger crossing is not even necessary even more. 8)
Up to now I haven´t light the zener. The other parts are much more interesting I think... ;D
But we will see... ;D
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Up to now I haven´t light the zener. The other parts are much more interesting I think... ;D
First teaser images?
-branadic-
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Up to now I haven´t light the zener. The other parts are much more interesting I think... ;D
First teaser images?
-branadic-
I can´t think of an area that doesn´t reveal too much. It has to stay a surprise. ;)
Just give me a few more days.
:-/O
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One more night shift and I think I can show you tomorrow some nice pictures.
Very interesting... ;)
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A few day ago e61_phil had sent me a ADR1001. Special thanks to him! :-+ :clap: :-+
I have put everything aside and worked every free hour on the ADR1001 (beside the semiconductors I have a "normal" life ;D).
I found a lot of interesting things but didn´t manage to draw a complete schematic. Since the ADR1001 took the fast lane it´s possible that the explanation is not completely correct. Every input is highly welcome.
I will start with the basics so that newcomers get a complete picture of the ADR1001.
(https://www.richis-lab.de/images/REF01/32x01.jpg)
(https://www.richis-lab.de/images/REF01/32x02.jpg)
With the ADR1000 (https://www.richis-lab.de/REF19.htm (https://www.richis-lab.de/REF19.htm)), Analog Devices has developed a successor to the extremely stable LTZ1000 voltage reference (https://www.richis-lab.de/REF03.htm (https://www.richis-lab.de/REF03.htm)). Both the LTZ1000 and the ADR1000 require a sensibly designed, very stable external circuit. With the ADR1001 shown here, Analog Devices offers an alternative that contains all necessary circuit parts and directly outputs a stable and precisely defined reference voltage without any special additional circuitry.
The ADR1001 is not yet officially distributed. The release date has meanwhile been postponed to the end of 2023. As the letter sequence XEZ shows, this is an early sample that was produced at the beginning of 2022.
The SMD ceramic housing simplifies integration into modern circuits, but also brings disadvantages when high demands are placed on stability. Distortions of the PCB are transferred more strongly to the reference than with a TO package. The more solid connection itself can lead to mechanical stress. It is also more difficult to thermally isolate the component from the environment.
(https://www.richis-lab.de/images/REF01/32x05.png)
There is no publicly available datasheet for the ADR1001 yet. One can just find screenshots of a product presentation, which, however, already contain a block diagram.
(https://www.richis-lab.de/images/REF01/32x10.jpg)
LTspice already contains a model of the ADR1001, which also shows the internal circuitry. The reference voltage is therefore based on the same circuit as found in the LTZ1000 and the ADR1000. The different temperature coefficients of a Z-diode and the base-emitter junction of a transistor (blue) compensate each other. The opamp that supplies the reference is integrated into the ADR1001 (yellow).
A voltage divider scales the initial reference voltage to 5V (purple). This facilitates integration into a circuit. Although the initial reference voltage is very constant, its absolute value is subject to relatively strong production fluctuations. The ADR1001 also contains an output amplifier (green) which, with the resistors integrated there, makes it possible to buffer the 5V reference voltage or scale it up to 10V. Allegedly, the design allows an inversion to -5V too. A separate pin to the reference potential reduces the risk of feedback from the output opamp to the reference.
In addition to the reference section, the ADR1001 contains a heater that keeps the circuit at a constant temperature (red). This has the advantage that not only the temperature of the reference itself is constant, but also the temperature of the other integrated circuit parts. Whereas with an ADR1000, for example, you have to use external resistors with a very low temperature coefficient, the temperature coefficient of the resistors integrated in the ADR1001 is much less critical.
The heater consists of the actual heating elements and a controller. The opamp in the controller uses the temperature drift of a transistor to measure the temperature and compares its base-emitter voltage with the voltage of a voltage divider. The voltage divider and thus the set temperature can be influenced via the pin TSET.
Surprisingly, according to the circuit diagram, the voltage regulator is supplied by the non-buffered reference voltage. Although the temperature regulator should have a very constant current consumption in the steady state, there is a danger here that the reference voltage will be disturbed. Both the controller and the heater have their own connection to the reference potential.
The output PWRGD obviously indicates "Power Good". According to the designation, the pin TCHIP outputs the temperature of the die. However, this designation is only found in the LTspice model, not in the block diagram.
(https://www.richis-lab.de/images/REF01/32x06.jpg)
The search function on the Analog Devices website does not provide any information on the ADR1001. However, if you use an external search engine, you will find a page that advertises an Eval Board with the ADR1001.
(https://www.richis-lab.de/images/REF01/32x07.png)
A circuit diagram is shown for the Eval board, which shows what a typical application might look like.
(https://www.richis-lab.de/images/REF01/32x03.jpg)
(https://www.richis-lab.de/images/REF01/32x04.jpg)
The lid of the ADR1001 is soldered to the ceramic housing. Viewed from the side, one can clearly see the layered construction. The lid is soldered to a contact in the corner of the housing that does not lead to the underside and is thus normally not electrically connected.
(https://www.richis-lab.de/images/REF01/32x08.jpg)
(https://www.richis-lab.de/images/REF01/32x09.jpg)
In the housing, it becomes apparent that the ADR1001 has indeed been fully integrated onto one die. Considering the high demands and the special structure of the reference element, this is not a matter of course.
As you can already guess here, the die is not conductively connected to the metallised base. No other connection to the base has been created either. This means that the potential of lid and base is floating. The surfaces form a relatively large capacitance to the die, so that interference from outside can couple into the circuit.
(https://www.richis-lab.de/images/REF01/32x11.jpg)
As in the LT1088 (https://www.richis-lab.de/LT1088.htm (https://www.richis-lab.de/LT1088.htm)) and the LTZ1000A, a special material was used to bond the die in the housing. It is a polymer with small glass beads. The glass beads provide a high thermal resistance between the integrated circuit and the housing. Since less heat is thus emitted to the environment, the ADR1001 reaches its set temperature more quickly and requires less heating power. This measure makes particular sense here, as the ceramic housing is connected to the circuit board over a large area. The polymer probably also helps to protect the die against mechanical stress. A polymer was also used in the ADR1000, but without an additional admixture.
(https://www.richis-lab.de/images/REF01/32x12.jpg)
(https://www.richis-lab.de/images/REF01/32x13.jpg)
The glass beads have a diameter of about 0,1mm. The layer under the die appears to consist of two layers of the beads, so should be slightly less than 0,2mm high.
(https://www.richis-lab.de/images/REF01/32x14.jpg)
(https://www.richis-lab.de/images/REF01/32x15.jpg)
The dimensions of the dies are 3,6mm x 3,3mm. Both the top and bottom images are available in higher resolution:
https://www.richis-lab.de/images/REF01/32x14x.jpg (https://www.richis-lab.de/images/REF01/32x14x.jpg) 6,59MB
https://www.richis-lab.de/images/REF01/32x15x.jpg (https://www.richis-lab.de/images/REF01/32x15x.jpg) 56,6MB
The ADR1001 is not yet extremely highly integrated, but like the ADR1000, it has two metal layers, making it difficult to analyze the circuit.
(https://www.richis-lab.de/images/REF01/32x19.jpg)
The design is obviously from 2020, and the pairs of letters are almost certainly initials of the developers involved.
(https://www.richis-lab.de/images/REF01/32x20.jpg)
In the upper left corner of the die there is a small test structure. Two transistors are connected in parallel. The emitters are connected to ground, base and collector can be contacted via testpads. Between them a resistor is integrated, which is visually hardly noticeable between the testpads.
(https://www.richis-lab.de/images/REF01/32x16.jpg)
The die has 20 bondpads, all of which are assigned to a pad on the housing. In addition to the two testpads of the test structure, there are four further testpads which are used for an adjustment of the circuit.
The reference potential REF6P6_S is tapped a little further inside the die. All other potentials contact their potentials in the outer area, where protective structures are located.
(https://www.richis-lab.de/images/REF01/32x21.jpg)
Two pads of the housing are used to transfer the ground potential. These are led to the die with two bondwires and are connected to each other there. The use of two pads and two bondwires reduces the resistance in the ground path. The relatively high temperature coefficient of the resistors is particularly problematic.
Among other ways the ground potential is transmitted in addition to the supply potential via the outer edge of the die. Particularly noticeable is the wide line, which is led diagonally downwards to the center of the die. A surprising number of large vias were used for the change from the lower to the upper metal layer.
(https://www.richis-lab.de/images/REF01/32x22.jpg)
A large part of the circuit can be identified on the die. In the center is the combination of Z-diode and transistor with its typical geometry known from the ADR1000 (blue). Unlike the block diagram, there is no resistor in the ISET path. Instead, there is an element in this path that could be a current sink.
To the right and left of the reference, large vertical strips are integrated, which consist of a series of resistors and transistors (red). These are the heaters for the temperature control of the ADR1001. The controller itself occupies a relatively large area above the reference. Large capacitors are integrated on the outside of the heaters and on the lower edge of the die. Some of the capacitors are accessed by the temperature controller. The temperature controller uses some tuned resistors. For this there are three testpads in the upper right corner. The output TCHIP is directly connected to the base-emitter junction of an otherwise isolated transistor (red/cyan).
The output buffer is clearly visible (green). The sensitive input stage is located between the reference and the right heater. The output stage, on the other hand, is on the edge, where there is less danger of it negatively affecting the reference. The opamp uses a considerable amount of the capacitors. The tuned resistors belonging to the output buffer are located near the center of the die, where the temperature is very constant.
The voltage divider, which is used to scale the reference voltage to 5V, is also tuned and is located in the center (purple). For the adjustment of these resistors a testpad is integrated at the right edge of the die.
The opamp supplying the reference (yellow) is also divided into two parts. The elements belonging to the input stage cannot be clearly identified, but they are located between the left heater and the reference, as one would expect. The output stage of the opamp is integrated between the left heater and the edge.
(https://www.richis-lab.de/images/REF01/32x25.jpg)
(https://www.richis-lab.de/images/REF01/32x24.jpg)
The two voltage dividers show the known traces of an alignment. In addition, there are two structures at the lower edge consisting of three and four elements, respectively, which are connected to the voltage dividers. The purpose of these structures remains unclear.
(https://www.richis-lab.de/images/REF01/32x17.jpg)
(https://www.richis-lab.de/images/REF01/32x18.jpg)
The structure in the center of the die strongly resembles the combination of Z-diode and transistor known from the LTZ1000 and the ADR1000. What seems absolutely logical at first glance raises questions when you recall the structure of this device.
As shown in the ADR1000, the base of the transistor contacts the substrate. The emitter potential is thus more negative than the substrate. In the LTZ1000 and in the ADR1000 this is not a problem, because there are no additional circuit parts on the die apart from a transistor for temperature measurement and a heater resistor.
In the ADR1001, however, a very extensive circuit is integrated on the same die. In addition, the emitter of the Z-diode/transistor combination is connected to further circuit parts. Either the reference structure in the ADR1001 is designed differently than in the ADR1000 or a process was used in which the active structures are completely isolated from the substrate.
The multiple collector connection known from the LTZ1000 and the ADR1000 is not found here. The only contact leading to the collector layer is found at the top right. Surprisingly, the collector is connected to the base of the transistor structure.
(https://www.richis-lab.de/images/REF01/32x23.jpg)
Around the combination of Z-diode and transistor there are four more transistors. Two of the transistors (T1/T2) are used for temperature control. The other two transistors (Q2/Q3) seem to have a functional part in the voltage reference and represent the branch that one would actually look for within the special structure.
https://www.richis-lab.de/REF29.htm (https://www.richis-lab.de/REF29.htm)
:-/O
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Those beads looks like fish eggs. ;D
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I wonder where that 1.7ohm resistor at the buffer's output comes from.. Could we see it on the die?
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The structure in the center of the die strongly resembles the combination of Z-diode and transistor known from the LTZ1000 and the ADR1000. What seems absolutely logical at first glance raises questions when you recall the structure of this device.
As shown in the ADR1000, the base of the transistor contacts the substrate. The emitter potential is thus more negative than the substrate. In the LTZ1000 and in the ADR1000 this is not a problem, because there are no additional circuit parts on the die apart from a transistor for temperature measurement and a heater resistor.
In the ADR1001, however, a very extensive circuit is integrated on the same die. In addition, the emitter of the Z-diode/transistor combination is connected to further circuit parts. Either the reference structure in the ADR1001 is designed differently than in the ADR1000 or a process was used in which the active structures are completely isolated from the substrate.
The multiple collector connection known from the LTZ1000 and the ADR1000 is not found here. The only contact leading to the collector layer is found at the top right. Surprisingly, the collector is connected to the base of the transistor structure.
Around the combination of Z-diode and transistor there are four more transistors. Two of the transistors (T1/T2) are used for temperature control. The other two transistors (Q2/Q3) seem to have a functional part in the voltage reference and represent the branch that one would actually look for within the special structure.
I think what happens here is that the central structure is just an ordinary buried zener. There is no transistor there and no connection to the substrate. The contact in the center is a sense connection to the anode and a separate force connection ("ISET") surrounds the cathode like in ADR1000.
Q2 and Q3 perform the function of Q1 from ADR1000. The schematic you suggested doesn't work, because with one zener and two PN junctions in series their thermal coefficients wouldn't cancel out.
I wonder where that 1.7ohm resistor at the buffer's output comes from.. Could we see it on the die?
Nothing immediately evident.
I think there is direct metal connection from BUF_F pad to the feedback network (the green R on Noopy's image, near the purple R), but those metal traces are thin so they may have significant resistance causing problems when load current flows through them. Not yet sure where exactly the output transistors are and how they are connected.
It's how ya doin'. Ideally, the feedback network should have a separate bonding wire going to the package pin or even a separate pin to include PCB parasitics (or buffers) in the feedback loop. They could have freed up one pin by removing REF6P6_F and connecting it internally to the cathode; not sure what's the point of making this connection externally.
edit
On second thought, I shouldn't suggest removing force/sense from REF6P6 when complaining about lack of force/sense on BUF. But maybe the 5V divider could be hardwired to REF6P6_S.
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..It's how ya doin'. Ideally, the feedback network should have a separate bonding wire going to the package pin or even a separate pin to include PCB parasitics (or buffers) in the feedback loop. They could have freed up one pin by removing REF6P6_F and connecting it internally to the cathode; not sure what's the point of making this connection externally.
Yep, hopefully they would do it in the ADR1002 as we discussed here earlier :)
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Those beads looks like fish eggs. ;D
Indeed! ;D
I think what happens here is that the central structure is just an ordinary buried zener. There is no transistor there and no connection to the substrate. The contact in the center is a sense connection to the anode and a separate force connection ("ISET") surrounds the cathode like in ADR1000.
Q2 and Q3 perform the function of Q1 from ADR1000. The schematic you suggested doesn't work, because with one zener and two PN junctions in series their thermal coefficients wouldn't cancel out.
Thank you for your input! :-+
That sound very reasonable. I didn´t think of the possibility that it is just a buried zener.
I will do an update later the day.
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Nice work Noopy :-+
Would have thought they would use 4 T-sense transistors located around the 4 corners of the zener structure similar to a cross coupled quad to control the thermal gradients within the quad interior such that the structure "sees" and iso-thermal environment in X and Y which would also require 4 heating resistors.
Anyway, the chip designers know what they are doing and guess there was no need for the extra complexity.
Great work as usual :clap:
Best,
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@Noopy: TCHIP pin - that pin is not indicated in the known pin description - there is the "NC".
In the LTSpice model there is a signal called TCHIP, which outputs the chip temperature in Celsius (at least it is my current understanding).. What that pin 2 actually does then?
Weird.. :o
PS: it goes to the T transistor near the zener, but the signal follows also somewhere around the zener (and there is a resistor hanging on it as well)..
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@Noopy: TCHIP pin - that pin is not indicated in the known pin description - there is the "NC".
In the LTSpice model there is a signal called TCHIP, which outputs the chip temperature in Celsius (at least it is my current understanding).. What that pin 2 actually does then?
Weird.. :o
PS: it goes to the T transistor near the zener, but the signal follows also somewhere around the zener (and there is a resistor hanging on it as well)..
In my view pin 2 is the pin to check the temperature with the transistor T. Put a Pull-Up or a current source there and you get the Vbe of the transistor.
In the schematic of the Eval-Board there is just n.c., perhaps because it´s just for internal use... :-//
Take a closer look at the transistor, it´s just connected to TCHIP (and to GND). The two metal layers are hard to read.
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Thanks to e61_phil for sponsering the ADR1001 for teardown and thanks for the teardown images. I see what I have expected to see, a single die solution, which confirms that ADR1000 and ADR1001 drift behavior is not comparable.
-branadic-
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Single die and different physical structure of the reference core than ADR1000.
In my view pin 2 is the pin to check the temperature with the transistor T. Put a Pull-Up or a current source there and you get the Vbe of the transistor.
In the schematic of the Eval-Board there is just n.c., perhaps because it´s just for internal use... :-//
Take a closer look at the transistor, it´s just connected to TCHIP (and to GND). The two metal layers are hard to read.
That's what it looks to me as well, a simple thermal diode between TCHIP and REF_GND. Not functional without external bias and certainly not calibrated centigrade.
The TCHIP trace comes from north in the lower layer and connects directly with the base and collector (south).
The REF_GND trace comes from south in the upper layer, jumps through a via to the lower layer near the emitter and connects with it.
The crossing of these two traces is why it looks confusing.
Similarly confusing are the connections from BUF_F. I think it first goes north in the upper layer, then jumps to the lower layer and moves south. Near BUF_F pad it branches west in the upper layer to the output stage and also continues south to the feedback network. Hence a section of metal trace and of course bonding wire and pin are outside the loop.
The output stage looks like a bunch of paralleled emitter followers powered from VIN, so not exactly LDO. The model is wrong.
The unconnected pad under 5V divider output appears to be 2.5V. Maybe there is some lineup expansion coming ;)
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Isn't that bulk material sapphire? SOS technology perhaps?
And what about the resistor's material?
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Doesn't look much different from any standard nocomplementary bipolar process with NPNs and lateral PNPs.
Probably junction isolation, I think the substrate is grounded to HTR_GND and if I'm right this will need to be the lowest supply rail in the circuit.
It could be lower than REF_GND in particular. Earlier, somebody with apparent insider knowledge reported that BUF_GND can also be lower than REF_GND and -5V output from the buffer amp is officially supported.
Some sort of metal film resistors are deposited on the surface and trimmed by laser; Analog has been doing this since forever.
Visually it's all very similar to their older AD58x references from late '80s or the ADR1000.
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I have updated the pictures/text on my website with the hint magic gave us. :-+
(https://www.richis-lab.de/images/REF01/19x12.jpg)
(https://www.richis-lab.de/images/REF01/32x26.jpg)
This is the ADR1000 structure.
(https://www.richis-lab.de/images/REF01/32x27.jpg)
(https://www.richis-lab.de/images/REF01/32x28.jpg)
I now assume in the ADR1001 it looks like this. The emitter is missing and the contact in the middle changed to a Anode Sense.
If you look closely and compare it with the ADR1000 structure you can see that there is a ring missing. That is the emitter area.
(https://www.richis-lab.de/images/REF01/32x29.jpg)
The big pictures looks like this.
https://www.richis-lab.de/REF29.htm#Update (https://www.richis-lab.de/REF29.htm#Update)
:-/O
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You could add the connection between anode force and the isolation island to your cross section diagram.
(And link the other ADR1000 image with section lines marked on it).
Now I don't understand why they removed the transistor from there.
Substrate connection had to go for obvious reasons, but it looks like the transistor could remain inside and still work normally :-//
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Are you sure there is a connection between Anode Force and Substrate?
We don't see a segmented collector feed. My assumption is that the whole circuit is embedded in a closed collector well.
That would isolate the zener and on the other hand there is just a minor increase in resistance. But the resistance is not critical since we have a sense pin.
With this in mind it makes sense that they had to delete the transistor.
They had to get a Anode Sense contact and perhaps the increased base resistance (without the use of the substrate) would have been problematic.
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@Noopy: shouldn't be there p+ beneath the Anode Sense in your picture above (ADR1001)?
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I don't see an additional structure and I don't think it is necessary.
"Normal p" has a little higher resistance but it is just the sense connection with low currents. In a transistor "normal p" is good enough for base connection too.
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An update..
Note:
34401A, 100NPLC, 10M input
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
18.2.23 powered off for 16 hours
5.3.23 powered off for 20minutes
17.3.23 - the first "metro-LAB measurement" Vref = 9.999.895Volt, powered off for 3 hours
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17.3.23 - the first "metro-LAB measurement" Vref = 9.999.895Volt, powered off for 3 hours
with the same uncertainity as the other measurements?
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I expect these uncertainties of ±0.7 ppm to be a bit too overoptimistic, not sure where these are coming from. :-//
-branadic-
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17.3.23 - the first "metro-LAB measurement" Vref = 9.999.895Volt, powered off for 3 hours
with the same uncertainity as the other measurements?
After several measurements in two labs I will evaluate.. A long way to go..
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I now assume in the ADR1001 it looks like this. The emitter is missing and the contact in the middle changed to a Anode Sense.
If you look closely and compare it with the ADR1000 structure you can see that there is a ring missing. That is the emitter area.
(https://www.richis-lab.de/images/REF01/32x29.jpg)
I'm now quite confident that this is correct indeed.
There are no meaningful connections to D1 anode-sense and Q2+Q3 base, only a reverse-biased PNP which activates under some abnormal conditions.
Q2+Q3 collector is loaded by R1 (the long resistor north-west of the reference cell) to REF6P6_S, as in usual ADR1000 applications.
There is no opamp; Q2+Q3 collector drives a sequence of two NPN inverting gain stages south of the reference cell, also resistively loaded.
The final gain stage drives a PNP emitter follower and then the NPN emitter followers at REF6P6_F output.
All other PNPs near the gain stages are reverse biased and irrelevant in normal operation.
The circuit immediately west of the reference cell looks like a bias generator.
Everything checks out. Q2+Q3 replaces the Q1 of ADR1000.
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This reverse biased pnp at D1 anode seems strange to me. I first thought it is a current sink but as you stated it doesn´t seem to act like this. But what else does this thing? Some kind of overvoltage protection? :-//
That there is no opamp fits with my analysis. That puzzled me a little. Have to think about that...
West of the reference cell is a bias generator. I agree with that too.
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There is no absolute need of an op-amp for the voltage output. The normal circuit uses the base votlage of the Q1 resp. Q2+Q3 transistor as a more or less fixed referene point. There is not real issue in just using a seprate transistor in a high gain amplifier. A more specialized amplifier can be a bit simpler than a full single supply OP-amp.
I am not sure of the process allows for good PNPs, that maybe needed for a single supply OP-amp.
The PNP found withput an obvious purpose could be a thing for the start-up, e.g. to prevent a stable state with zero current.
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Sounds reasonable, thanks! :-+
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I was also surprised with the low count of transistors on the die, I expected much more stuff there TBH, but indeed you do not need full-fledged opamps for dealing with a rather limited voltage/current ranges. Would be interesting to see the schematics of the entire chip, even I doubt we will see it in the upcoming DS.
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I expected ADR1000 with resistors integrated on-die, some cheap R2R dual opamp from Analog and a bunch of wires jumping back and forth.
Maybe the package is too small for that. Such design would also need a few MLCCs.
The reference loop is very simple. I haven't looked at thermal regulation, but there aren't too many transistor there. The buffer opamp is oddly complex, more complex than the usual OPwhatever7 we have seen in the opamps thread.
No way in hell they will bother reproducing full schematic in the datasheet. Not sure if I will bother either, but you can ask if you have specific questions. Or trace the circuitry yourself.
Regarding the "weird" pins,
TCHIP is a thermal diode, as discussed. Beware that it dumps its bias current to REF_GND, so using it may increase reference voltage by some μvolts.
PWRGD is an open collector output, its emitter also goes to REF_GND. According to eval board wiki, it only turns on during warm-up and turns off when the chip hits operating temperature.
I am not sure of the process allows for good PNPs, that maybe needed for a single supply OP-amp.
They could put a whole LT1013 there. But what's the point.
The Q2+Q3 stage has ~200x gain by my estimation (any other opinions?), so Vbe stability and thermal tracking of the next stage can be 200x worse than Vbe stability of Q2+Q3.
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I expected ADR1000 with resistors integrated on-die, some cheap R2R dual opamp from Analog and a bunch of wires jumping back and forth.
Maybe the package is too small for that. Such design would also need a few MLCCs.
That hybrid solution would be a pretty expensive device these days, I am afraid. They targeted (end 2022) $60, what is the price of an LTZ/ADR1000..
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Not having large capacitors is a good point. The standard LTZ1000 circuit uses quite some capacitors, especially in the temperature regulation. Even when integrated on the chip the termal system is relatively slow and ideally would like rather long time constants in the regulation. Getting this with the limited on chip capacitors is tricky. One the other side the heater is using transistors instead of a resistor. This makes the heater much more linear and thus simplifies the regulation. The LM399 also gets thermal regulation without large capacitors.
For the voltage loop not having a normal OP-amp can even simplify the compensation, as the LTZ1000 system has a gain of some 200 from the transistor that make the compensation with a normal OP-amp tricky. Here the ADC1001 could likely use a simple dominant pole compensation and no large capacitor needed.
For the extra output OP-amps the circuit looks large. In part this could be from splitting it between the temperature regulated part in between the heater to get low drift and the output stage that ideally has some distance to the reference and distribuited heat at the outside. One should still avoid drawing much current from the OP-amp as the extra heat on the die could disturb the reference. So the position of the extra gain setting resistors at the op-amp is odd. I would really have preferred the resistors connected to the inverting input instead.
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An update..
Note:
34401A, 100NPLC, 10M input
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
18.2.23 powered off for 16 hours
5.3.23 powered off for 20minutes
17.3.23 - the first "metro-LAB_A measurement" Vref = 9.999.895 Volt, Fluke 8588A, powered off for 3 hours
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Hmm,
-1.7 ppm in 2.5 kHrs looks better than my ADR1000 with -2ppm/srqrt(kHr)
with best regards
Andreas
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Hmm,
-1.7 ppm in 2.5 kHrs looks better than my ADR1000 with -2ppm/srqrt(kHr)
with best regards
Andreas
Sorry Andreas, that is what I see here.. Perhaps the ovenized on-chip resistors make the difference? Anybody else is measuring the ADR1001???
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nobody else will be able to get one for a while so guess not
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An update..
Note:
34401A, 100NPLC, 10M input
7.1.23 powered off for 10minutes
24.1.23 powered off for 20minutes
18.2.23 powered off for 16 hours
5.3.23 powered off for 20minutes
17.3.23 - the first "metro-LAB_A measurement", powered off for 3h
18.4.23 - the first "metro-LAB_B measurement", powered off for 1h
Another great day - my first LAB_B measurement (thanks!), this time with a HP3458A and a trusty Fluke 8508A. This time my box spent almost a day in the lab B prior to the measurement, the measurement with thr Fluke 8508A has been provided together with a quick check with a hot 732C (0.6uV uncertainty as per last report) and it proved to be spot on within some +/- half of a uV with my test leads :) Below some shots while playing with the meters, it has been a great fun :)
PS: fixed the part numbers :)
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Hello,
I recommend for the next time when you have access to this lab, to use statistics and voltage reversal to get proper measurements, i.e. including Standard Deviation and e.m.f. removal.
See my example here:
https://www.eevblog.com/forum/metrology/lowest-drift-lowest-noise-voltage-reference/msg4792004/#msg4792004 (https://www.eevblog.com/forum/metrology/lowest-drift-lowest-noise-voltage-reference/msg4792004/#msg4792004)
On my 3458A, I always use its built-in statistics function with 10 .. 16 times NPLC 100 measurements for each polarity, i.e. about 2x 30 secs. 30 secs give the lowest StD of about 2x10-8, judging from Allan Deviation statistics, and as can be seen in my protocol (e.g. 80nV/7.176V ~ 0.011 ppm StD).
The difference of these averaged measurements divided by 2 gives the mean value of the reference, w/o e.m.f.
Their sum divided by 2 gives the e.m.f. value, so you can estimate, how good your electrical connections are.
Frank
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@Frank - thanks, I'll do next time. I tried the reversal with both (therefore my shots show negative numbers). For precise measurements as you do one needs some time I had not.. My box spent 19 hours there, not me , unfortunately :). The goal with the first LAB measurements had been to get some basic numbers and refresh the contacts. Next LAB A/B measurements in summer (this year hopefully) and I will try harder with the built in math too..
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Out of curiosity I wrote a short python prog which reads my .csv files, extracts T_amb and raw 34401A voltage, and takes last 5000 samples (NPLC100) of the longer over-night measurements only, thus the measurements are evaluated upon samples acquired during the very morning while the meter has been warmed-up for at least 6-8 hours. Below the results for comparison, together with the LAB A/B values. I will know more after the second LAB A/B measurements..
PS: the original graph I've been posting here contains some shorter measurements (not good) which made the January pretty hairy. Also I do there adjusting for gain/offset/TC_dmm, but the difference is rather small - taking in account the unknown uncertainty of my measurements :P
Edit: removed the TC graph (not related)
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I think I have to rethink :D my power supply in the box. Currently I've been using AC w/ the transformer - I chose a small EI core trafo with split bobbins for primary and secondary, no shielding. It seems to me the capacitive leakage is still there (even I see no diff here with my 34401A - w/ or w/o an additional isolation transformer made of two b2b tranformers). While watching MarcoR'es video on "the extreme isolation" it is clear it affects the measurements and the meters may react differently on a common mode leakage. Most probably I would add a connector on the box for an external Li_ion (5S) bypassing the trafo during the measurements (the trafo will work during aging only).
PS: the video YT/watch?v=9JinSfCKuNQ
PPS: how to add a link to an YT video such it will not start to play here??
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In my ADR1399 setup the transformer is external, as well as recitifier, capacitors and linear regulation pass transistor, as its heat production is affected by mains voltage variations. Opamp and resistors of the supply remained inside the box. Everything in the box runs from a constant 20 V supply voltage derived from the 10 V precision output.
I think the ADR1399 works better with 20 V for the heaters.
I also want to add as backup a lithium ion pack that i bought at the local discounter (meant for handheld drill/screw driver).
Regards, Dieter
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I modded the box a little bit - the front panel post for the internal Vcc measurement is now external battery input (via a diode). I made an overnight measurement with 20V ext battery and the temperature inside the sandwich dropped by aprox 1.5C (against the AC powering where the transformer generates some heat). That T_board drop may result in aprox +2.2uV increase at the same ambient. In my box the PSU part (in the back of the box) is in "open air" (there are the vent slots in the top/bottom walls), the reference sandwich is isolated with foam (in the front of the box).
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An update:
In order to create more confusion - here are both graphs - with "my TC compensated 34401A" and with "the raw 34401A" data.
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An update: with the higher ambient the measurements get more hairy :)
PS: I've been using +0.5ppm/C for the TC_DMM compensation, the latest "statistics" shows it should be 0.47ppm/C, what is rather small difference considering the behavior of the 399 inside the DMM (the typical random walk of the 399 is within 1ppm during an overnight measurement) ::)
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iMo,
I think your measurements using the 3458A will be done quickly. Have fun!
Here's a recent stability measurement on the ADR1000, and its Allan Deviation.
That indicates, that a sampling interval of about 20..40sec will give best StD performance for the 3458A.
I.e. NPLC 100, 10..16 samples is sufficient
I will have a closer look on the 3458A stability directly after an ACAL..
Thanks again for the hint to the latest 3458A manual from March 2023, page 77, that 15min. of waiting time after an ACAL DCV should be obeyed.
Frank
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Hi Frank!
Thanks for the hints on the 3458A measurements, unfortunately the 3458A is in a permanent action during working hours this summer, thus I've made measurements with the Fluke 8508A only.. 3458A in October/November this year most probably. There is still LAB1 with the Fluke 8588A and with a planned measurement in August this year.
Anyhow, I incorporated your hints into below measurements, at least I hope so :D
BTW - I've got an info from ADI the ADR1001 will most probably be released in FEB 2024..
####
A new LAB measurement today - this time in LAB2 and with Fluke 8508A.
The previous measurement with the same 8508A in the LAB2 (April 18th):
Vref = 9.9998697
Vref = -9.9998745 at T_amb=21.1C, T_board=35.49C, AC powered.
This time aprox 5.5uV higher at T_amb=23.0C, T_board=35.52C, battery powered.
Below the results - the measurements were performed in a sequence from "A" to "O".
The green 10xFast measurements - the math has been performed inside the Fluke.
The shot as usual for demo purposes, during the measurements the myADR box was placed about 50cm off the meter.
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Hello iMo,
many thanks for your measurements.
The Fluke 8508A should have very similar noise figures compared to the 3458A.
I don't quite understand, which NPLC number you have used, or what means "SLOW" and "FAST", so to compare your measurement with the NPLC 100 on the 3458A. A NPLC 100 measurement takes 2sec sampling and 2 sec Auto Zero, so about 4.1 sec in total.
20sec each measurement on the FLUKE 8508A, does that indicate NPLC 500 or even NPLC 1000?
The StD values seem to be much too high, I always achieve around StD = 120nV or less on the ADR1000.
On the usual LTZ1000 references, I see slightly higher noise.
Therefore, I suggest that you do an absolute noise measurement.
Btw: I have to build an ADR1001 board as well, as I got one sample here.
Frank
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Yep, the 0.6-0.7uV STDEV is in range I get with my 34401A measurements at 100NPLC and over 100 samples (in quiet periods).
There are some results with around 0.3uV - that is definitely off my 34401A capabilities, indeed.
It could be the opamp (OPA189) in my wiring is causing that? Cables and the air drafts caused by the air-condition?
Has to be measured by the experienced voltnuts here who are having those nice LNAs :)
The NPLC number of the Fluke5808A in "slow" and "fast" settings - hmm, I have to investigate :)
Slow - ~20secs per sample
Fast - ~6secs per sample - I did it with NRDGS=10, performing 10 samples in series, then it printed out the Mean and STDEV, thus the "measurement" was 60secs in total.
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Yep, the 0.6-0.7uV STDEV is in range I get with my 34401A measurements at 100NPLC and over 100 samples (in quiet periods).
There are some results with around 0.3uV - that is definitely off my 34401A capabilities, indeed.
It could be the opamp (OPA189) in my wiring is causing that? Cables and the air drafts caused by the air-condition?
...
Slow - ~20secs per sample
Fast - ~6secs per sample - I did it with NRDGS=10, performing 10 samples in series, then it printed out the Mean and STDEV, thus the "measurement" was 60secs in total.
So the FAST measurement is comparable to the NPLC 100 measurements with the 3458A.
You'll always see a convolution of noise from the ADR1001, the OpAmp and the 8508A noise.
Your OpAmp will presumably not contribute that much, as well not the FLUKE 8508A.
I think that the ADR1001 itself is more on par with the LM399, than with the ADR1000.. don't know why.
I'll have to build my sample asap, to find out.
Frank
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Fluke 8508A in DCV:
Normal mode (aka "slow") at 8.5 digits resolution is 16x64PLC (25secs)
Fast mode at 8.5 digits resolution is 4x64PLC (6secs)
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Below you may see the schematics of the output buffer as is used today - V1.
The critical parts I see are the R1=10k, and the missing opamp's feedback blocking (like 1k+1n).
I plan to make changes in it - see the new V2.
Not sure whether it could help with the noise, however.
Anyhow - I will change the R1 to 1k, add the feedback RC (R5, C7), add the R6 and remove the tantalum 1.5u.
Also what opamp to use?
Any hints would be welcomed..
PS: the TVS is P4KE12A (next time perhaps P4KE15A, to be not so close to the 10V)..
PPS: also thinking to lower the oven temperature, to something like 45degC..
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The sim shows something like +0.35C oven temperature per kiloOhm on the lower end (RTEMP wired to the 6V6). It looks like no special low TC resistors are needed there..
Mind it is a model only.
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PS: the TVS is P4KE12A (next time perhaps P4KE15A, to be not so close to the 10V)..
Hello,
I would go for a stand off voltage of 11 V (so either a P4KE13A or a PTVS11VP1UP)
see here:
https://www.eevblog.com/forum/metrology/ad587lw-10v-precision-travel-standard/msg2372532/#msg2372532 (https://www.eevblog.com/forum/metrology/ad587lw-10v-precision-travel-standard/msg2372532/#msg2372532)
TVS voltage should clamp @20-50 mA below supply voltage of the OP-AMP in case of a accident with back to back operation with a calibrator.
Hopefully R5 limits the current in this case.
with best regards
Andreas
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The question is whether the TVS diode is not starting to fire (thus generating noise) when so close with the stand-off voltage to the 10V.
A good topic for a measurement when you have the LNA etc handy..
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Below you may see the schematics of the output buffer as is used today - V1.
The critical parts I see are the R1=10k, and the missing opamp's feedback blocking (like 1k+1n).
I plan to make changes in it - see the new V2.
Not sure whether it could help with the noise, however.
Anyhow - I will change the R1 to 1k, add the feedback RC (R5, C7), add the R6 and remove the tantalum 1.5u.
Also what opamp to use?
Any hints would be welcomed..
PS: the TVS is P4KE12A (next time perhaps P4KE15A, to be not so close to the 10V)..
PPS: also thinking to lower the oven temperature, to something like 45degC..
Another thought, you could use a couple 1N4004 on the output, one to ground and the other to the supply voltage. This protects the output transistors and the op-amp. To further protect the op amp a couple 1N4148 diodes (or low leakage if you prefer, but probably won't matter) to ground and supply voltage on the negative input to the op-amp, the 1K or whatever you use here, acts as a current limit, so this should do a good job of protecting the op-amp.
Best,
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The question is whether the TVS diode is not starting to fire (thus generating noise) when so close with the stand-off voltage to the 10V.
A good topic for a measurement when you have the LNA etc handy..
Hello,
obviously I had not measured noise again after inserting the TVS for my ADR587LW 10V references.
So I repeated noise measurement and compared it against a measurement before inserting the transient zeners.
https://www.eevblog.com/forum/metrology/ad587lw-10v-precision-travel-standard/msg4976209/#msg4976209 (https://www.eevblog.com/forum/metrology/ad587lw-10v-precision-travel-standard/msg4976209/#msg4976209)
So at least for the ADR587LW with ~4uVpp noise there is no measureable change.
with best regards
Andreas
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What could be the experiment with the TVS:
1. wire the TVS as a zener with cathode resistor, with say 1k cathode resistor (could be a different value)
2. change the voltage from say 9V to 14V (with your 11V TVS), step 0.5V for example
3. measure the noise at the TVS' cathode at each voltage.
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What could be the experiment with the TVS:
1. wire the TVS as a zener with cathode resistor, with say 1k cathode resistor (could be a different value)
2. change the voltage from say 9V to 14V (with your 11V TVS), step 0.5V for example
3. measure the noise at the TVS' cathode at each voltage.
Hmm,
1K against 1K input resistance of the LNA gives 6 dB dampening in case the zener resistance is high (not conducting).
My preferred (low noise) NiMH Battery has 1.2-1.35 V voltage steps dependant on charge state.
with best regards
Andreas
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Today the second measurement in the LAB1.
The numbers are close to the LAB2 second measurement I made a month ago (-1.8ppm).
This time the Fluke 8588A, calibrated in June (the same meter as in the first measurement in March).
Below the results - triggered with 10 samples, 10seconds each sample (8588A's default), total 100secs per measurement, made in sequence from A to J. The Mean and the Standard Dev (in ppm) comes from the meter's statistics.
There is some noise coming from the air drifts and thermal radiation off our bodies - as the first 6 measurements were made as we were sitting aprox 1m off the wiring. The "minus" measurements were made with us aprox 2m off the wiring.
As an example of that influence is the measurement "X" were we were waiving with hands while discussing aprox 1m off the wiring (not included into the results).. :D
Below also a measurement with my 34401A over last night.
As the next step I am going to add the 1k resistors into the inputs of the OPA189.
PS: in the picture below you may see the Fluke shows STDDEV in Volts, the resolution was only 0.1uV though, therefore we switched into "ppm" mode, where, luckily, we got by one digit more :)
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After I had spent a day with experimenting I wired the output buffer as you may see below.
I replaced the OPA189 with an ADA4523. On the first glance I do not see any difference between them, both behave the same way, output voltage the same, the noise needs longer observation (but I doubt I would see some difference in my noisy setup).
I also put a 100n foil in the feedback with 1k resistor in series.
The output voltage is the same as before, we will se how the new ADA4523 will do.
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The output buffer - after a series of experiments I settled with the V5 - see below. I have not seen a difference using the ADA4523 with compensation there thus I continue with the OPA189.
Below also the latest aging report.
The measurements are already challenging the capabilities of my 34401A pretty much. Without the TC compensation and having the DMM 24x7 on for at least 2-3 days after a week powered off the results will be much hairy, imho.
What I've learned in the last 10 months:
1. the TC of my meter is aprox +0.5ppm/C in 38-46C internal DMM temperature (I have the LM35 sensor glued over the ADC)
2. the humidity (?) after the meter is powered off affects the values +2..+3ppm and slowly settles down after 2-10 days after the meter is powered on
3. there is a random walk which is typically <1.5ppm peak-peak within an overnight measurement, the running STD (over last 100 samples, 100NPLC) shows typically 0.7-1.2uV (that includes temperature changes), in quiet periods 0.6-0.8uV
4. the ADR1001#1's voltage dropped down by some 2-2.5ppm in last 10 months, and its TC looks like -0.14ppm/C
5. the difference between a battery vs an ac_mains powering the Vref is not visible in my case (here the reference pcb sandwich is isolated by ~1.5cm thick foam inside the box, and its internal temperature measured by an LM35 typically rises up by 1.2C when powered off the transformer placed in the same plastic box with air vent slots)
6. I messed with the R1 values from 1k to 47k. I saw none difference in the measurement noisiness except a small drop of the output voltage, perhaps 1-1.5ppm with the 47k.
Also, it would be great if our better equipped contributors here would be kind enough to analyze in detail the performance of the AZ opamp buffer as depicted below, for the stability and noise (and will suggest improvements).. In the next Vref I would put an 1k into Q2 base, and not sure whether to filter out the AZ switching at the opamp's output..).
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Hello,
I would add a small frequency compensation capacitor across output and negative Input of OP-Amp.
with best regards
Andreas
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Below is the LTspice Stability Analysis of the V5 output buffer without a comp cap and with a 1nF and 10nF comp cap.
It looks to me the best stability is without a comp cap..
Made with the ADA4523 as the OPA189 model does not work here properly..
Also attached is the .asc file for the simulation..
PS: set the Gmin=1e-16 in the sim settings..
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A hundred times faster sim version below..
The above slow math came from switching power supply stability analysis by ADI, afaik..
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What do you derive from your V(a)/V(b) simulation about the Bode plot of your output stage as a whole?
I think with that 10K || 1.5 uF at the output there will be a bandwidth of about 10 Hz and at any frequency above that there will be a phase shift approaching 90°. Above 10 KHz or so the phase shift will approach 180° due to opamp internal compensation. What you want to see is whether the gain above 10 KHz is enough for oscillation and how the direct feedback capacitor cures the problem.
Regards, Dieter
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With the current setup in V5 (none fb cap) the large output capacitance (1.7uF) keeps the phase margin around 32deg which is rather low.
In order to improve the stuff one needs, for example, to lower the output capacitance (ie 100nF) and increase the R5*C_fb.
See below with R5=4k7 and C_fb 10p..100nF. With 1nF I can get 53deg already and with 10nF 85deg.
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Maybe the average reader has similar difficulties like me. For stability we are talking about noise gain, that is small signals and the output impedance of your buffer is about R3 = 25 Ohm. 25 Ohm * 100 nF gives 2.5 usec (low pass) and 4K7 * 1 nF gives 4.7 usec (high pass), so there is some overlap.
Regards, Dieter
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The sim above is small signal as well. The AC=1 is just a placeholder (that AC analysis does not work the same way as the transient analysis).
The entire stuff is stable when at 0dB gain (left axis) the phase margin (at the right) is larger than say 45deg (the diff against 0deg or 180deg), people say.
For example the red_gain (with C_fb=1nF) crosses 0dB at 23kHz and the red_phase margin there is 53deg.
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A quick look at open-loop responses of closed loop systems that are approximately 2nd order in behavior, is the open loop gain zero crossing should be ~-20dB/dec (-6dB/oct) for good stability. If the gain is dropping faster than -20dB/dec then the stability will begin to suffer.
If you look at the plots, the red trace is dropping a little faster than -20dB/dec and thus the PM is beginning to decrease as indicated at ~53 degrees which is just above critical dampening (~0.7 @ 45 degrees), where a PM of 60 degrees in overdamped. The blue and green traces are underdamped and likely to oscillate.
Best,
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Ok, I've opened the box and I've made perhaps the final improvement.. ::)
I've put a 22nF foil as the opamp's Cfb, and removed the 1u5 tantalum I had there at the output.
See below the sim - there is some safety phase margin for an additional capacitance at the output, if any.
I've put there in the sim the common mode choke I have there in hw from the very beginning as well.
Btw. - I've had a naive look at the output with my DS1062 (1mV/div) before and after - none oscillation visible.
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After running for two days since the change (removed the 1u5 tantalum at the output and inserted the 22n opamp feedback capacitor) the output voltage is aprox 2ppm higher than it was before.
That could be because:
1. the tantalum cap had large leakage (less probable considering the output impedance is pretty low close to DC), or,
2. the new 22nF foil (not a fresh wima but an older used one off the junk box) has some leakage (it should be around 20nA based on simulation such it increases output +2ppm), or,
3. the changed stability settings have made it somehow, or,
4. the AZ switching applies somehow.
Still there is the question around the AZ switching and the potential artifacts, now the inverting input is wired to the 22nF capacitor directly.
Not sure what from that might apply here...
PS: added Z_out sim, vertical axis is impedance in Ohms, the 1k in the base of Q2 is not in hw yet, and it has none influence on the stability or the Zout sims.
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The impedance, especially impedance mismatch between the input can effect the input bias current. It should not be enough to cause 2 µV of difference, but worst case it may.
There may also be an effect on the offset directly.
Foil capacitors have usually little leakage, much less likely than leakage with a tantalum cap.
P.s. the Z_out simulation is just stopping where it may get problematic.
For the lower frequency part it may want some extra 1-10 ohm + some 100-300 nF at the output to dampen the maximum in the impedance. This could reduce ringing. Maybe just a resistor in series with the 220 nF would be OK.
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Below the Z_out till 100MHz and with 0.01ohm (green) and 10ohm (blue) in series with the 220nF at the output.
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The dip at some 1 MHz is not that bad. It is just the output inductors and 220 nF capacitor, with the OP-amp FB part already with little effect.
10 ohm has barely an effect at the impedance maximum, but it helps a little. At least there is not extra peaking besides the transition from inductive to capacitive at some 10 kHz.
The 22 nF FB capacitor seems to make the amplifier quite slow and thus a relatively high output impedance (e.g. some 1 ohm at 100 Hz, e.g. some 1.5 mH effective inductance). One could consider a smaller capacitor, like 4.7 nF shift the curve to high frequency, lower impedance.
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Z_out - the 4n7 FB capacitor and 10ohm (blue) and 0.01ohm (green) in series with 220nF at the output.
Stability - 4n7 FB and 10ohm in series with the 220nF.
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Not sure what from that might apply here...
The question is: how much is the voltage difference between ADR1001 output and buffer output.
I would als try a 100nF directly at the VOut terminals. (after the 10uH).
with best regards
Andreas
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I would not mess with the ppm diff at this stage..
The priority is to design the output buffer first. I have to understand better how to approach the stability/compensation of the opamp vs. the output impedance/load, etc. ::)
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Below the Bode for ADR1001 output amplifier, Cout 100nF/1u/10u, and also with a 1nF feedback capacitor with the same Couts. We do not have official information on the chip yet, the model comes from 2022.
PS: added the 1.7ohm output resistor I assume it is there in the 2022 sample.
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A week back I did another change - see the V7 schematics below.
No change in the noisiness, nor in the output voltage after a week of running.
It seems that adding the C5 capacitor (4n7 or 22n foil) into the OPA189's feedback there simply moved the DC output by some 2ppm up.
Also I doubt we need the R1/C2 input low pass filter there. We have got the low pass filter after the zener's opamp inside the ADR1001 (see the 3k/9k3 divider with the 3u3 foil).
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Below the last ADR1001#1 measurement after almost a year on.
The hw V7, with the aprox 2ppm increase due to the added 4n7 feedback capacitor at the OPA189.
I've switched off the reference, and I will continue after some time to see the hysteresis, if any.
Hopefully the ADR1001 will be released soon such we can see in the DS how to wire it.. ;D ;D
PS: the latest message from ADI - around FEB2024
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This is the noise coming off myADR1001#1 10V reference box in the 0.1 to 10Hz band as shown with my \$\textrm{Noise Indicator}\$ (https://www.eevblog.com/forum/metrology/low-cost-lm399-noise-indicator/msg5055250/#msg5055250).
Both Vreference as well as the \$\textrm{Noise Indicator}\$ have been powered from batteries (each its own battery), the o'scope via an isolation transformer.
The Vreference itself is not shielded (a plastic box).
The voltage fed via an aprox 35cm long twisted CAT pair directly into the LM399 socket (located in the shielded \$\textrm{Noise Indicator}\$), the zener's cathode resistor disconnected.
The background noise with this setup is 0.16-0.18uVpp, with the wires shorted at one external Vref's post.
The indicated noise levels around 2uVpp (at 10V OPA189 buffered output) look similar (or better?) to the better one ADR1399 sample I have got (and less a half noise level of my best LM399s).
PS: the ADI's info in the first post here says "0.7uVpp in 0.1-10Hz at [onchip] buffer's 5V output"..
PS1: there is the standard 1uF serial 4R7 at the Noise Indicator's input in this setup (coming from the 399 zener's RC compensation). That actually loads the output of myADR1k#1 reference as well.
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Let me continue here with the ADR1001#1 vs HP399 (inside my 34401A) and vs LM399H#2 (inside my 34401A as the replacement of the HP399).
The old HP399 is pretty hairy - it pops and cracks couple of times every 12 seconds period on the o'scope screen when looking at it with my Noise Indicator (below see some shots). Its background noise is rather low, and perhaps once in many hours staring into the scope I saw a popfree clean 3.1uVpp which is at the best end of all my 399s.
When the HP399 was off the meter I replaced it with a LM399H#2 which showed me no pops in past (as seen with the noise indicator).
Below the results while measuring my ADR1001#1 based 10V reference (with also none pops while in Noise Indicator).
HP399 - it pops and cracks always, wildly, like radon gas in the cloud chamber, but it is "pre-selected by HP" and 25+ years in service, therefore its ADEV (pink) shows lower sigma with long taus. The amplitudes of its fluctuations are lower than those of the LM399H#2 it seems.
LM399H#2 - it "cracked" only 6 times over the night run >:( , amplitudes of the fluctuations are a bit higher.
Its ADEV (blue) is better at lower taus, worse at the longer taus compared to the HP399.
You may also see how a running STD can nicely detect the pops and cracks in the incoming data stream (like you staring into the smartphone at the incoming numbers and you see the STD is 1.5uV - it means something happened during last N samples)..
Conclusion - we need a Popcorn Indicator :D
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And the HP399 pops as seen on the scope.
10mV == 1uV
PS: Mind the pops here are derivatives of what happens - as the 0.1-10Hz filter is RC coupled (1000uF/1k5 high pass) thus a single short "pop" on the screen means usually a shift of the voltage up or down.
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I put the HP399 back into the DMM.
I wired a 3u3/50V Wima foil parallel to the HP399's zener as well as a 0.47u/40V tantalum to its heater (both caps soldered directly at its socket from the bottom).
I put a foam cap on the HP399 from top and bottom (aprox 3x3cm foam blocks).
The overnight run shows the capacitor has indeed some effect - see below - the ADEV and running STD are slightly better.
Better improvement would be easily possible with an RC low pass filter, imho, like 10k/3u3, that would require a replacement of the 706 opamp with something with say 10-20pA input bias (706 got max 200pA, and max 1.5uV/C, that is nothing special).
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The input bias of the AD706 is not that bad. It would be the least problem. If needed one could use less than 10 K and more than 3.3 µF for the capacitor. AFAIR I have some 5 K and 6.8 µF at my ADC circuit.
A film capacitor directly at the LM399 may not be that ideal as it could be borderline instable. Better have some series R or use an electrolytic with significant ESR.
The reference filtering for the HP34401 does not have to be very low cross over. There are mainly 2 frequency ranges where it helps: one is at low frequencies, like 2.5 / 25 Hz for 10 / 1 PLC operation and the other is at some 10-375 kHz as the as the modulation frequencies. The 2.5 Hz band is nearly out of reach and the higher frequencies are relatively easy.
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Hmm, doable..
Note: the pcb picture from xdevs.com
With say +-200pA max the Vref's voltage shift with a 10k resistor will be +-2uV which is rather negligible..
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Here is the myADR1001#1 aging report.
The jump there has been caused by adding the 4n7 feedback capacitor to the OPA189.
The myADR1001#1 and 34401A have been off for a week, then 4 days warm up of both.
No "visible" hysteresis observed.
The 34401A needs 3-4days for the warm up. There are two phases visible - first it goes some 1-2ppm higher after first 6 hours on, the second it is slowly dropping down for 3-4 days by those 1-2ppm and stays "stable". Would be great to know how to track down where it happens inside the meter, it is pretty annoying.. ::)
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This is how an overnight measurement looks like.
On top - raw data off the 34401A, then Median10 applied, then TEMA(0.005) applied.
Finally the raw data MADEV of the measurement.
The ADR1001#1 shows aprox 9.999878 Volt. I've been planning the LAB3 measurement around the new year, to get an idea where the reference fluctuated since April/July.
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That is wonderfully flat. Can you plot two weeks?
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I do 1-2 days only so far. Running it for 2 weeks at 100NPLC would require logging directly from the MCU onto an SDcard I do not have wired in yet. The logging via bluetooth into the smartphone (I've been doing now) is not reliable enough for such long term exercises. But what I can see so far the voltage sits on that value for several days and does a random walk within say +/-0.5ppm (raw not filtered) around the value based on the pops inside the references and EMI around.
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That is wonderfully flat. Can you plot two weeks?
This is a week of data, 100NPLC HP34401A.
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So Oct. 2023 passed and ADR1001 still isn't available at ADI website. But it seems like ADI sent 10 sample in November to someone in Shanghai, China (Leo Guo?).
Unboxing the world's most advanced constant temperature deep buried Zener voltage reference ARD1001 (https://www.youtube.com/watch?v=Dhi7PIOD_4Y)
Yet no sample order possible for me :(
-branadic-
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I think those came through a back channel? In the video they were packaged as loose pieces in the ESD bag, no label just felt pen writing on the ESD bag. A bit suspect.
That was in a blank U-Line (Canada) bubble mailer envelope, inside a DHL bag, inside a DHL box. A bit suspect.
Has anyone tried getting a quote on them from mainstream distributors?
edit: Could request an update either on the ADI voltage reference forum (https://ez.analog.com/voltage-references/) or contacting the team.
I suspect this part has LT roots, could go after the LT engineers for answers, the few that survived.
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Based on my info from ADI the planned release is FEB 2024.
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Hello,
did anyone already do some (thermal) hysteresis measurements.
For me the temperature range 25 -> 10 -> 25 -> 40 -> 25 deg C environment would be interesting.
Is the ADR1001 sensitive to tilting?
with best regards
Andreas
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Below today's startup measurement of myADR1001#1 box. Raw data after DMM TC correction. Vref box powered by the internal transformer as the power supply.
It made aprox -2ppm during the first 1.5h after the powering on.
The ref was powered off for 12hours (the longest power off since Dec2022), the final temperature inside the sandwich below was 35.5C. That indicates TC of myADR box aprox -0.14ppm/C (fyi the very first TC measurement in this thread - Reply #89 - was -0.144ppm/C).
Mind that it is the TC of entire Vref box, incl. the powering by the transformer ac power supply inside.
It settled down within the previous measurements levels, so the hysteresis is somewhere within the measurement noise.
34401A's 10V range was adjusted 3weeks back against the reference (after I replaced all 4 large elyts in the DMM), thus today I do TC correction only.
PS: the 34401A's adjustment step off the front panel is 10uV only at the 10V range.. :(
PS1: to be less optimistic I would rather draw the green box 1ppm wide :)
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If the Temperature variations are from changes in the room temperature, chances are the meter to read the votlage would also see the changes. So the measurement includes the TC of the meter too.
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I deleted the graph as I have to rethink the approach. The TC of the meter is always compensated in the postprocessing..
But I think the approach was wrong as the ppm vs Tamb included the aging drop..
So - you made 32 measurements (say during 1 year time frame), each made at certain Tamb, the TC of the meter is compensated against Tamb, and the Vref was dropping (because of the aging) during that time frame till say -2ppm at the end. How to get the TC of the Vref? Not an easy exercise, imho..
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How to get the TC of the Vref? Not an easy exercise, imho..
Why not temperature cycle the Vref over a larger temperature in a "environmental chamber" while keeping the DMM at constant temperature?
The other way would be to do 2-dimensional correlation (assuming that the ageing drift is linear over time or SQRT over time).
This is how I determined ageing + humidity coefficient of the AD586MNZ references
with best regards
Andreas
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That was just an idea of myself to look at the measurements I did last year and try to derive the TC of the Vref out of it as well. I have to have a look at the aging drift fit and perhaps try the correlation..
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And now the ADR1001 part has appeared on the ADI website
https://www.analog.com/en/products/adr1001.html#product-overview (https://www.analog.com/en/products/adr1001.html#product-overview)
Along with the user guide for the pocket calibrator part
https://www.analog.com/media/en/technical-documentation/user-guides/eval-adr1001-ug-2194.pdf (https://www.analog.com/media/en/technical-documentation/user-guides/eval-adr1001-ug-2194.pdf)
Now i need to try and get some......
The datasheet is still preliminary . I have no idea what AD gives for long term drift in datasheet page 3
Long Term Drift 6V6
200h -3ppm
1000h -5ppm
2000h -5ppm
Then at page 5 the 5V Vref
200h -2ppm
1000h -4ppm
2000h -5ppm
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Well, what I've been missing in myADR1001#1 reference box:
1. Rlimit in the heater (4.7-10ohm)
2. 100nF capacitor in the output buffer feedback (Fig. 48, between BUF_S and BUF_F, 10V output)
Otherwise the DS fits well my previous measurements and the LTSpice model (ie the temperature settings).. :D
What needs to be checked with production chips is the output resistance of the buffer (10V output)..
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Uh huh? The 6V6 and 5V long term drift specs and charts don't quite make much sense unless they're somehow implying that the divider is actually part of the TC compensation and 5V is more stable than 6V6 itself.
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And now the ADR1001 part has appeared on the ADI website
https://www.analog.com/en/products/adr1001.html#product-overview (https://www.analog.com/en/products/adr1001.html#product-overview)
Hmm,
the T.C. curves are rather "discrete" (10 degree steps)
What I am fully missing is any specification for temperature hysteresis. (only switch off hysteresis which is rather large).
And the T.C. sweep of Imo is also only over a 10 deg span.
with best regards
Andreas
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..Hmm,
the T.C. curves are rather "discrete" (10 degree steps)
What I am fully missing is any specification for temperature hysteresis. (only switch off hysteresis which is rather large)..
The chip has been released to market, ADI writes.. So it is up to the voltnuts here to elaborate in very detail.. ;)
The hysteresis interpretation (in comparison to the LTZ/ADR1k designs) could be tricky with such a part as it is ovenized with all components (except the RISET resistor) on the chip. Unless it comes to the "thermal deregulation" it should show no hysteresis, I would say (provided the RISET has zero hysteresis).
Would be great to see some precise measurements here.
I plan to look at the output voltage of myADR#1 in the LAB2 this week, afterwards I would make again a change (out of my curiosity) - I would set the temperature to 40C (TSET wired to 6V6), add the RILIMIT into the heater and a Wima 100n between BUF_F and BUF_S. The chip temperature change will move the output voltage significantly.
As discussed here a year back my wiring of the 2x10k resistors to the TSET led to significant chip temperatures, for aprox 30-40 hours long, and that could be considered the annealing process after the soldering the package into my trampoline wiring, as the DS indicates, even though ADI "has not thoroughly
investigated the efficacy of this approach".. ::)
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The RISET resistor characteristics are attenuated by a factor of 267 with respect to the 6.6 V reference output. That is, if the RISET value drifts by 10 ppm in the first 1000 hours of operation, that adds 10 ppm/267 = 0.003 ppm of drift to the 6.6 V reference.
I've been trying to decipher the RISET sensitivity out of the above info (DS rev0).
I reported (reply #84) roughly -300uV per ohm change (1/0.22*-60uV=-270uV), the LTSpice showed aprox -240uV per ohm change at the 10V output.
Say, the resistor is 110 Ohm, 10ppm drift means 10E-6*110=1.1mOhm change, that is 0.003E-6*6.6=20nV change.
So, 1ohm/1.1mOhm=909, and 909*20nV*10V/6.6V=28uV.
Hmm... :o
Ah..
10ppm/267 = 0.037 ppm, it seems..
Then
0.037E-6*6.6=244nV
1ohm/1.1mOhm=909, and 909*244nV*10V/6.6V=336uV.
:-+
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This is the LAB2 exercise from today.
Below the data I collected in the LAB2 - myADR1001# box spent 20h in the LAB2, then we made several short measurements, 10 readings averaged with SDEV, math done by the meters.
The shots will come later this evening :)
PS1: fyi - there is a 34401A measurement as well, after aprox 1h back at home.
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And the summary of LAB A B measurements.
As the measurements are the matter of my hobby only - the results are a little bit hairy, with not consistent methodology, done under time stress, facing great meters with lot of buttons and cables picking up any airflow around.. :D
Anyhow, it somehow follows the trend of my 34401A measurements.
The large step upwards comes from adding the foil feedback capacitor 4n7 to the OPA189 (also the two 1k resistors were added around the OPA189 in past with no measurable impact) as I reported several posts earlier (around +2ppm) here (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg5145849/#msg5145849) and here (https://www.eevblog.com/forum/metrology/adr1001-ovenized-voltage-reference-system/msg5147322/#msg5147322)..
Below I've made a quick recap table with the data, while considering the calibration against FL732C (when done) and TC of the box (aprox -1.44uV/C).
All is preliminary and needs some further elaboration (if any..) :)
PS: My big thanks to the LAB A B owners who helped me kindly with these experiments!
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https://www.analog.com/en/products/adr1001.html (https://www.analog.com/en/products/adr1001.html)
now with pricing and order option on the Analog webpage.
1.000 pieces for 65.34 USD each
500 pieces for 76.29 USD each
Not sure if it is actually possible to order yet
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Hm, actually I wanted to post that here:
https://www.eevblog.com/forum/metrology/lowest-drift-lowest-noise-voltage-reference/msg5315572/#msg5315572 (https://www.eevblog.com/forum/metrology/lowest-drift-lowest-noise-voltage-reference/msg5315572/#msg5315572)
::)
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The ADEV of the ADR1001 (the ADI's eval kit put into a metal enclosure) measured at PTB and presented by Luis during the "High performance digitizer and DC metrology meeting and mini workshop" in Bratislava today.
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For the shorter time scale the noise performance looks good. Still keep in mind that the 3458 also adds some (mainly white) noise from the protection and ADC, not just the reference noise.
For the longer time scale, like 10-100 seconds the ADR1001 noise does not look that impressive. Still a little better than the HP meter, but not much. I would guess some thermal fluctuations near the heated reference to contribute.
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Does the graph show the ADEV of a 3458A while it measures the 5V of this specific ADR1001?
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Does the graph show the ADEV of a 3458A while it measures the 5V of this specific ADR1001?
What kind of magic allows you to keep zero in the region of pV with thermal EMF better than 10^-22?
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What kind of magic allows you to keep zero in the region of pV with thermal EMF better than 10^-22?
The magic step here is superconductivity. For superconductors the Seebecke coeffient is exactly zero and thus no thermal EMF as long as they are superconducting.
Does the graph show the ADEV of a 3458A while it measures the 5V of this specific ADR1001?
As far as I understood it, the graph for the 3458 is for measuring an essentially noise free 5 V from the JJA. The ADR1001 is measured as the difference to this same voltage.
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The magic step here is superconductivity. For superconductors the Seebecke coeffient is exactly zero and thus no thermal EMF as long as they are superconducting.
Is the Null detector also superconducting?
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In this case for the super low voltage test the null detector is also superconducting: a superconducting coil to produce a magnetic field and a squid magenetometer to measure the change in the field.
In this case the null detector is rather low impedance, just some µH of inductance and no real series resistance (though possible some loss to the inductance). The voltage is than calculated from U = L * dI/dt.
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In this case for the super low voltage test the null detector is also superconducting: a superconducting coil to produce a magnetic field and a squid magenetometer to measure the change in the field.
Thank you :)
Perhaps you have a document with a method for obtaining the figure 10^-22 V?
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The ADEV of the ADR1001 (the ADI's eval kit put into a metal enclosure) measured at PTB and presented by Luis during the "High performance digitizer and DC metrology meeting and mini workshop" in Bratislava today.
For anyone interested the whole presentation is available as PDF's over here:
https://indico.cern.ch/event/1357615/contributions/
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I tried to order a pair of ARD1001AEZ via Mouser a few days ago and now that wording appeared in the order as per attached photo.
Issues in production????
Does anyone know anything about it?
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Digikey is listing a May 28 2024 shippment date
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It says July 3rd to me.... and date approximate an subject to change.....
Will we talk about it again for 2025?
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I had a change from 27.3.2024 to 29.5.2024... :(
Edit: Notice came 10.4.2024
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@Noopy: you will regret deeply your decapping of perhaps the last ADR1001 chip produced.. >:D
PS: I wonder what would be the real reason behind - the production issues as indicated by Mouser, or ADI decided not to cannibalize their ADR1399 and ADR1000 sales, or the demand by the big players is extreme and the entire chip producion has been booked out for the next 10years, or ADI decided to stop the production because nobody wants it.. :)
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Maybe they are adding a 1 month factory burn in!
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In case of urgent need there seem to be some for sale in Ireland. The title at ebay germany is "ADR1001 Ofengesteuerter, vergrabener Zener, Präzisionsspannungsreferenz".
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@Noopy: you will regret deeply your decapping of perhaps the last ADR1001 chip produced.. >:D
The less ADR1001 are sold the more valuable are also the pictures. ;D
In case of urgent need there seem to be some for sale in Ireland. The title at ebay germany is "ADR1001 Ofengesteuerter, vergrabener Zener, Präzisionsspannungsreferenz".
Interesting, these are no x-parts anymore... :-/O
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..vergrabener Zener..
..vergrabene Zaehne.. in this specific case.. :)
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or ADI decided to stop the production because nobody wants it.. :)
One claims -0.5pm drift, the other -5ppm drift.
Yet the for the -5ppm drift part the datasheet uses these words:
"The on-chip heater, combined with Analog Devices buried Zener
technology, allows the ADR1001 to achieve sub-ppm temperature
coefficient performance and single-digit ppm long-term drift per-
formance. Besides providing best-in-class precision in all vectors,
the ADR1001 incorporates ease-of-use features to reduce cost and
design-in effort. "
If you didn't know about the 0.5ppm part, it all sounds good.
As for "reduce costs" and "design effort", it's not like precision voltage references came out for the first time last week and there is no design history,examples or experience out there...
I'm sure I must be missing something....why would a new part with more long term drift be preferable?
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I've just back-ordered an ADR1001 evaluation board from Mouser UK and been given a 30 July despatch date...
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The older high end zener references are in the 6.2 to 7.5 V and maybe 10 V range. This is OK for some uses, but needs extra effort to use with an ADC or DAC chip that wants 5 V at most.
With a 7 V ref and divider down to 5 V the divider can add quite some costs and drift. It is not a principle issue in designing a ref. circuit. The problem is more in getting suitable parts and valid specs for the long term drift part.
Chances are the long term drift depends on the set temperature for the chip. Another point is the mechincal design around the ADR1001.
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Pretty sure the fab is done in Taiwan, hermetic packaging in Philippines. Earthquake and dozens of aftershocks possibly adding a delay.
I will never forgive ADI for shutting down (https://www.bizjournals.com/sanjose/news/2022/06/21/analog-devices-sells-milpitas-wafer-fab-for-33m.html) LT Hillview fab in Milpitas CA, which used to make our favorite ref IC's. Longtime proven quality. But it's sadly outsourced now and I would expect issues until the fab pulls it off.
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Milpitas list..
I see there only two parts usually discussed here - LTC2057 and LTC665x..
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I remember the LTC Milpitas wafer fab change notice because it included LTFLU1A/SZ263 - which I thought were long obsolete.
It seems to have been wiped, I will keep digging see if I saved it. ADI is not saying a peep about it now.
Anyone know for sure where the LTC refs, including the new ADR1001 are being fab'd?
Other LTC parts i.e. PCN 19_0067 - June 2022 Product/Process Change Notice - 0.35 micron wafer fab from Hillview CA outsourced to Vanguard International Semiconductor (https://www.vis.com.tw/) Taiwan (subsidiary of TSMC). I suspect they are doing the ref fab.
Also hermetic packaging was outsourced, "22_0324 Feb-2021 ADI Philippines (ADPI) as an assembly plant to replace ADI Hillview for commercial hermetic products in TO5, TO39 and Sidebrazed Packages. {LTFLU1A, LTC1100-10, LTZ1000A}
My point is outsourcing advanced IC technology doesn't go well because the IC's are not yet commodities. It's a bean counter approach. You can't just play Lego with this stuff.
I imagine it's special fab process/lithography, a lot of specialty burn-in and test and manual labour involved- which is not mainstream.
I could be wrong and the production delays are something minor...
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I will never forgive ADI for shutting down (https://www.bizjournals.com/sanjose/news/2022/06/21/analog-devices-sells-milpitas-wafer-fab-for-33m.html) LT Hillview fab in Milpitas CA,
I'll never forgive them buying Linear Technology and imposing the AD corporate model. I was told that LT people were very unhappy.
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This "fabless" semiconductor company model can never pull off state of the art. You are totally dependent on your contracted manufacturer. Otherwise- you have your own people, your own facilities, like LTC, and it worked fine for them.
It is a huge loss for American semiconductor manufacturing in an era where Biden is throwing billions to onshore things.
Finer lithography 0.18u mentioned change (https://www.analog.com/media/en/PCN/ADI_PCN_24_0009_Rev_-_Form.pdf) "Analog Devices Beaverton OR, USA (ADBN) as an alternate Wafer Fab site to TSMC" I guess ADI has some token fab ability in America. Maxim was also hit with the acquisition and new stupid business model.
EEVblog could get their own voltage reference IC if outsourcing is so easy.
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Finer lithography 0.18u mentioned change (https://www.analog.com/media/en/PCN/ADI_PCN_24_0009_Rev_-_Form.pdf) "Analog Devices Beaverton OR, USA (ADBN) as an alternate Wafer Fab site to TSMC" I guess ADI has some token fab ability in America. Maxim was also hit with the acquisition and new stupid business model.
This reminds me of my employer (automotive industry) where the management team consists almost exclusively of business people who believe that everything can be bought in the desired quality at the cheapest prices.
In addition, they overlook the fact that they are continually giving up core competencies that will never come back because the knowledge is gone over time and would have to be bought back at great expense.
Fortunately, I only have just under two years left...
But our children will suffer from these bad decisions!
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This ADR1001 seems to be quite late? About 19 months.
EDN April 10, 2024 (https://www.electronicdesign.com/technologies/power/article/55017265/electronic-design-voltage-reference-ic-with-integral-heater-offers-single-ppm-class-results) "Voltage-Reference IC with Integral Heater Offers Single PPM-Class Results" they did a blurb about it but no mention of availability.