Advantest R6581 8.5 digit DMM mini teardown/repair

[szszjdb]

Hi,  Mr. Mickle.T ,
Thanks a lot!

1. I measured the data as below. It has very big error than yours. The error is calculated from in to adin. I am using 34401 in 1Gohm mode and the string res to divide lm399-10v to 1-10v for input.
You can see the error is become bigger and bigger when the voltage decreased. Is there any posible the mux or the input amp. have problem?

   1v-10v   2v-10v   3v-10v   4v-10v   5v-10v   6v-10v   7v-10v   8v-10v   9v-10v   10v-10v
in   0.998259   1.99658   2.99483   3.99311   4.99138   5.98966   6.98789   7.98621   8.98446   9.98273
disp   0.9982827   1.9965798   2.9948377   3.9931279   4.991386   5.9896655   6.9879287   7.9862213   8.9844758   9.9827379
u105 p6   1.00518   2.00552   3.0058   4.00611   5.00635   6.00662   7.00689   8.00721   9.00751   10.00785
adin   1.000184   1.99848   2.99674   3.99503   4.99328   5.99156   6.98982   7.98811   8.98638   9.98464
err   -0.00192   -0.00095   -0.00063   -0.00048   -0.00038   -0.00031   -0.00027   -0.00023   -0.00021   -0.00019
                              
   1v-1v   100mv-1v   100mv-100mv                     
in   0.998254   99.9834   99.9695                     
disp   0.9982582   99.98455   99.9859                     
u105 p6   10.02991   1.024366   10.21227                     
adin   10.00671   1.01938   10.18879                     
err   -0.00241   -0.0191   -0.01882                     

2. You means to cut C206? If does, it will report A/D check error.  There have another cap c208(33n) and c209(1500p) and should I check it?

Many Thanks and Best Regards,
szszjdb

[Mickle T.]

I means to cut C210. But I was forget about a power-on selftesting
C208 and C209 - are part of ADC zero offset correction scheme (C209 - for the short int. time, C209+C208 - for long one).

Inp Amp linearity (offset) can be measured in this way:

[Kleinstein]

That changing the capacitor has an effect on INL somewhat indicates that the cap might be part of the problem, even though the other caps are worse than the old ones.

Mica and polyester (Mylar) caps are known to have relatively poor DA performance. So it is not such a surprise to see the large errors here. PP caps are expected to have DA of about 1/20 of mylar caps.

One possible problem with DA is that humidity inside the cap can increase DA - so not all caps with the nominal same dielectric may be the same. Also looking at C210 might be a good idea - so maybe do an exchange here too. Testing without C206 might not pass self test. If 210 is much smaller it will not have that much of an effect anyway.

The square wave at the output of U105 is likely due to the AZ mode still active. As the amplifier is working U105 is not broken - it would be odd to have a defect to cause poor INL but still have the amplifier kind of working at all. It is more like having the JFETs drifted so that the symmetry is not that perfect anymore.  Normally the amplifier should not contribute to INL, but a broken (e.g. bootstrapping for the JFETs not working well) /largely unadjusted amplifier could.

For the INL test with the resistor string, one might have to look at the source impedance. The missing pre-charge circuit could cause some effect of capacitance (e.g. cable length) at the input. Not sure how big the effect is, but some ADCs with internal S&H have similar issues.

[szszjdb]

Hi,  Mr. Mickle.T and Mr.Kleinstein ,
Thanks a lot!

1. I tried to cut off the c210, it report a/d check error when powering up. I have to find the replacement 10 days later as the long Chinese New Year vacation.

2. Re test as Mickle's advice, data are as below, all in mv. It seems not so bad, but per the  test I made last time, the data at the 1v point is so bad. Does it mean taht the MUX have problem?

1v-10v   2v-10v   3v-10v   4v-10v   5v-10v   6v-10v   7v-10v   8v-10v   9v-10v   10v-10v
-2.012   -2.005   -1.998   -1.998   -1.985   -1.964   -1.97   -1.981   -1.973   -1.968

3. I don't know what is the function of U105 and just found it has been replaced. The PIN voltage seem ok and how could I test it?

Best Regards,
szszjdb

[Kleinstein]

I don't know how the DC amplifier exactly works, but chances are it will be similar to that in the 3458. So use a dual JFET for the input with some kind of bootstrapping (needed to get any reasonable linearity) and than an OP (likely U105) to amplify the output of the FET stage to the output.
Anyway taking the ADC input (should be a test-point of some kind) as the output of the DC amplifier.

AS the DC amplifiers works for most of the part, a very much doubt U105 would cause such a problem.  So I don't think there is much tests needed. If at all it would be a test of the DC amplifier as a whole system, not just U105. It is really more pointing towards the ADC itself.

In the ADC it could be DA from one of the caps or it could also be the ratio of resistors for the rundown. Both could cause INL problems.

[Mickle T.]

I suppose that 6581 ADC can calibrate the ratio of resistors "on the fly" on a each measurement.

[szszjdb]

Hi,  Mr. Mickle.T and Mr.Kleinstein ,
Thanks a lot!

1. I re-check the input amp. and move the 1st test point to the HI port and the 2nd is still the ADIN.  I also test the 1V and 100mv range and the data are as below.  It is clear that there has a negative offset about -1.938mv and will be amplified by 10/100 when in 1V/100mV range.  Does it the normal one?

   10v-0v   10v-1v   10v-2v   10v-3v   10v-4v   10v-5v   10v-6v   10v-7v   10v-8v   10v-9v   10v-10v
Q102-adin      -2.012    -2.005    -1.998    -1.998      -1.985      -1.964      -1.97      -1.981      -1.973      -1.968
HI-adin   -1.938   -1.938   -1.935   -1.936   -1.934   -1.933   -1.933   -1.933   -1.933   -1.929   -1.927
   1v-0v   1v-0.1v   1v-0.2v   1v-0.3v   1v-0.4v   1v-0.5v   1v-0.6v   1v-0.7v   1v-0.8v   1v-0.9v   1v-1v
HI-adin   -19.032   -0.92026   -1.82012   -2.72027   -3.62039   -4.52055   -5.42167   -6.32193   -7.22223   -8.12258   -9.02294
   0.1v-0mv   0.1v-10mv   0.1v-20mv   0.1v-30mv   0.1v-40mv   0.1v-50mv   0.1v-60mv   0.1v-70mv   0.1v-80mv   0.1v-90mv   0.1v-100mv
HI-adin   -0.19045   -1.17965   -2.16944   -3.15957   -4.14965   -5.13844   -6.1287   -7.11876   -8.10892   -9.09815   -10.08851

2. I had desoldered  the C210 and the INL is down to 10ppm when I assembly it back. And I also exchange the C210 and C209 and found no improvement. Now the INL is about 12.6ppm, data as below.  Is the C210 damaged by the soldering?
solder c210
998.24955
0.9982622
-1.2672E-05

3. Further more ,I replaced the U105 from lt1220 to the OP27 , the INL (10v-1v transfer)result is the same.

Any further thing I can check ?

Best Regards,
szszjdb

[Mickle T.]

1. 1V and 0.1 V range data are useless. Only a 1:1 mode of the input amplifier is make sense for INL measurement.
2 mV offset is normal for non-chopper amp. with FETs inputs.

2. I don't think C210 is damaged. Did you nulls the readings of the DMM just before measurements at both of the ranges?

[szszjdb]

Hi,  Mr. Mickle.T and Mr.Kleinstein ,
Thanks a lot!

I did not null the reading as when I short the input line and the reading is steady in the uv digit both in 10V and 1V range, so I just left to do. The 0.1uv digit is not so steady ,so I am not care about it.

I had  performed  the external and internal calibration each time I change the cap and I found the INL is nearlly the same with the 4 type cap I had tried if I do not calibrate again.

I got LTC1052, LT1001 and OP27 in hand and I just try the last 2, the result is almost same.

Any further test, please advise!

Best Regards,
szszjdb

[Kleinstein]

Even though used in the input amplifier, U105 will not effect the INL. Chances are high the amplifier is OK. I might be important to get the original speed of the LT1220, as this can effect the settling time.
The about 2 mV of offset is not a problem. However the difference does not look that constant. It might still not be a problem if this is just due to slow drift.  The second series looks better - the contact at the fet might have increased the drift due to a thermal disturbance.
So I don't think there is a problem with the amplifier.

I don't think the DMM will measure the resistor ratios on the fly: I would expect this to take some time to get reasonable accurate numbers - so it would be more like a few seconds maybe 10 ms at best to get good enough ratios. There might be a slow adjustment, somehow judging from the data, but also this can be tricky and a direct measurement would be the more obvious way. So I would more like expect a measurement during self test on turn on, or during calibration.  Another option could be accurate resistors (and thus simple math and not measurement) or  a measurement only at the factory - the resistors may be stable enough that resistor drift is not expected to become a problem.

There might be some effect of soldering on the caps, though I don't think they will be broken. Parts of the integrator could also be sensitive to capacitive coupling - so things like bending a cap to the side or having a part closer to the board might have a small effect.

Another possible source of error for the 10 V to 1 V scaling could be the resistors for the x 10 gain. Self heating could effect that gain and could thus give a different values for the slow readings used when doing the manual test compared to the fast test during ACAL.

[szszjdb]

Hi,  Mr. Mickle.T and Mr. Kleinstein ,

I had made a mistake that I want to see the performance of LTC1052 and I replace the U105 with it, but got the ZERO checking error when powering on and smell something is burning . When I replaced the LT1220 back in U105, it recovered but the AUTO RANGE function failed.  Maybe the LTC1052 is damaged as the max power rail  is 18V and now applied 30V. The INL issue is still same, so the input amplifier is ok?
 
Which is the range comparator?   Please give me some advice!

Updated, the R155 is burned to 750ohm,  when replaced , the auto range is working now.

Back to the 10V -1V INL issue.  What can I do in the next step?

Best Reagrds,
szszjdb

[Mickle T.]

U105 have a 27 V p-p supply voltage. LTC1052 have a absolute maximum rating of 18 V.
There are no range comparator in R6581T.

[szszjdb]

Hi,  Mr. Mickle.T and Mr. Kleinstein ,

Thanks a lot!

Updated, the R155 is burned to 750ohm,  when replaced , the auto range is working now. Now the V+ is 13.5v and V- is 14.3v for U105.

Back to the 10V -1V INL issue. Now it is 13uv or 13ppm, larger than when I start to check for it, where it is just 6-7ppm.
What can I do in the next step?

I also note that it drift more 10-15uv when set to AZ off. Is there any posible issue with the input amplifier?

Best Reagrds,
szszjdb

[Mickle T.]

It would be strange if the disabling of AZERO did not lead to an increase in drift
ADCMT have a very l-o-o-o-ng DMM production history. I believe that it's time to stop the "torture" of the multimeter and start searching for technical information about it: patents, ADC algorithms, science papers, manuals e.t.c. Further progress is almost impossible without a detailed understanding of how it works.

[szszjdb]

Hi,  Mr. Mickle.T,

Thanks for your kindly reminding.

It's my first high grade DMM and I am new in the area.  Learning more from you and Mr. Kleinstein when starting repairing the unit.

Thanks Indeed!

Best Regards,
szszjdb

[Mickle T.]

I did a quick experiment. Changing a one of run-down current sources (via a parallel resistor) immediately gives an offset and fullscale errors. These errors are resets after the next autozero cycle. But I'm don't know how about changes in linearity.

[Kleinstein]

I am currently experimenting with a self build multislope design and with this found that coupling from the comparator / slope amplifier towards the reference current sources can cause quite some trouble at some special voltages (near the center of the range where PWM during runup is at 50%).  So shielding in the ADC region (both around the comparator) and separate around the major current source(s) might have an influence in linearity.

On the other side I found that DA might not have that much of an influence as I thought, though this might be a special feature of my design (with some waiting time).

The effect of the extra resistor an INL / DNL would tell it there is a kind of adjustment cycle that would measure the resistor values. The most obvious error should be DNL in the form of missing / overlapping codes, that might be visible on a slow smooth slope (e.g. capacitor discharge).

[szszjdb]

Hi,  Mr. Mickle.T and Mr. Kleinstein ,
Thanks for all.

I had made some test these day and comfirm the INL issue as below.

1.  For positive / negative check, the error reach 7-10ppm when 1v input of 10V range.  I have tried 2 method of input and one is using the r6144 source and the other using the string resistor divider. The result is similar as attached.

2. For transfer test , the negative one have smaller error than the positive and almost in the spec except the 10V-1V transfer at 0.1v input. Also attached.

3. I am planning to find the replacement part for  C206/C210  and to  try for it .

4. I have hear from my friend that his 2 pcs 6581 and 1pcs 7480 also have the tranfer issue and reach 7-8ppm of 10v-1v transfer at 1v input , just like my 6581 before repairing(now is 12ppm after repairing) . That is to say the issue is not a  occasional one. I hope to find out the solution.

Would like to have your advice.

Thanks and Best Regards,
szszjdb

[Mickle T.]

Everything indicates that the R6581T and 7480T devices are much less accurate (and cheaper) than their full metrological versions 

I do not know whether it will be useful or not. Below I have cited several documents and translated drawings from our forthcoming publication on the study of Advantest multimeters.

Eiichi YADA - the one who developed the multi-slope analog-to-digital converter used in the Takeda Riken (and then Advantest and ADCMT) top multimeters:
“High  Speed A/D Converter  With  Variable  Integrating Time”,  by  Yada,  Honjoand  Hirose,  IEEE,  Catalog  No. 86CH2271~5, 17 Jul.  1986, pp.  144-147.
US4559521 Calibration of multi-slope ADC (Takeda Riken,1985)
US4574271 Multi-slope ADC (Takeda Riken,1986)
Application of the AC Josephson-Effect for Precise Measurement (2000)
Precise Measurement of the Accuracy of 24 bit ADC by AC Josephson effect
Precise Null Balancing Technique for 10-V JJ Array Voltage Standard System

Advantest R6871E:


Integrators waveform: https://drive.google.com/file/d/136GaTFkkmIdEB0bY2-u5BOY8N9hyCwK-/view?usp=sharing

Advantest R6581:


Integrators waveform: https://drive.google.com/file/d/1FrEv-MCtTosHj2QvtJ8Jneyz27bW14Y8/view?usp=sharing
Runtime A/D selftest and calibration sequence:

[szszjdb]

Hi,  Mr. Mickle.T ?
Many Thanks for your so detail information!

You means the 6581 is similar to 6871. That's great as the document of 6871 is more easy to find to learn from it. 
I will try to test it with the scope.

Best Regards,
szszjdb

[szszjdb]

Hi,  Mr. Mickle.T and Mr. Kleinstein ,

I had tried the COG(NPO)  ceramic cap (5 pcs 0.1uf in serial ) for C206, found nearlly the same INL performance with the original SHOSIN one, which is around 10-11ppm both in the positive 10V-1V tranfer test and 1V positive-negative test.
It seems that the INL error is not causing by the INT cap.

Best Regards,
szszjdb

[szszjdb]

Hi,  Mr. Mickle.T,

I tested the INT output of the A/D and found something strange that the waveform is different in negative and positive Vin, attached FYI.  It can be seen that only single-slope used in positive voltage input and multi-slope when negative input.  So how can it keep the  symmetry when just changing the sign of input?

I also checked the waveform of the 5 a/d check condition and there are all exactly like you post both in timing and amplitude. So can I say the A/D is almost fine working?

Many Thanks and Best Regards,
szszjdb

[Kleinstein]

The waveforms look a little like the run-up phase only.  The positive and negative side are a little asymmetric, as the input current source to the integrator can only be one sign.  However there is no principle difference: the voltages are just rather high and the run-up patterns are thus already rather close to the limits. The waveforms should much more similar when at a small voltage.

The A/D check might not be very stringent. So it might not cause an errors if there is a small error in the current ratios, that could already cause a noticeable error. I am not sure if that AD check is just checking the rations or actually measuring the ratios and the DMM uses the measured ratios instead of the nominal rations.  I am afraid the DMM will use the nominal ratios, as the simple dual slope type check might no give a sufficient accurate reading of the current ratios: there is extra charge injection that is included and thus an accurate measurement would likely need something like a repeated cycle with different lengths.

The higher grade version 6581E seems to use an accurate measurement and than correction via extra hardware . So they seem to have passed on a possible correction via software  .

[Mickle T.]

szszjdb, have you a plcc44 EPROM programmer to dump the old flash and burn the new one?   
https://www.eevblog.com/forum/repair/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1355028/#msg1355028

[szszjdb]

Hi,  Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!

I tested the INT waveform again and can not find the round down timing in it, attached FYI. I am testing with +1v input.

I haven't got programmer in hand but I can try to borrow one.  I had checked the EEPROM code that it is the version for production in 1998, but my DMM is made on 2000. Can it works?

Best Regards,
szszjdb