Advantest R6581 8.5 digit DMM mini teardown/repair

[szszjdb]

Hi,Mr.Kleinstein ,
Thanks a lot!

I cut the connection between each decoupling cap of U205-207, left the 2.2uf cap connected between PIN4 and PIN7. The turnover error is like it used to be ,the 8-9uv, no more improvement.

I also buy a LCR meter and check  the integration cap C206 and got the good D reading in the 0.0007 range .Three pcs SOSHIN cap were the same result. Likely the error is not coming from the cap.

Further more,some of my friend told that he changed the U205 to LTC1150 and U206 to OPA140 ,that  make more improvement for the turnover error from 18uv to 4uv. The key is the lower IB comparing to the original OP177 said.

Would like to have your advice.

Best Regards,
szszjdb

[Kleinstein]

The sensitivity to decoupling and small changes around the OPs is in way related to the way the integrator ins settling on switching. My hope was that better decoupling could do the trick, as the decoupling on the original board is kind of poor. The problem however is that this a range the direct changes stay invisible to the scope. So these changes are kind of random/blind search. The capacitance directly at the OP might be worth keeping, even with other changes.

I also though a little about changing OPs. In theory other OPs could give faster/better settling and maybe slightly lower noise. However I would not expect that much less sensitivity to ground / supply problems.
The LT1056 is not that bad, it is reasonably fast and should be fast enough for the relatively slow modulation. A faster OP could reduce the input voltage at the integrator. The OPA140 is lower noise and faster, but this might also make it more sensitive to decoupling, supply problems. An OPA134 would be another candidate - slightly faster than the LT1056 and with a low distortion output stage.

The OP177 (U205) however might have three weak spots: it is rather slow and as a BJT OP might get nonlinear with high peak input voltages (e.g. > 50 mV). In addition the current noise (related to bias current) is relatively high - this contributes to the ADCs noise. The OP140 (or the cheaper OP141 with slightly less testing, but otherwise similar) is a good choice - it could also replace the OP177 (U205). The low frequency noise is even better than the the OP177/LTC1150 in much of the relevant frequency range. Another possible alternative for U205 would be the ADA4077 - though it might need an adapter board, as there is no DIP version.

The LTC1150 is relatively high noise and might thus not be a really good solution.

Depending on the OPs used, the optimum ratio R216/R217 might change. The tendency is that a faster OP for U205 (relative to U206) would like a lower value for R217. However the current 10K/1K ratio is already more suitable for a fast U205. Ideally the output of U205 might show an amplified signal to represent settling of the integrator, though superimposed with charging of C207. For testing settling one could short out C207.

[szszjdb]

Hi,Mr.Kleinstein ,
Thanks a lot!

I will find some OPs to replace U205 in the ADC. By now the U205 is AD707K, which was OP177 in Mr.Michel's schmatics.

How about the possible leakage of U214?

Best Regards,
szszjdb

[Kleinstein]

I don't think leakage of U214 is a problem. If at all the effect would be mainly with the fast mode. The on resistance of U214 also plays a role - so a different resistance (higher of lower) switch could cause trouble.
The switches a behind the integrator and thus it is leakage fighting on resistance. U214/1 leakage might cause some effect in the fast mode, bit likely just an offset.

For the U205 replacement I would consider the OPA140/OPA141 or maybe OPA145 the best choice.

ADA4077 would be my second choice.

I am not sure the LTC1150 would really be a good choice, because of the relatively high voltage noise.Current spikes could also upset the LT1056. The DMMs that use an AZ OP in the ADC integrator usually add some extra filtering and use it for very long integration (e.g. > 100 PLC).

One could still think about a faster replacement for U206, as higher GBW would lower the step function that U205 has to compensate. For the fast reaction the on resistance of U214/4 is in series to C206. Thus initially only C210 is effective. This might explain the initially rather large peak after switching. So if U205 is BJT based it might require a faster OP with U206 to keep the initial peak at the integrator input below about 50 mV. Faster alternative to the LT1056 could be OPA140, OPA604, TLE2081, OPA134, AD744... - quite a few choices. A slightly larger value (e.g. 1 nF cap in parallel, directly at U206) for C210 could have a similar effect.

[Mickle T.]

Unfortunately, changing the U107 OP07D to a faster one makes some instability while the input amplifier is in fast mode (an occasional 57 kHz oscillations at cold start of DMM, selftest fail).
Attempt to replace U107/U104 with another opamps (TL071, OP177, OPA604, TL081) don't help at all with 1-10 MOhm transfer error (+200 ppm) 

But there is a good news  The main purpose of R170 isn't zero offset related (of course, because DMM have a close-case calibration). With only a two measurements of startup thermal drift in non-AZ mode (with end positions of the R170), you can adjust the R170 to minimize the input amplifier offset TC.
In my DMM the R170 can linearly adjust the TC in the -19 ... +4.5 uV/C range.

[Kleinstein]

Replacing U107 / U104 with faster OPs should mainly make sense if both OPs get somewhat faster. U107 should be relatively uncritical, as it is only configured as a follower. I am somewhat surprised that just changing U107 could cause oscillation. A faster OP might want local decoupling, e.g. a cap from the +15 to -15 V at the OP. If at all I would have expect much fast oscillation through capacitive coupling from the guard traces. I am not sure how the inductor at the OPs input effect a JFET OP.

U104 is much more critical, as the compensation of that OP is what mainly determines the loop gain of the whole slow DC amplifier - there is no local feedback. So the OPA604 would be definitely too fast here. The OP177 should not be a big advantage over the OP07, it is still slow and still BJT based. The TL071 worked with Szszjdb, but not all of them may be equal. It might be possible to add a bit of local FB (e.g. a small cap (e.g. 10-50 pF) from output to inverting input) - not sure if it helps. Reducing R138 a little could also help as it reduces the high frequency gain of the FET stage.
A small step would be using an TL031 - only 1.1 MHz GBW and thus only a little faster than an OP07. The higher slew rate than the OP07 and thus larger linear range (up to the point where the diodes limit) would still make the amplifier considerably faster, though not clear if fast enough to avoid forward gate current in all cases.

The main reason for the faster OPs was to allow the guard and gate drive to come down faster. This was to avoid leakage in AZ mode with negative input voltages, especially in 1 PLC mode. So this leakage current would be the first point so measure. Depending on the gate threshold some meters may show more or less of this problem.

The effect on the high Ohms turn over was more like an extra. Here it might take a little extra slow down for the gate for Ohms High (pin 26 of the MUX). Something like 100 pF, maybe in series with about 1K (to limit peak currents) towards ground should slow down the switch to about the level of the DCV input. Otherwise the amplifier could be still too slow to follow. The other inputs should not be that sensitive to small current peaks or should not have a highly negative voltage. So no slow down needed.

Having the trimmer R170 to adjust the TC in non AZ mode makes some sense. Though the adjustment procedure could be time consuming.

[szszjdb]

Hi,Mr.Kleinstein and Mr.Mickle T. ,
Thanks a lot!

Yes I have just tried the TL071 and found no issues till now. Maybe the replacing of the decoupling cap of power supply help to stable working.

I will reconfirm the transfer error in 1M/10M range. But the latest record of the error is just 20ppm, I don not know if it still in normal range? I am using the foil resistor which should have small heating effect. So the error is likely unacceptable?

My OP140 is on the way, but I am still thinking about the the real reason for the bad INL in the positive range. What kind of aging could be the source of the INL? The integration cap have been tried and found no issue.  The OPs and the U214 should have very small aging effect. The decoupling cap have been added and also the electrolytic capacitor in the power supply board. What might be missing? The leackage of the MOSfet switch of the current source in ADC?

EDIT:
What might be the main purpose of using AD707/OP177 in the 1st stage of all  the compound OPs from the view of ADVANTEST? The lower drift of 0.1uv/C? How about to change all the 1st stage like U104/U105/U200/U202/U205 to OP140, in where the drift will be 0.35uv/C?  Now I am using the TL071 for U104 which has 18uv/C drift and have not got the idea to detect  the drift.

For the transfer error of 1M to 10M, I found out the same reading as last time but in the HI power mode. If tested in the LOW power mode, it is really around 200ppm. Attached FYI.

Would like to have your advice.

Best Regards,
szszjdb

[Kleinstein]

The purpose of the compound amplifiers is to have the high precision (low bias, low drift and low frequency noise) of the OP177 (or similar) and the high speed of the LT1056.

For the integrator, there is the additional purpose of the second OP to reduce the residual input voltage of the integrator. A single OP integrator would have a input voltage that is not that ideally close to zero, more like  U_int_in= I / C_int / ( 2*Pi*GBW)  - not that sure about the 2*Pi factor. This would result in a voltage of a few mV to maybe 10 mV. The 2 OP integrator helps with this, and there will be only a short peak in input voltage when switching. The additional OP (here AD707) is responsible for the  low frequency part (about up to GBW / 10), while the JFET OP is responsible for the rest and the main integrator current. The power dissipation in the JFET part can depend on the input voltage, while the slow OP will see very little load and thus not suffer from much self heating. So the low frequency part can be more accurate.

The precision OPs in the ADC and the current sources need to have low LF range (e.g. 2-30 Hz) noise with not that much current noise as they are used with a effective impedance in the 10-20 K range. Low drift helps and can be relevant for the the non AZ mode for the current sources. Zero drift of the OP in the integrator is corrected even in the non AZ mode with the analog zero function around C208/C209. There is additional drift from R200 matching - so low drift of the OPs is good but not the prime parameter.

The OPA140 is a new part and was not available back than. It has low frequency noise (e.g. 1-10 Hz range) comparable to the AD707, but essentially no current noise. The higher speed could make the integrator settle faster (provided there is good decoupling etc.) - the low speed of the AD707/OP177 could be a reason for the relatively slow modulation during run-up and thus large capacitor. In the current source just an OPA140 could likely replace the two OPs. 

Replacing the AD707s in the integrator and current sources could result in somewhat lower noise in the 1 PLC mode. Not so sure at 10 PLC, as at 2.5 Hz the noise level of AD707 and OPA140 is about equal. The noise without AZ might even get a little higher if the current sources are changed. The higher speed of the OPA140 can be an advantage in the integrator, but might need a change in R217 (smaller value, like 330 or 470 Ohms). Higher speed could also help when replacing the LT1056 - higher speed here means smaller step for U205. So I don't see a good reason to change the current sources too.

I still don't know the real source of INL. One part seems to be related with ringing or decoupling on U205-U207. If changing U205/U206 really does a significant improvement (or just a change) it points to settling of the integrator. Here maybe just normal scattering (maybe aging making them slower over time) in AD707 / LT1056 speed or ringing could be a reason. For aging the (electrolytic) caps at the +-15 V would be the prime candidates, but these seem to be already changed with no effect.

The switching MOSFETs seem to work - otherwise the self test should give an error. There might be some drift in switching level and this could effect the transients produced on switching. So one could try to adjust the substrate voltage a little (e.g. change R215/R214) to something like -4 V or -2 V. This should slightly change the timing on the switches (e.g. brake before make time) and this way could effect charge injection and ringing. A point to look at with the scope to see an immediate effect could be the drains of Q204,Q205, looking for something like a short small but distinct positive peak on switching. The output of U204/2 (= substrate voltage) should not show much switching spikes - if so one could consider adding some load (e.g.  1 K to GND) here.

[szszjdb]

Hi,Mr.Kleinstein and Mr.Mickle T. ,
Thanks a lot!

Confirmed that oscillation occured when changing U104 to opa140, even with TL071 , there has some small oscillation when in X100 mode which I have not noticed before. Some of the resistor like R138 need to be changed.

I also changed the U205 to OPA140 , working but need more time to capture the reading, so report tomorrow.

Best Regards,
szszjdb

[Kleinstein]

The pictures already showed quite a lot of ringing when U104 was changes to the TL071 - so in this case it was close the the limit. Other samples / meters might oscillate with similar change. That the OPA140 would not work for U104 is no surprise - it is way to fast.  For U104 one would ideally have a FET OP a little slower and/or with more phase reserve than the TL071.

With (small ?) adjustments to the compensation the TL071 could be OK. However this is not that simple: the slow DC amplifier uses a kind of 3 pole compensation that needs to be adjusted for each gain setting. There are BW limits for the LT1220 (might be relevant with high gain, but not that bad) and the JFET input part. So U104 can not be very fast, but a little more than the slow OP07 should likely work, though it is a little hard to tell how fast the JFET part actually is with the parasitic caps. Compensation adjustment for gain 100 would be R122, gain 10 with R123 and gain 1 with R138.

[szszjdb]

Hi,Mr.Kleinstein,
Thanks a lot!

I will try to modify the resistor for compensation of U104 . But I am still worry about the candidate TL071 for its 18uv/C drift and 18nv/square root(hz) noise  vs the 0.3uv/C drift and 8nv/square root(hz) for OPA140 or similar AD707. How  could these contribute to the system drift and noise performance?  I prefer to modify base on OPA140, should I?

For the fast test of the u205 OPA140 (with u104 TL071), the turnover error seem no big change. More detail test will be conducted tonight.

My friend have tried to add a LT1056 buffer between the U206 and U207, finding small improvement on the turnover test. How is the idea?

Would like to have your advice.

Best Regards,
szszjdb

[Kleinstein]

An extra buffer between U206 and U207 is odd. It would add some delay that could become a problem during rundown and the zero phase. The current from U206 driving the input to U207 should be covered by local decoupling around U206/U207. So I don't think it should be such a problem.

As one difference between positive and negative input voltage is seen in the length of the comparator pulse (much longer with the positive input), one could test reducing R205 to reduce the hysteresis of the comparator a little. This would shorten the pulses a little and might be enough to avoid U207 to reach it's positive limit, as it is done now with positive input. It's kind of a long shot, but only a small change.

I would consider to also replace U206 with an OPA140 or another slightly faster OP than the LT1056 (e.g. TLE2081, OPA134, maybe even OPA604). As there was quite some effect of loading U206, the output stage of U206 could have an influence. So a good quality socket for U205 and U206 might be an idea.

With just U205 replaced with the faster OPA140 one might have to reduce R217 to something like 220-470 Ohms. The divider after U205 kind of reduces the BW of the extra OP in the integrator. With both U205 and U206 replaced with OPA140 the original 1 K could be about OK. In principle could might be able to tweak the response of the integrator with R217, but the original relatively slow response seems to be good enough.

For the amplifier part U104 noise and drift are not that critical. The JFET input stage has a gain of around 30-80. So drift and noise of U104 would be attenuated by this factor - a little less at higher frequenices. From this the TL071 should be good enough. The bigger problem with the TL071 is the ringing / tendency to oscillate - this might be coped with with changes to the compensation. Another possible factor could be the open loop gain, that is much lower with the TL071, this could effect the linearity of the amplifier a little. However some of the higher gain of the OP07 is at very low frequencies and thus likely not in effect with the AZ mode. Still the TL071 was just a first guess / standard part. Ideally I would like to have something like 2-3 MHz GBW with good phase reserve and high loop gain.

OPA130: rather slow (1 MHz GBW), but still faster than the OP07 and higher slew rate and good open loop gain.
TL031: only slightly faster than OPA130, but less loop gain and higher noise / drift (still not too bad)
AD820: moderate speed (1.8 MHz) and higher loop gain than TL071 so possibly a good match.
LT1055: slightly faster than TL071, but seems to be good phase reserve.
OPA145 (slow brother to OPA140): slightly faster than TL071, but looks like good phase reserve (at least the higher frequency end) and good loop gain. Those faster OPs would likely need a change in compensation. The OPA140 is even faster and would definitely need a different compensation, maybe even with the LT1220 part.

The change in compensation would be slightly lower resistors for R122, R123, R138. For the fast ones with high loop gain (e.g. OPA145) a slightly higher R125 would also be an option. In principle slightly smaller caps C120 / C113 could be possible with a faster OP and changed resistors - this would be for faster response, not for less ringing.

[szszjdb]

Hi,Mr.Kleinstein,
Thanks a lot!

I have performed the INL test for U205 OPA140 after burning for a whole day and the result is more like the old one. Attached FYI. There is still have a turning point above +5V, which leading to the bad INL.  It seems the issue is not in the integration unit, might in the slope or the comparator.  Agree with you to change the parts in the comparator. I will report later. 

As just got OPA140 inhand for U104 , I will try to parallel some resistor on the compensation parts and check with the scope. If it is  too difficult keeping stable, I will find the proper OPs you suggested.

Best Regards,
szszjdb

[Kleinstein]

The OPA140 is kind of overkill in the amplifier (U104). R122/R123/R138 would likely need to be reduced a lot (like 1/2-1/4 the original value).

The INL curve look somehow different from the curves shown before - not just the new data, but even more the old state ! Looks a little like the _ori curve swapped positive and negative range.
The most worrying part to me is the drop in the -1 /0 region. This could effect the ACAL a lot.

[szszjdb]

Hi,Mr.Kleinstein,
Thanks a lot!

Having added 22k resistor parallel on R205 , found nearly no big change on the turnover test. 

The different of the original curve to the new captured on May.4 might come from the way I get the V source. The newly is measured with negative range of 6581 and ohters is with the positive range , so there must have some more DNL than others.

Best Regards,
szszjdb

[Mickle T.]

I has restore the U104 to initial OP07D and changes the U107 to OPA604 and make it's connection like HP 3458A. No visible improvements in 1-10 MOhm transfer. The same 200 ppm

[Kleinstein]

If just using a slightly different test procedure changes the INL curve so much, this should need some extra tests to make sure the curve is really showing typical INL and not just random samples of DNL. So it would make sense to look at some area more detailed (e.g. -1 ... 1 V range). If DNL would be the reason, just a small shift (e.g. with the pot in the DCV amplifier) could have a significant effect. So I kind of doubt DNL would be the reason, as the early INL curves were pretty consistent, though split in positive and negative side.

I could imaging using the positive or negative sign for measuring the voltage steps could make a difference, especially if these are mixed like changing the sign, or using the same sign for all steps. An DC offset of the DMM would also make a big difference especially around zero. So the details on how the INL test is done could be important.

Still the -ORI curve looks kind off strange, like the x-axis mirrored. It's not just the curve but also the Err data in the table.

@Mickle T:
For the Ohms range error it might be interesting to use a scope to check if there are significant current spike on the Ohms_high input. I suspect a current spike similar to the DCvolts with negative input voltage - maybe even worse as there is no extra capacitance to slow down the switching. If the spike is causing the ohms error, chances are the error depends on capacitance / cable length.  Besides the Ohms one could also check the input current in the volts range (e.g. capacitor discharge in 1 PLC mode). The change in input current is likely the more obvious effect of a faster amplifier.

For the amplifier, just changing U104 or U107 would not change very much. The slower of the two sets the speed. From the curves/test shown earlier by szszjdb, it would not need an OP as fast as the TL071 for U104, just a little higher (e.g. 3 times) slew rate might do the trick.

Even with the slightly faster amplifier this might not be enough to fully avoid the current spike on very fast switching. For the Ohms error is might be more effective to first slow down the switching. Amplifier speed-up would be more for reducing input current for negative volts if the slow down is not enough. Depending on the FETs there might be no need for much speed up - at least some of the DMMs should work a planed.

[Mickle T.]

I wish to draw attention to the fact that my new guard driver connected to input of the Input Amplifier, not to the output.

[szszjdb]

Hi,Mr.Mickle T. ,

Have you selected the HI power for ohm transfer test? I found 20ppm error  when in HI power mode and 200ppm in normal mode.

Best Regards,
szszjdb

[Mickle T.]

Yes, I selected a hi-power mode.

[Kleinstein]

Connecting the guard driver to the input side makes sense - no more fast main amplifier needed this way.
So if the input current is low enough this should solve the amplifier speed problem easier than changing U104 and adjusting compensation.

With problem also happening in normal mode and thus only 1 V at the resistors, there seems to be additional other problems with the high ohms, not just a switching speed problem.

Besides the Ohms measurement itself the problem could already be in the ACAL process to adjust the low current ranges and the small current sources. If possible (could be a bit tricky to find a suitable current source) one could also check the low current ranges (e.g. 10 µA, 1 µA, 100 nA) for transfer errors. Chances are if the external 1 M test shown an error the ACAL of these ranges might show a comparable error.

[Mickle T.]

Test #2. Adding a 5100p polypropylene capacitor to 1M shunt network, used in the 1-10 MOhm ACAL transfer.
Have no influence to the transfer error. The same 200-220 ppm

Got a precision RLC tweezers HB-14. Measured all of the timing-critical capacitors. Schematic diagrams updated: https://drive.google.com/open?id=1W_mHC8tUDo2giVsW7xclBpsvdcY52O6G

[Kleinstein]

Thanks for the updated schematics.

For the higher Ohms range there are a few relatively simple tests possible to get a few more indication in where to look for the error.

One would be testing the low current ranges (e.g. 10 µA, 1 µA, 100 nA used for calibrating the ohms sources). Another DMM in ohms mode might be a possible test source for a stable low current to test the same current in adjacent ranges. It could be still tricky with noise, but a 200 ppm error is quite a lot to look for.

A second possible test would be checking the ranges with a different resistor (e.g. 500 K) so that a lower voltage is used during Ohms test.

A third possible check would be the output admittance of the current sources. So compare the current of the Ohms current source (e.g. 1 µA or 100 nA) with changing series resistor. Ideally the current should stay constant, but things like leakage of some of the FETs Q402-Q406 could cause a significant change in current.

Similar a variable input current of the DMM (e.g. MUX or main amplifier) could contribute. 200 ppm of 1 µA is just 200 pA - not impossible to find leakage in the order of magnitude either in the MUX, DC-amplifier or Q402-406. The input current of the amplifier is not necessary linear, like a constant resistance.

[szszjdb]

Hi,Mr.Kleinstein,
Thanks a lot!

Having changed the U206 to OPA140 with the U205 OPA140 and R205 12K||22K, the turnover error curve shift to the negative side. But the shape is still like the old one and there also have a turning point around +6v.  It seems the positive gain dropping so fast above +6v . So the issue is still hiding somewhere. Attached FYI.

Best Regards,
szszjdb

[Kleinstein]

The curve for the turn over error as a function of voltage looks quite different now. Having small errors a low voltage is kind of a good thing as the 1 V point is used quite a bit during ACAL. Having a low turn over error at low voltage is also kind different from the dip at -2 V to 0 V in the INL curve before (maybe shifted a little to 0, so that one would no notice it anymore in the turn over test).

There is quite a bit of up and down. So I am not sure one how much if the errors is due to noise / reference drift. A few more points could help. 

How are the data taken ?