Advantest R6581 8.5 digit DMM mini teardown/repair

[TiN]

It's not just a democracy, but also relying on the design of the reference instrument. Excellent 3458A's linearity over +/-12V is proven by industry and independent researchers many times. So at least that gives us confidence that design itself is up to task, only open question is actual performance of particular 3458A used in setup. So adding more 3458A works as statistical array. Other methods also rely on same approach - linearity by design + total error budget factors, even with resistive passive devices like 720A. And bad ADC (those drifty ones) in faulty DMM easily show horrible INL errors because multislope ADC also rely on stability of the ratios for each phase.

So anything below 0.1 ppm should be taken with healthy sceptical amount, as data points approach noise floor and practical issues of either instrument. So 0.1-0.2ppm results are about best possible practical limits without big dollar budgets. I have few data sets captured on various DMMs against quantum voltage source from -10V to +10V. That can at least help to verify the analysis approach and visualization for this and similar cases.

3458A, NPLC20, opposition to JVS output, 10V range:



8508A, RESL8 (NPLC1024), opposition to JVS output, 19V range:

[e61_phil]

Great data, Tin!!

Is it possible to make both graphs looking more equal? Seems that both meters are looking quite good on a JVS. It is a pitty, that you didn't had a 8588A in your bag

btw: -10V to 10V is nice and the 3458A is most of the time much better in that range against other meters, but looking at 0 to 10V cancel out problems with different gains for positive/negative (like in your 1281 plots). It depends on the application, but I think in most of the comparisions (like LTZ1000 against a 10V source for example) the polarity swap isn't that important. And the INL looks much better than it seems over the whole range (-10 to +10V)

[branadic]

The interesting part will be, if INL of R6581 will change shape with a different integrator capacitor. I again had a look inside the R6581 and even though the caps are potted from the top, they are Soshin branded.
I also had a look into AoE3 page 301 and x-chaters page 42/43 with a few diagrams concerning caps and their DA and Kleinstein is absolutely right on this. The diagrams show superior behavior for teflon, followed by a C0G ceramic cap that is named "brand Y", followed by polystyrene, followed by polypropylene.

So chances are, that INL picture will be somewhat different once the hermetically sealed PTFE caps are installed, if this is due to properties of the cap itself.

-branadic-

[branadic]

Checked capacity and tan delta on that 20nF, 50V, 2% Soshin integrator cap. At least the PS caps I had at hand were worse with respect to tan delta.

-branadic-

[Kleinstein]

The measured tan delta reaches about 50 ppm level. That is a really good value. However I am afraid in the relevant frequency range (e.g. some 5-100 Hz) the measurement system may be the limiting factor. The normal expectation is that tan delta will go up again towards very low frequencies - at least the DA values usually go up.
Different PP caps may be slightly different and the caps used are likely chosen for good performance.

There is no direct fixed factor between the tan delta and DA values. It depends on how the time constants are distributed and also the time range used for the DA. Tan delta and DA over one decade should be roughly comparable (a factor of up to 2 likely less).  For the PP caps I get some 200 ppm for a decade in time. So likely higher loss than the Soshin cap. For my best C0G the loss is at 30 ppm per decade - so quite likely less (maybe a factor of 2).

The graph for DA from Bob Pease also shows quite some difference for both PS and PP caps. I saw a factor of up to 8 difference between different C0G caps.

Edit:  I just rechecked the simulation numbers: the DA number (for 1 decade) is usually smaller by a factor 2 - 5 than the tan delta.

[branadic]

Here is a first result with that 20nF PP cap replaced by two 10nF PS caps. Can't see any difference between both measurements.

I do have some 1.5nF and 10nF PTFE caps on their way, but should receive some TDK C3216C0G2W103J160AA, C3216C0G2J103J160AA but also C3216C0G2J152J115AA today. Unfortunately I missed ordering some 33nF caps, such as C3225C0G2E333J230AA, C3225C0G2W333J250AA or C3225C0G2J333J250AA, but nothing that can't be changed.
So I will replace each capacitor within the integrator one by one and perform an INL measurement after each single replacement, so that we can see if anything changes at all. Hopefully we can at some point see a difference in INL behavior.

-branadic-

[branadic]

Looking at the datasheet of OP177 page 9, figure24 I wonder if I am looking at the wrong place for the INL error and the opamp is the culprit. The shown gain linearity for "a typical precision operational amplifier" looks somewhat familiar to me and my INL error. Maybe I should replace the AD707K in my unit by a OP177?

https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=671874;image

-branadic-

[Kleinstein]

The loss measurement is at higher frequencies than actually relevant  in the ADC. So it is still not sure the PS caps are really much different in the DA than the original PP cap. One could try a test with an intentional worse capacitor (e.g. 10 nF PS + 10 nF MKS or 1 nF mica / polyester in parallel to the 20 nF low loss).

The OP177 OPs  (in the integrator, current sources, reference scaling) see a relatively constant signal. So the gain linearity curve is not relevant. The OP in the integrator still sees some transients, but these should be all relatively similar with mainly the number changing a little.

The other INL mechanism I would consider is the frequency of the zero crossings during run-up. The zero crossings could cause an interference, as the slope amplifier signal is send right across the sensitive area. That layout choice is really odd. Near zero the  integrator output signal changes: With positive input the integrator goes to just to zero and than up again. With negative voltages there are less zero crossings, but also cases of hitting the upper limit.
This change is also part of the reason the DA can cause the jump near zero.

[branadic]

I received some 10nF NP0/C0G TDK ceramic caps today and from the tan delta perspective they look at least a factor of two better. Will give them a try tonight.

@ Kleinstein

I have the AD707s installed, not the OP177. For some reason I believe, that AD707 in either the integrator or the voltage to current converter, could be the culprit and that the figure shown in OP177 datasheet could be the behavior of AD707 and that OP177 is an improved version. It's just a gut feeling. So if tonight nothing changes on the INL figure, I will replace that opamps, to see if it makes any difference.

-branadic-

[dietert1]

If you want to try other parts: I find the switch U214/4 pins 14 and 15 somewhat suspicious. A mosfet switch of 50 Ohms will cause an error voltage of up to 1.35 mA * 50 ohms = 70 mV, which is enormous. As far as i understand it will be closed all the time except during "fast mode", so it could be a relay instead.

I noticed the "zero discontinuity" in your case is about 0.5 ppm, while Tin reported about 0.17 ppm. Is that correct?

Regards, Dieter

[Kleinstein]

The switch U214/4 is in series to the 20 nF cap. A resistor there would requite some extra jump at the OPs output and thus add a little to the transients on the integrator input. However there is the OP internal open loop output resistance  anyway so the increase would be more like less than twice the normal transient. With current sources the transients should not matter that much unless they reach some 50 mV so that the OP177 input current changes. I still had a spice simulation of the integrator around - adding the resistance increases the transient spike by some 5 mV, so not really much.

The INL seem to be different between units, some are better than others. TiN's unit seem to be one of the better ones, though not all the way as good as the original specs / curves shown.

@branadic:  I would expect the not so good OP curve to be from something like the LM308 or OP07, as at that time standard precision OPs. Chances are the OP177 is still a PMI design, before it came to Analog. Even than the AD707s don't see much of a variable input voltage or have a large output swing.
The AD707 and OP177 look like pretty similar, with maybe more detailed specs (e.g. current noise) for the AD707. AFAIR there were already test with exchanged OPs at the integrator.

[dietert1]

No, as far as i understand in slow mode there is a good 20 nF capacitor and parallel there will be a series circuit of 1.5 nF with 50 Ohms, which is basically the equivalent circuit of a bad DA capacitor. And in addition that 50 Ohms is no real resistor but something nonlinear.

Regards, Dieter

PS: Those three switches near the integrator output are trying to separate the 70 mV error voltage from the integrator output. But to do it correctly one needs four switches.

[Kleinstein]

50 Ohms and 20nF would be a time constant of only 1 µs. So this would be a very fast effect. It may effect the last rundown step a little, with the 1.5 nF being a little ahead. This would result in some very fine scale DNL error (possibly to small to see in 10 PLC mode - maybe visible at 200 µs integration time), not long range INL.

The tricky DA effects are those with a time constant of more than some 500µs (longer than the rundown phase) or so, probably dominated with those of > 200 ms.

[dietert1]

And we are searching for 0.5 ppm so that are about 14 to 15 time constants. By the way: My considerations were meant for Branadic and i don't see any reason to explain this any further. He wrote he was willing to search the reason doing some real work.

Regards, Dieter

[branadic]

Did a run with C0G caps and nothing has changed, so I come to the conclusion, it's not the cap and it's not due to DA. If this were the case, I should have observed at least a fration of a change in the shape of the curve, but I don't.
The slight tilt of the curves around zero is due to slightely different ambient temperatures, as already shown in a previous post.

-branadic-

[Kleinstein]

Leakage across the capacitor (e.g. on the board) can have an effect that looks like DA of the capacitor: also an error proportional to the average voltage in the capacitor (= leakage path).
The observed jump near zero is about 5 µV = 0.5 ppm. This would be an average current to the integrator of 250 pA. Near zero the voltage changes by some 1.25 V so that a leakage resistance of some 5 Gohms could explain the jump. This sounds like a lot of leakage for a board with guard traces, though a relatively spread out integrator input.

I don't think leakage from the output of the slope amplifier could be an issue, as this output should be negative most of the time. In theory there might be capacitive coupling from here - but there is still some distance to the sensitive parts like Q200, Q201. It should take quite some strength to interfere with the digital signal at U301 - though the signal gets quite close there. Another possible indirect coupling could be towards U204 to generate the substrate voltage. Anyway capacitive coupling should not vary much between units - so this alone should not be the issue. It would need another variable (e.g. output impedance of U204).

To check if leakage (e.g. at U213/1) or bias current (variations in input current to the AD707 from signal spikes) to the auto zero cap could be an issue, one could for a test increase the value of C208 (e.g. +22  nF). This would reduce a leakage effect there, and should not yet interfere to much with the zero phase.

[branadic]

@ dieter

If I get your message right, you suggest replacing U214, the switch. Currently there is a DG442DY installed, with the following feature:
• Low On-Resistance: 50 Ω
• Low Leakage: 80 pA
• Low Power Consumption: 0.2 mW
• Fast Switching Action-tON: 150 ns
• Low Charge Injection-Q: - 1 pC

Replacing it with DG442LE with
• On-resistance RDS(on): 16 Ω
• Fast switching tON: 18 ns,typ.
• Low parasitic capacitance:
   CD(ON): 15 pF
   CS(OFF): 5 pF
• Less than 8 pC charge injection over the full signal swing range
• Low leakage: < 10 pA, typ.

won't work, as the switch is most likely powered by ±15V, have to check on that.

DG442DY+ won't improve things either.

DG444B looks like it has a little lower on resistor on the table, but diagram then shows a different picture, not sure which one to trust.

DG412 might be an option, but have to compare both datasheets a bit more:
• 35Ω (max) RON with ±15V Supplies
• ±4.5V to ±20V Dual Supplies
• 5 pC

-branadic-

[Kleinstein]

A little lower on resistance for U214 might help, though I am not 100% convinced. Charge injection should not be important as it is switched only when changing the PLC setting and this will cause more upset anyway. Leakage should also not be so critical - at least not for the slow mode. It can be a problem for the fast mode (< 200 µs).
However a much lower R_on could upset the zero phase: the resistance of U214/1 at the zero storing capacitor is part of the compensation. So there could be a problem with an DG412 or max312L because of too little resistance.

If at all the resistance of U214/4 would be the one that is a problem. For the 20 nF cap it would act a little like additional (open loop) output resistance for the OP 206 ( = LT1056). I don't see a problem there. There is no need for settling to the ppm level there, it is about a charge error of some 100 pC, so something like 5 mV for the 20 nF cap or maybe 0.1 %. This would also be mainly an effect on the rundown part.

A test one could repeat (was done earlier in this thread by a chinese user, but with not so good instruments) could be checking the difference between the 1PLC and 100 PLC modes. So compare the average of some 100 readings at 1 PLC with 100 PLC at a few voltages. The 1 PLC mode would be about 10 time more sensitive to errors effecting the rundown. 

[branadic]

To check if leakage (e.g. at U213/1) or bias current (variations in input current to the AD707 from signal spikes) to the auto zero cap could be an issue, one could for a test increase the value of C208 (e.g. +22  nF). This would reduce a leakage effect there, and should not yet interfere to much with the zero phase.

You mean decrease C208 to 22nF, as it is already 33nF Polyester type or parallel it with additional 22nF?
I already had C208 in mind and though, replacing it by some different material cap might change something.

-branadic-

[dietert1]

Before even thinking about a permanent mod i would try and check whether the mistake they made could cause the observed effect. For example: Put a short over pins 14 and 15 of U214 to make the 21.5 nF lossy capacitor into a good one. You can't destroy anything except by soldering to hot. And then check in "slow mode" to see what happens. This would be a change that is easy to undo.
The big difference between your and TiNs instrument may indicate that the effect you are looking for is much bigger than 0.5 ppm, with an "on average" correction in software. So i would not be surprised if you get some really bad nonlinearity diagram with that test. But then you would know you are on the right track.

Regards, Dieter

[Kleinstein]

To check if leakage (e.g. at U213/1) or bias current (variations in input current to the AD707 from signal spikes) to the auto zero cap could be an issue, one could for a test increase the value of C208 (e.g. +22  nF). This would reduce a leakage effect there, and should not yet interfere to much with the zero phase.

You mean decrease C208 to 22nF, as it is already 33nF Polyester type or parallel it with additional 22nF?
I already had C208 in mind and though, replacing it by some different material cap might change something.

-branadic-

I suggest adding some more capacitance.  The idea is to reduce the voltage cause by leakage currents without disturbing the zero phase too much - thus not too much extra capacitance, but just enough so that an effect would be well visible. The capacitor type should not be so critical, as the voltage should be pretty stable and low (equal to the offset voltage). The Zero phase likely starts with some offset from the comparator and than settles to the lower offset of U205. The R_on of U213 and U214 may effect the settling speed, but I would expect plenty of time (at least in 1 and 10 PLC mode) and no dependence on the input signal. The 10 Ohms from R222 are misleading with a switch resistance of some 1.5 K in series.

[branadic]

For example: Put a short over pins 14 and 15 of U214 to make the 21.5 nF lossy capacitor into a good one.

Unfortunately this results in "230, Internal zero error" during startup self test, that I can't quit. So can't test it that way.

-branadic-

[dietert1]

You can use a hand switch to fool the self test during instrument boot.

Regards, Dieter

[branadic]

Did something similar right after I wrote this post. Installed two teflon wires and a jumper, that I've set after the unit booted. INL measurement running.
Replacing C208 33nF MKT by some 30nF ceramic caps didn't change something though.

-branadic-

[serg-el]

How has nothing changed? 
The slope has changed from -7V to -11V!
You have to try with another capacitor. 
Good luck!