Advantest R6581 8.5 digit DMM mini teardown/repair

[branadic]

Adding a 5k6 resistor to U206 changed at least something, even though not much and in the wrong direction.

-branadic-

[serg-el]

And if you proceed from the opposite?  Connect 5.6 kOhm not to -15 V, but to + 15V?

[Kleinstein]

With the extra resistor at the output of the integrator I see 3 possible effects:

The first is a nonlinear effect of U206, similar to what I have seen with the OPA172. The bandwidth / phase reserve can depend on the output current.
As 2nd point the output-cross over distortion of U206 would shift to a different point in the curve. Output cross over would usually change the ringing when the output current changes sign.  A 3rd effect is that the extra load resistance would give more coupling to the supply, so one would expect more "ripple" on the supply and maybe ground.

For the 3 rd effect one could try some local decoupling for U206/U207, so that AC currents between those two OPs would not flow so much via the global decoupling and through ground. This may need also high capacitance like 100 µF, not just a few 100 nF.

For the first point having the resistor to +15 V instead could in deed help. One could also consider a different OP for U206 (e.g. OPA604, OPA134, TLE2071, OPA140). There where some earlier tests with different OPs, but with not so much visible effect (could be due to not so good tests).

Another relatively simple try could be increasing R220 and thus less current towards the slope amplifier. Even some 5 K would not add that much noise (mainly for short conversions) and should not add too much delay.

@Dietert:
Aliasing between the test points and periodic errors is possible in theory, but unlikely to cause the odd shape. A similar form for the INL error were also found by others.

[branadic]

One possible point to try could be changing the substrate voltage for the switch FETs, especially a little more negative (e.g. another 10-20K in parallel to R214). As far as I can see from the data-sheet to the BSS83 (similar FET) a more negative substrate voltage would shift the threshold up, so that less cross conduction would happen.
Spikes on the substrate voltage could be an issue too.

On my check list.

A point worth checking may be the voltage at U203 Pins 6  (LT1056 in the  +1024 current source). If this is more negative than some -4 V, there could be a problem with Q201.

Measures -2.248V here.

An odd point is that I can't find local decoupling for U206 and U207. Normally this is a kind of no go for such a fast OP. The caps for there supply are quite a bit away.

Need to check this thread, if decouling was added before and if that improved something.

Maybe he should repeat his measurement for an interval from 1.00 to 1.01 V with the same number of steps so that we can see the fine structure of the nonlinearity curve.
Maybe the instrument is perfectly linear on the large scale and the whole confusion stems from aliasing.

Measurements against 3458A was performed and showed none of that, see here:

https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3007818/#msg3007818

And if you proceed from the opposite?  Connect 5.6 kOhm not to -15 V, but to + 15V?

Already in progress.

-branadic-

[Kleinstein]

The -2.2 V for Q201 is perfectly OK , so 4.2 V gate to source and not yet fully turned on and still some control.

For the added decoupling reports were confusing: initially no effect seen, but later some change, but still unclear.
The point is also how much and how ( +15 V to -15 V or +-15 V to ground). It can be both the very fast part that leads to ringing / spikes at the integrator input and it can be the slow part (e.g. 1-10 kHz range) from high drive current and current between U206+U207, leading to ground current.

The added current to the -15 V would be enough to avoid the output cross for U206 over all together. So not worry about this - this was also the original intention behind 5.6 K to the negative side.
The maximum current is still not so high: maybe some 4 mA towards U207  (6 V / 1.5 K, 1.5 K from R219+R220+switches) + up to 1.3 mA from the input. So a total current of maybe 10 mA max. After some more thought my suspicion goes towards trouble with ripple on the +-15 v supply. The 10 µF decoupling caps correspond to some 3 Ohms. The resistance of the inductors may not be much lower. So a current of some 3 mA could cause ripple in the 10 mV range for the supply. At 1 kHz the PSRR for the AD707 is only supposed to be on the order of 60 dB so thus could cause a modulation of the reference voltage in the 10 µV range.  So it may just need more capacitance for the decoupling. Much of the current is between U206/U207 and and thus flowing from +15 V to the -15 V supply. So just 1 capacitor from -15 to +15 V could help.

Ground current from the supply decoupling could also cause trouble, though it takes a few mOhms in the shared ground path.

[branadic]

Let's wait for the current results. I will then add 100nF/50V X7R capacitors across U206 and U207, maybe U205 too, but one after the other.

-branadic-

[branadic]

Having the 5k6 from output (pin 6) to +15V (pin7) changed things pretty obviously. We now found something, that influences the shape and can be optimized further.

-branadic-

[Kleinstein]

The quite different result with the 5.6 K to +15 V does not support the supply ripple idea, as it does not make much difference wether the current comes from the OP or through the resistor right at the OP.  It more points towards a nonlinear behavior of the OP (LT1056), in the sense that the current effects the GBW / Phase reserve. This can than effect the settling at the integrator input.
A current dependent performance is not such a surprise for the LT1056 as the output stage is quite asymmetric

In this context it is however odd we did not see a change with the 470 pF - there could be a change, but one would not note a constant effect.

[branadic]

The million dollar question is, what to replace it with for a test? I found OPA604 and OPA132, but no internal construction shown.

-branadic-

[serg-el]

Build a test setup, and check the linearity. 

[Kleinstein]

For the OPs, one would likely have a socket for the OP. So the replacement decision is not final.

For the OPs there is a report on OP linearity (Samuel Groner 2009) that include the OPA2604 and OPA2132, to the dual versions of the 2 OPs.  The OPA604 is fast, but seem to be not very linear with load. The phase/gain VS frequency curve from the DS looks a little suspicious in the 1-10 MHz range. So not sure about the actual response.

The OPA132 (seems to be the better version of the OPA134) is slower (still a little faster than the LT1056)  but more linear, though still not very good.
So no clear favorite here.

The effect in question here: the change in GBW with output current is usually not tested, kind of a hidden spot with rarely a hint.
The LT1056 data-sheet shows slightly different settling times to positive and negative steps. Still not sure if this applies as this seems to be with low load.

An external test setup is a good idea: This could be something like an inverting x -1 amplifier for a square wave and check the ringing with an external load to + and - supply.  To get more ringing to compare maybe with an intentional capacitive load of some 100 pF. 

[branadic]

For the OPs there is a report on OP linearity (Samuel Groner 2009) that include the OPA2604 and OPA2132

Let's link it in here for completeness: www.nanovolt.ch/resources/ic_opamps/pdf/opamp_distortion.pdf

-branadic-

[branadic]

@ Kleinstein

Would it make sense to use an OP177F (good linearity) together with a JFET input stage such as MMBF5103 (both at hand) as a replacement for LT1056?

-branadic-

[guenthert]

  Isn't there typically some kind of bootstrap scheme in place for op-amps at the input stage, particularly in order to minimize its non-linearity?  So the effective error isn't quite as bad as stated in the specification of the op-amp.

[Kleinstein]

One still needs a really fast amplifier for the integrator. One could use a JFET + fast BJT based OP (e.g. AD817). The 34410 and 3458 use this technique. If one accepts a small circuit instead of the LT1056 one could as well use an SMD OP, even with reduced supply, as the needed output range should be about -1 V to +7 V (maybe 10V). So even an AD8033 with a -6 V (zener in series) and +15 V supply would be an option (though tricky with the capacitive load from the switches.

The linearity for the OP177 is not really needed. The problem we seem to have here is that the output current of the LT1056 seems to change it's performance. This is different from the plot for the OP177, which is output voltage (with no load ?) under DC conditions. Any DC problem of the faster OP would be corrected by the precision OP anyway.

The AD707 / OP177 may actually be a weakness of the integrator for 2 reasons:
a) it is relatively slow and thus limits the speed the compound integrator can react. This is not so bad jet. it looks like the other OP in teh compound amplifier needs to be about 10-20 times faster to really make use of a faster precision OP. Otherwise the divider between the OPs is needed to effectively slow down the precision OP.

b) the BJT input stage gets slightly nonlinear beyond some 30-50 mV (depends on possible emitter degeneration) at the input.
   There starts to be additional input current and the slew rate is nonlinear. I am not not sure how bad this really is.
   The switching spike at the input can exceed the 50 mV level.

@guethert: the input stage uses bootstrappung and discrete JFETs. The point in question is the fast fet based OP in the integrator, not the input amplifier. Linearity is here also a question of loading the OP.

[branadic]

I checked what I have at hand and found: OP27, LF356, LF357, OP177, OP1177, LT1006

-branadic-

[MiDi]

Maybe modern OPA140 is worth to give a try?

[Kleinstein]

One could try the LF356 as a replacement for the LT1056, but generally the LT1056 should be better. The output stage is pretty similar - so I would not expect an improvement. The LT1056 is more like an improved replacement for the LF356.

The OP27 might be an option with an JFET in front. However it is not much faster then the LT1056.  The output stage also looks pretty asymmetric though possible a large class A range.

The OPA140 could be worth a try. At least it is available in DIP. Otherwise the cheaper OPA141 would also do for the fast part.
The OPA140 could also replace the AD707 with a slightly adjusted divider behind.

There is also a chance that just having local decoupling could improve the settling enough, that there is may be no more need for a different OP. Once the settling is good enough there should be little change if the GBW changes with current.

[branadic]

There is also a chance that just having local decoupling could improve the settling enough, that there is may be no more need for a different OP. Once the settling is good enough there should be little change if the GBW changes with current.

That sounds reasonable with the smallest effort, let's do this measurement first, before removing the opamp to solder in a socket.
Added 100nF to U206 pin4 and7 (+/-15V), meter now warms up, so we have new results tomorrow. Afterwards we can still add another 100nF to U207 and maybe U205 after that. Step by step to see what changes. Anyhow, I agree that local decoupling is for some reason homoeopathic.

-branadic-

[Kleinstein]

The conclusion that the difference between the 5.6  towards +15 and -15 V  tells us the problem is with the LT1056 reacts to a different output current is not 100% sure. There still is the possibility that the problem is supply ripple: there are 2 supplies and thus a combination of 2 effects that can be superimposed possibly compensating each other. The supply ripply would be at relatively low frequency (e.g. 2-5 kHz) so that the 10 µF caps present at the supplies are on the low side.

The OP that can be sensitive is U202. Here the local 100 nF caps don't help much at 5 kHz.

[quarks]

today I had a look at the INL graphs and wonder why expect the DMM INL to dominate the result.
I am not sure if I overlooked anything, but if the voltage source is just not linear enough, you can not get good DMM results. At least that could explain, why all suggested improvement did not give better results.

Except from Illyas data against JVS it is most likely that you can not get close to "real INL" of the DMM.

When I checked my DMM INLs I used 4808 and at least this gave better than expected 0.1ppm with 3458A/8508A from 1-10VDC for the combined calibrator/DMM linearity.

[branadic]

I am not sure if I overlooked anything, but if the voltage source is just not linear enough, you can not get good DMM results. At least that could explain, why all suggested improvement did not give better results.

If you had read carefully you would have seen, that I made this measurement with Datron 4000A, R6581 and 3458A in a thermal chamber and plotting INL of R6581 against voltage setting of Datron 4000A but also against 3458A readings showed the same result. Since other reported a similar shape of INL curve, we have pretty much confidence that this INL curve is not limited by the measurement capabilities, but a real effect on R6581.

Back to the topic:
I added 100nF to U206 +/-15V, but nothing changed. Now that I look at the latest measurement I noticed, that flattening the range from -5V to 0V by the 5k6 resistor on U206 /pin 6 to 7) came on the cost of the INL range +5 to +11V where it seems to be added.

-branadic-

[Kleinstein]

The calibration should not effect the INL curve. If at all ACAL could change the small slope factors a little. The information there is a little confusing. There is a measurement mode for the slow slopes, but the nominal slope rations are also close to integers. So the measurement could be just a self test to check if still in the valid range. The other possibility would be a numerical correction to the result, so essentially allowing a non integer slope ratio. Anyway this would be a more DNL type problem with some 1000 ups / downs and can not explain the curve.

The normal artifact calibration should only set the global scale factors for voltage and current/resistance. So no effect on linearity at all. I am not sure of there is a different factor for the positive and negative side. I kind of doubt it, but this could be possible. Some meters (e.g. 34401) seen to use some such corrections to improve the INL.

For the positive side error getting larger with the 5.6 K to the positive side the graph may be slightly misleading, as there is always still an uncertainty about a linear term. This would more the errors to other areas. This is a general tricky part with the INL curves: one does not know which range is correct. It still looks like the curvature is slightly increasing and also changing from a more smooth parabola to more like a break at +8V.

Currently my suspicion goes towards low frequency supply ripple effecting U202.

[dietert1]

branadic, the next more complicated circuit over a resistor is a constant current source made of a JFET and a resistor. It should be dimensioned such as to yield about 2 mA. Since the integrator input current is at most 1.5 mA in either direction, 2 mA will be enough to keep the integrator output loaded in one direction and to avoid unnecessary extra currents when the integrator goes negative. Maybe that helps with the curvature above 5 V input.

Regards, Dieter

PS: Concerning calibration: We have seen that TiN first proposed his three 3458A as a linearity reference and that he later backed up to saying that he had done comparisons to a Josephson array. In that sense his 3458As are secondary linearity standards, yet he did not apply a calibration when using them as reference. So the term reference is being used more like "reference amplifier" or "reference speaker". I also think that zero dent in the R6581 is real and typical for that instrument and it is nice to have some idea what may be the reason. After that it gets a lot more difficult.

[Kleinstein]

Besides the current going into the integrator there is also some load resistance. This are some 1.2 K  + 220 Ohms + 2 x R_switch, so some 1.5 K.   For the positive input voltages the integrator should go up to some positive 3 V with less amplitude at a high input voltage. The voltage should not go much below zero (just to trigger the comparator). For the negative input side I would expect up to some 6 V, as the average voltage reaches to about 3 V and with a triangle shaped waveform the peak should be about twice that, maybe a little more, as not all "periods" are the same.

It is still odd to see a relatively good performance for negative input - this side has a more variable voltage at the integrator.
I would consider the positive side run_up the better version, with a steady waveform with no obvious weak points up to the very end, when there may be quite short pulses.

For may ADC version I saw an effect of the current to the integrator on the scope: the output current seems to change the GBW/phase reserve for the OPA172 I used. At least the waveform tested at the equivalent point to the output of U205 changes.  However I only saw an effect on the scope - essentially none for the INL. Not sure if one could see the effect at the output of U205 here, as the AD707 is relatively slow and  the capacitor C207 complicates the waveform.  The compensation I tried was with a current mirror, to essentially compensate the variable input current. This would be the next step up from a constant current.