EEVblog Electronics Community Forum
Electronics => Metrology => Topic started by: deadlylover on March 14, 2016, 09:54:11 pm
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Here's a mini teardown of the Godzilla of multimeters, the Advantest R6581 8.5 digit beast from Japan.
It's basically a baby 3458A. The R6581 has auto cal and 2 source artefact calibration, basic 10VDC 1 year spec is 5ppm. From what I've seen it has 2-3 times worse noise and linearity than the 3458A...but it's 2-3 times cheaper on the used market. There's a good review and teardown from our friends at 38hot (http://bbs.38hot.net/thread-212-1-1.html), very interesting read. ^-^
Mine has developed a fault on the current ranges, it seems that the 1000mA Range relay wants nothing more than to spend the rest of its life together with the 0.1Ohm shunt, it's latched on forever and ever. The unit is just about 18 years old now, can't say I'm surprised. :-DD
Only a short teardown today, I just needed to know what relays to order and I'll be taking more pics during the repair.
Not much screwing around was needed, 2 to take the covers off, 1 for the shield and 3 for the AC board.
(http://i.imgur.com/jEWdbr1.jpg)
(http://i.imgur.com/lgCEBCT.jpg)
Above is the AC board, only the R6581 has this option, the R6581D/T models are DC only.
(http://i.imgur.com/2m29v8N.jpg)
The current shunts are on the upper right. Lots of nail polish and AE hermetic sealed resistors (?) dotted around the place.
(http://i.imgur.com/adGP08v.jpg)
It's got an LTZ1000 reference, not the A version! Set to 65C methinks.
That's it for now folks, I'm going to investigate if the relay is stuck on or if it's just under orders from above. I'll be replacing some of the electrolytics and relays while I'm at it. Sourcing them will probably take quite a while... oh boy.
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Thank you for the pics. Do you have any of the manuals? It seems information on this beauty is rather scarce.
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Thank you for the pics. Do you have any of the manuals? It seems information on this beauty is rather scarce.
I uploaded it here (https://www.dropbox.com/s/67vd6qj0ob7mh5h/R6581%20manual.pdf?dl=0), how's your Japanese? >:D
I've bugged Rohde & Schwarz to see if they can give me any more info, they're the Advantest distributors in Australia.
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Moar pics, please! Can I steal them?
Perhaps after repair you may like to participate in some comparisons for 8.5-league?
Currently comparison pool likely to be is 6 x 3458A, 3 x 2002, 2 x 1281 and perhaps 7081 :).
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Hello deadlylover,
looking forward for more to come.
I really like the R6581 because it has artifact calibration as the 3458A but a much more userfriendly UI.
Thanks for sharing
Bye
quarks
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TiN,
Yep you're free to steal all the pics, I will take much more when I remove the boards. ^^
The orange relays are still made by Panasonic, DS2E-SL2-DC5V ($20) and S2EB-L2-5V ($6). Ouch.
The silver ones marked UBT/UBM-12205 are made by Sanyu, I think they are shielded low thermal EMF reed relays. They're old part numbers and I've contacted them to help find a modern equivalent, they've probably just gone through a renaming scheme and I hope they weren't custom order by Advantest.
The R6581 is a great meter, it is like the 2002 (dual line VFD) and 3458A had a baby. Even a dummy like me had no trouble at all using the meter the day I got it.
They pop up every now and then on Yahoo Japan for about USD700-1000, still expensive but somewhat within reach of hobbyists. I think I need to acquire a few more to act as spares units, but I can't help but hold the funds for a used 3458A instead.... it still calls out to me...
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Using relay like 34401a , i dont see any reed relay and hope never have like 34401a ! :palm:
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The relays used for current range switching should not be that critical - high current, maybe reasonable low leakage, but no need for low EMF, very low leakage or high voltage. So chances are good to find suitable of the shelf ones.
The metal cases around the reed relays is also there the reduce the driving power, it works as part of the magnetic circuit. This is nothing so unusual and expensive. Anyway I don't think these relays are used for the current ranges - more like voltage ranges and ohms.
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This is just too cool, I love the hermetically sealed resistors.
This is almost as good as RF Porn.
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User manual Japanese language only! so if want to calibration process to hard!
How to runing calibration dmm?
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Nice to see a piece of precision test gear that actually looks like it is, rather than some anonymous looking smt PCB. That AC board is a work of art! :)
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That is a nice bit of kit :-+, Precision resistors by Alpha Electronics (Japanese naturally).
The lack of readily available documentation (and nice internal pics) has stopped me acquiring some Advantest gear although I keep browsing them from time to time ....... so tempting :)
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User manual Japanese language only! so if want to calibration process to hard!
How to runing calibration dmm?
Calibration/adjustment is very easy, the manual is not needed!
Menu > Calibration > External
We can select 10VDC or 10k Ohms, all we have to do is apply a value to the meter's inputs and enter the applied value (anywhere from 9-11VDC/kOhms), job done!
Then every 24hr or after a 1C change in ambient temperature, we can run the internal calibration. It takes about 15 minutes to run a full internal cal.
Menu > Calibration > Internal > (All, DCV, Ohms, ACV)
I just heard back from R&S that they will not service any units above 15 Years old, and that Advantest will not make any service documentation available, even in Japanese. Oh well, more fun for me then. ^-^
Still awaiting a response from Sanyu, maybe I'll get one by the weekend, I should try the Japan office.
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from the internal foto I really like this DMM very well lay out for example how they made the power supply shield, but why this this DMM "can not" beat 3458 ? any one has theory about why ? I like to hear it even the wildest one :-//
For deadlylover thank You Sir for pictures.
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You're very welcome, more pics soon I promise!
I think the 3458A's A/D converter is just too good.
Here is a snippet from the R6581 brochure, on the left is the linearity error on 10VDC tested at a Josephson junction array and on the right is the zero noise.
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Hi deadlylover,
thanks for sharing .. and I wish you a lot of fun with this 8.5 measurement box..
Do you have any idea, how the ACAL is done in this instrument?
You know, many precise 10:1 transfers and several mode conversions from 10V and 10k are necessary..
The 3458A uses its 0.02ppm (typ.) linear A/D (for ~0.3ppm transfer accuracy).. The Datron 1281 uses a precision ratio transformer.. for the 34465A / 470A, I do not know, yet.
So, any hint inside the instrument? What can we learn from the specification of the other DCV ranges?
How linear is the 6581, actually? The diagram looks very promising, also in the league of the 3458A, isn't it? Seems to have about 0.05..0.08ppm INL?
Frank
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Dr Frank, you're welcome, I was expecting you here sooner or later. :P
I'm guessing that the R6581 also uses it's A/D converter, I may have read somewhere on the manual or brochure that it did it using "ratio", but that's all it said, I think it implies it uses the A/D. The only other hint from the specs is that the 24hr range error from 10V>1V>0.1V increases from 0.1>1>10 ppm of range.
Hmmm now that you mention it, maybe I haven't given the R6581 enough credit. I thought that the 3458A easily had the upper hand because it had much less range error on DCV, but with a closer look I noticed that the 3458A spec also included having to use the MATH NULL function.
If we include that extra error without using MATH NULL, the R6581 is identical to the 3458A when comparing 24hour specs....actually, the R6581 beats the 3458A on 10VDC (0.5+0.1 vs 0.5+0.2)....I think?
Of course we don't know how the R6581 performs on a level playing field with MATH NULL, which we will always use when taking accurate measurements, but it seems Godzilla isn't going down without a fight!
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here is a DCV comparison chart I made quite a while ago (see att. pic.)
R6581 is quite good, but not as linear as the unrivaled 3458A in the 10V range.
As I have both 3458A and R6581 I must say again, the R6581 is a lot easier to use and I like it for that.
3458A ACAL looks to me identical to R6581 "Internal Calibration".
Biggest drawback, as mentioned several times before, is missing documentation/schematics.
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DeadlyLover , Well yes,
R6581 has the LTZ1000 implemented correctly, at 45°C, no wonder that it has 5ppm/yr. instead of 8ppm/yr., and so easily beating the 3458A in this aspect. (Could even be spec'ed much better, anyhow)
The spec. reveals the ACAL function, as the ranges have constant difference in uncertainty, e.g. 1V for all times constantly 1ppm more uncertain than the 10V range.
This 1ppm difference requires, that the 10:1 ratio transfer must have been made with an uncertainty of 0.1ppm of input. From the linearity curve you presented, that fits to the INL of 0.08ppm (of Range) for its A/D.
The 100mV is always critical, due to thermal voltages; 10ppm is about 1µV, only.
Often, you can not null these offsets in real measurement situations, so you have to include them in the spec.
For example, if you measure a Weston standard cell, you can't short the DUT for cancellation, so you will at least measure all thermal voltages at the jacks, internally to the DUT, also on the cables.
In my post about the 34465A/470A, also ACAL instruments, I later found out, how to verify 100mV DC on the '465A vs. the 3458A, more precisely.
The trick was, to null both instruments at zero output of the calibrator, and then applying the 100mV or 1V.. The ratio of both readings gives the gain calibration for the '465A only, and these 10 or 15ppm additional error (due to thermals) is eliminated. After that procedure, the 100mV range (gain) was measured to be uncertain to < 1ppm.
Maybe that's a specific advantage of ACAL instruments, as they also eliminate offsets during the ACAL procedure, so that external thermal offsets really can be nulled.
Stability (24h, 2h, 10min) and noise measurements would also be interesting.
Frank
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Thank you for the pics. Do you have any of the manuals? It seems information on this beauty is rather scarce.
I uploaded it here (https://www.dropbox.com/s/67vd6qj0ob7mh5h/R6581%20manual.pdf?dl=0), how's your Japanese? >:D
I've bugged Rohde & Schwarz to see if they can give me any more info, they're the Advantest distributors in Australia.
I ran it through a couple of hours of Adobe Acrobat OCR and uploaded it here (https://www.dropbox.com/s/4xwg7f36skn7bz7/R6581%20manual%20%28OCR%29.pdf?dl=0). (Strangely enough, page 584 appeared to already be OCR'd).
So at least that allows one to cut-and-paste pages to translate.google.com or something like that. :-+
If I actually owned a R6581, I would take the next step and get in touch with an old friend who spent 6 years in Tokyo, fully translate the darn' manual and typeset it too! But so far the japanese yahoo auction site has them for even cheekier prices than a 3458A.
Then again, I am happy with 6.5 digits. That's like the odd pint and maybe a bit of a toke now and then :popcorn: 7.5 is probably adding a bit of speed and ecstasy on the weekend, but 8.5 is like hard drugs, heroin and krokodil injected in the groin because no veins left... >:D :-DD
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(Strangely enough, page 584 appeared to already be OCR'd).
That might have been me. :-DD
Cheeky prices indeed, the last few auction listings a couple of months ago went for about JPY80,000. You don't really see too many good deals that are buy-it-now on Yahoo Japan.
Top tip for fellow volt nuts looking for one of these beauties, I've already mentioned this a few times but I might as well repeat it in this thread one last time. The R6581 has an internal battery that keeps the configuration memory, and the one on my unit pooped out on me after 16-ish years.
When the battery dies the meter will show an error (config memory lost) only one single time after it initially loses its contents. The meter does a quick self test on power up and no error will show on subsequent power on cycles. Now, this memory also stores the internal calibration constants, and if it is missing, the meter won't show any readings because it auto-ranges like a madman with relays firing non-stop (making sellers think there's something seriously wrong with the unit). Running the internal cal will restore functionality until the next power cycle, and it will show the error one more time.
The battery is a bog standard 3.6V axial leaded 1/2AA cell.
So if you ever see a cheap listing with those symptoms...jump on it! You can bet there'll be quite a few units running out of batteries over the next few years. :P
Oh and another thing, the R6581 has a real time clock inside and when an external calibration is performed it stores the date and time, so don't forget to pull the data over GPIB before calibrating!
I forgot to do that and all I know is that my unit drifted about 9ppm/13ppm on 10VDC and 10KOhms (1.5ppm/1ppm 95% uncertainty respectively). There's a chance my unit has never been adjusted since the factory in 1998 but there's no way to be sure, I feel like I let all fellow volt-nuts down by forgetting to check that. :'(
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Hi deadlylover
Where is location of battery ? repalace battery can lost calibration ?
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Some pictures about the R13020 Analog output unit (https://translate.google.hu/translate?hl=en&sl=ja&u=http://www.adcmt.com/techinfo/product/end_of_sale/R6581D/R6581D-R13020.html&prev=search).
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If it's interesting, a R6581(D,T) have a full featured diagnostic mode, triggered by pressing HOME + POWER switch.
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Also R6581 got a lot of improvements during its production. Some of my early research is here:
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Also R6581 got a lot of improvements during its production. Some of my early research is here:
It looks like much of the "improvements" are towards lower production costs, not so much better performance.
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Yes, it seems so. But the most widespread model is a R6581T, and it is not intended for general metrology. R6581T was presented to market as affiliated equipment for IC Test System by ADVANTEST.
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In some places, like at the input amplifier and the ADC even the new version BMF resistors instead of even better hermetic ones before are very good - I would not expect precision resistors like this at these places. Other meters use more like PTF56 or similar for that purpose. So the changes are saving some money, but would have no significant effect.
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Also R6581 got a lot of improvements during its production. Some of my early research is here:
Interesting project. If it helps, I can take pictures of a meter made in ~98 (at least the ref board has 3 hermetic resistors and plastic OPA).
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Interesting project. If it helps, I can take pictures of a meter made in ~98 (at least the ref board has 3 hermetic resistors and plastic OPA).
Thank you for the suggestion. The most interesting thing is a AC subboard and its interconnection.
Up to this day was reversed an ADC schematic, algorithm of A-D conversion, algorithm of A-D current sources selftesting, fast/normal mode ADC switcing, master voltage reference and all seven auxiliary vrefs too, input MUX hybrid, VDC and Ohms input protection, VDC guard/bootstrap amplifier (partially), VDC artifact switching circuits, main input amplifier (FETs, guard, range switching only), level triggering DAC.
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I came by a R6581T on the cheep but all it does is beep at me with no display. From everything I'm reading, and you guys have been the most informative, I should start by looking at the battery. Any further ideas for the beeping?
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R6581 have a full description of selftest errors in a plain text mode. But I don't have a programmer for PLCC44 EPROM :'(
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A reader would suffice ;).
The error messages are listed in appendix A.1 in the manual.
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As expected, it's a VRTX32/68k real-time OS based firmware. But there is no secret menu, hidden codes e.t.c :(
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The last unexplored places ;D
P.S. The problem is solved. Thanks to Advantest Research Club.
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Hi, deadlylover, I met a 6581 who have a selftest error "+224 a/d check5 error" and want to find the manual to see the detail. I noted that you have uplaod one copy in the link ,but I can't download it. Could you help me to send the manual to my email: 13603052469@139.com , and could you give me some advice on how to repair it ?
Many thanks and Happy new year 2018!
Best Regards,
Szjdb
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AD_5 CHECK is a rundown current sources ratio test. Charging surrent switch - Q209, discharging - Q210.
This is the last AD checkpoint, so it is possible, that Q210 is in failed condition.
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Thanks a lot!
Yes the meter has the problem in current measurement and repaired by somebody, who said replace the relay . The test date deviated from the reference r6144 output about 0.8% to 0.06% from 0.1mv to 10v range. My question is can I fix the A/D check5 issue just by inner self calibration or external calibration?
Thanks again!
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AFAIK selfcalibration can't fix the AD Check errors. It's hardware problem. Look at the 7461 DMM errors list:
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Thank you Mr. Mickle.T !
1. The check5 error occurs some time , not 100% in every power on cycle. If not occuring, does it means the test result is reliable?
2. Is there posibility the eeror is causing by the resistor network THD140? This parts is difficult to find replacement.
I was wondering if to buy the meter and can fix it by myself.
Thanks for your help!
Best Regards,
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There are many tests (and AD check also) can be launched via DIAG mode menu.
THD140 is a 12:1 hybrid FET MUX and do not have any relationship with ADC and a/d check5 error.
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Thanks a lot!
I will try it!
Best Regards,
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Hi, Mr. Mickle.T ,
The seller give some more infomation about the 6581.
1. The A/D check5 error is few to occur, 1 in 20 time when power on. That is to say it can be ignored?
2. The test data are as below:
source meas delta % meter range
100 ma 100.0764 -0.0764 -0.000764 100MA
10 ma 9.9935 0.0065 0.00065 10MA
1 ma 0.97925 0.02075 0.02075 10MA
0.1 ma 0.07177 0.02823 0.2823 10MA
10000mv 10018.8843 -18.8843 -0.00188843 10V
1000 mv 1002.125 -2.125 -0.002125 10V
100 mv 100.4422 -0.4422 -0.004422 10V
10 mv 10.20681 -0.20681 -0.020681 100MV
1 mv 1.19438 -0.19438 -0.19438 100MV
Does it means the issue is not so serious and can be fix by the self of external calibration?
Thanks !
Best Regards,
szszjdb
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I just had a wee look in on the Yahoo auction site you mentioned. Why are the bench meters going so cheap? Some nice stuff for crazy prices! How does that work out so cheap?
Does it cost a fortune to get them shipped from Japan to like the UK or USA or whatever?
I would never need anything so much as one of these units, I am just learning hobby stuff so a decent handheld meter is more than I will ever need.
Just seems funny bench meters like that going so cheap. What's the catch? I would expect them to go for lots of Wonga!
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Does it means the issue is not so serious and can be fix by the self of external calibration?
How does that work out so cheap?
The answer is very simple ;D
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Hi, Mr. Mickle.T ,
That's not my case. I really saw the picture in measuring. I just wonder how difficult to fix it . By self calculation or relace Q210 ?
Thank a lot!
Best Regards,
szszjdb
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Integrator switches Q206-210, Q217-221 leakage or fail, PCB leakage/dirt, power supply noise, R213 resistor network fail.
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Thank you Mr. Mickle.T ,
You means to fully fix the A/D check5 error issue, must check the componenent you mentioned above.
But in the case that the meter can pass the self check and get into the normal use ,can the inaccuracy reading issue been fixed by self or external calibration?
Thanks a lot and Best Regards,
szszjdb
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Selftest procedure have a very wide tolerance limits. If ADC have a large noise or nonlinearity, selftest will not show an error, but artifact calibration will give an unpredictable results.
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Fully understand.
Thank you very much!
Best Regards,
szszjdb
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Hi, Mr. Mickle.T ,
I got the meter in hand. It seems look good than before. No A/D check5 error found till now , and still have the inaccuracy issue ,but not so bad. I need to self calibrate the unit. Could you give me soem advice on how to perform the calibration?
Thanks and Best Regards,
szszjdb
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MENU -> CALIBRATION -> INTERNAL -> ALL -> OK
Wait 4 min 20 sec and all is ready.
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Hi, Mr. Mickle.T ,
I found the calibration in the menu and performed the internal calibration , but the inaccuracy issues are still there and test data as I sent before.
source , read, range
1, 1.19438 ,1mv
10, 10.20681 ,10mv
100, 100.4422 ,100mv
1000, 1002.125 ,1v
10000, 10018.8844 ,10v
0.001, 0.000991121 ,1ua
0.01, 0.010042577 ,10ua
0.1, 0.10022894 ,100ua
1, 1.002252 ,1ma
10, 10.02333 ,10ma
100, 100.21481 ,100ma
When short the DCV port with the short jumper, the votage display is 0.19806 mv zero offset, very strange. There must have some hardware failure inside the circuit.
Then I get into the diagnostic mode and find the data as below.
X1Z1 -0.0352 v
X1Z2 0.0000359 v
X10Z 1.88976 mv
X100Z 2.08456 mv
7V 7.085432 v
-10vref -9.8421145 v
-1vref -982.06829 mv
-0.1vref -96.29756 mv
temp 30.74 c
10ma -9.659214
1ma -965.6122
100ua -96.5745
10ua -9.655528
1000na -968.3756
100na -97.2028
10na -8.504
When to perform A/D check, I press enter but no action taken at all and I press HOME to quit.
Could you kindly give me some advice on how to check in the following.
Best Regards,
szszjdb
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Further check when open the case, as the picture above.
As mentioned by seller that the meter has been repaired by somebody before. I can find the U105 is replace by a 1993's LT1220 and the nearby R155 3.3ohm have been soldered. The U013(hc138) and U014(lm393) also have been soldered. The R103(10K metel foil res) has also been soldered. The k500 must been replaced as the seller told. The PCB is clean enough.
It is a great challenge for me to fix it.
Best Regards,
szszjdb
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This really looks like a sick ADC. A broken (highly nonlinear) ADC can also cause the scale being off - so I would not worry so much about the absolute scale. If you have a suitable equipment, it would help a little to check the linearity with a few more points (e.g. every 0.5 V in the 10 V range) in one range (e.g. 10 V). With some luck this could give a clue what is bad with the ADC / amplifier. There is still a small chance the defect is not in the ADC itself, but the amplifier or mux.
For the time being there is no need to look at the other ranges.
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I think the second step must be External Zero Calibration.
R155 (22 Ohm), D112, D113 and C114 - makes a 13 V positive power supply for U105 opamp. U105 is a output amplifier of Inp. Amp. "precision" channel. It in use while integration time [200 uS...Nx10PLC].
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Hi,
Yes ,after external zero calibration , the offset error slighty decreased . Test data as below.
before:
short input port zero offset: 0.19806 mv , too large offset error.
source , read, range
1, 1.19438 ,1mv
10, 10.20681 ,10mv
100, 100.4422 ,100mv
1000, 1002.125 ,1v
10000, 10018.8844 ,10v
after:
short input port zero offset: 0.00962 mv , much better, but still large. In my 34401, it's 0.001mv
1, 1.00514, 1mv
10, 10.02054, 10mv
100, 100.14873, 100mv
1000, 1001.74301,1v
10000, 10017.832, 10v
The reading is not so stable in the last 3 digit and I am using the default 10 plc.
And I just performed the external zero calibration, others like DCV, OHM calibration havn't been done. I have performed the internal calibration before, so not doing it this time.
How to do in the next step?
Best Regards,
szszjdb
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Hi, Mr.Kleinstein,
Time is too rush to get to work. I will measure more point when get back home. I got R6144, TR6143 and HP34401a in hand and the 34401a is reliable for the further test following.
Thanks a lot!
Best Regards,
szszjdb
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Further external calibration were made with the input 10v for DCV, but can't fix the fullscale error. It seems the calibration have no effect to the fullscale gain.
below are the 10V linearity test compared to the 34401a for 10v range, open the A ZERO function and plc=10
34401a 6581 error(%)
1.00021 1.002196 0.198558303
1.9997 2.00372 0.201030155
2.99921 3.005257 0.20161976
3.9988 4.006853 0.201385416
4.99942 5.009495 0.201523377
5.99906 6.011147 0.201481565
6.9988 7.012906 0.201548837
7.99856 8.014679 0.201523774
8.99837 9.016499 0.201469822
9.9982 10.018345 0.201486268
below are the 10mv linearity test compared to the 34401a for 10mv range, open the A ZERO function and plc=10
34401a 6581 error(%)
1.0119 0.99621 -1.550548473
2.0115 1.99846 -0.648272434
3.0112 3.00078 -0.346041445
4.0101 4.00188 -0.204982419
5.0113 5.00422 -0.141280706
6.0101 6.00517 -0.082028585
7.0106 7.00771 -0.04122329
8.0107 8.0105 -0.002496661
9.0104 9.01134 0.010432389
10.0108 10.01334 0.025372598
I also check the power supply for U105 , v+=13.6 , V-=-15v , it's ok.
Then I test the U014 (LM393) and find the voltage below:
pin LM393(v)
1 -17.6
2 2.478
3 0.1
4 -17.6
5 4.95
6 2.478
7 SQUARE wave ,2.4hz, as ADIN waveform
8 4.95
Also test the U105 (LT1220) (v)
1 13.6
2 0
3 0
4 -14.3
5 156MV
6 SQUARE wave ,2.4hz, as ADIN waveform
7 13.7
8 13.7
Both the pin7 of the U014 (LM393) and the pin6 of U105 (LT1220) have the same waveform like the ADIN test point. It's a SQUARE wave ,2.4hz, and the amplitude equal to the input DCV.
I also tested the reference pcb output , and it's read 7.07097v in hp34401a and 7.08520xx in diagnostic mode ,which has small difference.
Is there any thing strange ? What's the next step?
Best Regards,
szszjdb
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These R6144, TR6143 and HP34401a are too bad setup for 6581 testing :(
(http://storage6.static.itmages.ru/i/18/0112/s_1515785627_8560808_9bf8a256c3.png) (https://itmages.ru/image/view/6392787/9bf8a256)
1. Before any comparing all of the devices must be preheated. 6581 not less than 2 hours!
2. HP34401a readings must be aquired via RS232/GPIB interface terminal with as much digits, as possible.
3. Shorts the 6581 inputs terminals. Wait 10 minutes, run External Front Zero Cal.
4. Connect 10V reference source both to 6581 and 34401A terminals. 34401A must be in >10GOhms mode 100 PLC. Wait 10 minutes, run External DCV Cal and input ref. value from 34401A.
5. Run Internal Cal (All ).
Now you can check the 10V range with reference to 34401A. Please note that 6581 have much better linearity perfomance in negative polarity (and all DCV/DCI/OHms selfcal are carried out with negative artifact sources).
I also check the power supply for U105 , v+=13.6 , V-=-15v , it's ok.
It isn't Ok, but not critical.
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Hi, Mr. Mickle.T ,
Thanks a lot!
Yes I know the R6144, TR6143 and HP34401a are not suit for precision calibration of 6581, I just expect the short term stability match the comparing requirement. After fixing, I will send it to external lab for the final calibration.
I can't understand the data BEST FIT column in your picture, so as to the INL column. The error is reach 20mv when 10V input and 2mv when 1v input comparing the 2 meter. From my positon , the 34401 is more reliable because I got 2 pcs 34401 and the error between them is at 10uv range.
I will following your suggestion to redo the calibration tonight.
For the moment , I feel very strange that the external DCV 10V calibration take no effect to the measured result of 6581. If in 34401 case, the reading is corrected right now.
Please look at the very first data when I get the meter:
6144 6581
1000, 1002.125 ,1v
10000, 10018.8844 ,10v
The update data after internal and external calibration:
34401a 6581
1.00021 1.002196
9.9982 10.018345
It's very clear that the reading of 6581 nearly no change before and after external calibration and the error is still in the 20mv range for 10V input.
What I do in the external calibration are as below:
1. power up for 2 hours both for r6144,34401 and 6581
2. output 10V from 6144, apply it to 34401(10Mohm default) and 6581 the same time
3. wait for 1 min and get into 6581's external calibration menu and choice the DCV
4. enter the reading from 34401 to menu and comfirm to calibration, and after few seconds ,done
5. the 6581 reading is still the same as before
Are there any step wrong?
I just connected 10V source to HI and LO port and left other port floating include the GRARD ,HI_sense ,LO_sense and DCI port. When calibrating the external zero point, I just short the HI,LO,HI_sense and LO_sense, left GRARD and DCI port floating.
Unlike the fullscale external calibration, the zero calibration take effect right now and reading form 0.19806 mv reducing to 0.002 mv range.
I was wondering if the external 10v calibration signal haven't been apply to signal chain or beyond the upper and lower limits for 10V calibration and the calibration has actually been ignored . Am I right? If do , it can be the reason why the previous guy can not fix the reading error issue.
Best Regards,
szszjdb
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For further information, the reason I test the U014 (LM393) and the U105 (LT1220) is because the 2 parts has been soldered or replaced by the former serviceman. If look at U014 (LM393 mark as 393) the V- reach -17.6V and V+ reach +5V. Is there an -18v power rail in the meter?
Best Regards,
szszjdb
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U014 comparators are part of U001 FETs gate drivers. U001 MUX divided in to the two sections: a first includes two Ohms, three DCI and one LM35 inputs, a second - DCV, +7.2V, LO, RMS, HV_DIV and ACAL -0.1/1/10V. U014-1 controls the first section, U014-7 the second.
-18V on the comparators output disables the corresponding section.
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Hi, Mr. Mickle.T ,
Many Thanks !
That is to say the U014 and U105 is working fine.
So how about my last post about the external DCV calibration?
I was wondering if the external 10v calibration signal haven't been apply to signal chain or beyond the upper and lower limits for 10V calibration and the calibration has actually been ignored . Am I right? If do , it can be the reason why the previous guy can not fix the reading error issue.
How can I check for them?
Best Regards,
szszjdb
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The test for linearity does not look that bad. Quite linear (the residual difference could be due to noise / not wel stabilized temperature). However there is a significant offset. This might point to a problem with the MUX part, so that for some reason the internal zero adjustment does not work right. If the internal zero adjustment (that is reading an internal zero with the ADC) does not work correct, there would be quite bit of drift (not just the normal drift, but likely extra drift from the not working zero) and thus the external zero cal would not be stable over time.
If the internal zero is off this might also cause an error for the DCV calibration, though ideally it should not have so much effect. But I would not yet worry so much about the scale. If the zero does not work correct, one can not expect the DCV cal to work correct either. If taking out the offset the scale is not that bad.
It might be worth to check if there is significant offset drift when measuring a short with AZ active and maybe for comparison without AZ. I would expect quite some drift due to the defect. The non AZ mode might not be effected.
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Hi, Mr.Kleinstein,
Thanks a lot!
Yes there have both zero point and fullscale point error in my 6581.
Before external calibration, the short input port zero offset: 0.19806 mv , too large offset error.
After external calibration ,short input port zero offset: 0.00962 mv(yestorday 0.002xxmv) , much better, but still large. In my 34401, it's 0.001mv
The main issues is the fullscale point error, which can not be cerrect by external DCV calibration. Please refer to the data below:
below are the 10V linearity test compared to the 34401a for 10v range, open the A ZERO function and plc=10
34401a 6581 error(%)
1.00021 1.002196 0.198558303
1.9997 2.00372 0.201030155
2.99921 3.005257 0.20161976
3.9988 4.006853 0.201385416
4.99942 5.009495 0.201523377
5.99906 6.011147 0.201481565
6.9988 7.012906 0.201548837
7.99856 8.014679 0.201523774
8.99837 9.016499 0.201469822
9.9982 10.018345 0.201486268
When 1v, the error is 2mv, and when 10v, it is 20mv, 10 time the 1v error. If it is just the offset error, it should be 2mv both in 1V and 10v input. Both meter are on fixed 10v range. That should be the A/D 's gain error. The key is the error can not be corrected by external DCV calibration.
I was wondering if the external 10v calibration signal haven't been apply to signal chain or beyond the upper and lower limits for 10V calibration and the calibration has actually been ignored . Am I right?
Best Regards,
szszjdb
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Ext DCV Calibration uses only three MUX inputs:
U001-10 LO (is routed to COM starpoint via R021 8k2 and connected to LO terminal via K004 relay);
U001-8 +7.2V from Master Reference output;
U001-7 DCV (routed to HI terminal via R008-011 2k2 protection resistors, K008, K006 and K001-front-rear relays). I'd like to note that R008-011 replacement surely means a huge voltage overload in past.
I can't understand why Ext DCV calibration has actually been ignored without a sign of error on the display :(
P.S. It makes sense to take hi-res photos of the main PCB.
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Thank you very much!
The site limit the size of the attached to 2M, let me try.
How about the picture attached.
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If the DCV calibration does not change anything (not even a fraction of a ppm), this would be more like a software / digital problem. Ideally the readout of the cal constants should tell about that. To force a visible change one might even try an cal to an intentionally slightly different (off) value. If could be a kind of extra check that it does not allow a DCV cal if the Zero offset is bad or maybe just to soon after turned on. However I normally would have expected an error message for this case.
A residual error of 9 µV is still way to high for the offset.
How is the zero reading in the different ranges, including the 100 V and 1000 V and maybe a current range ?
One more possible error source would be a relay (or similar) at the input - there needs to be some way to interrupt the direct path from the input when the higher voltage ranges with input divider are used. It should be possible to measure continuity here, just in case of bad contacts. If it is the input relay the 100 V and current ranges should be better.
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Hi, Mickle T and Kleinstein,
I had found something strange with the oscilloscope connect at the ADIN point of PCB ,I can view the 10Vp-p square wave and the amplitude euqal to to the input DCV. when get into the external calibration menu and select DCV and press YES to perform the calibration, the amplitude of the square wave change to 7v, that must be of overrange of the calibration limit.
What might cause it ?
Best Regards,
szszjdb
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7V p-p square wave is a second part of the calibration of Master Reference. But 6V p-p ringing
in the LTZ1000 output voltage is very strange :o
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Hi, Mickle T and Kleinstein,
I find out what wrong and the external DCV calibration working now. The front port of my 6581 is damaged and so I use the rear port. But the rear port does not support to pass the input 10v to ADIN, so the calibration is stopped because no signal found. I reconnect the front port and calibration done successfully.
Now the last issue is the zero point .
Before external calibration the day before,the zero offset is 0.19806 mv , too large offset error.
After external zero calibration ,the zero offset is 0.00962 mv(yestorday 0.002xxmv) , much better, but still large. In my 34401, it's 1uv.
Must I connect the guard port together with the HI,LO,HI SNESE, LO SENSE port?
What the zero offset should be and could you told me the number in your 6581?
How to find out the issue point? Would you please give me some advice?
Many thanks to all of you!
Best Regards,
szszjdb
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Must I connect the guard port together with the HI,LO,HI SNESE, LO SENSE port?
What the zero offset should be and could you told me the number in your 6581?
Guard must be connected. Have you seen this post? https://www.eevblog.com/forum/repair/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1397797/#msg1397797 (https://www.eevblog.com/forum/repair/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1397797/#msg1397797)
My R6581T have a max 300 nV offset (measured on 100 mV range after 2 hours of preheating).
A possible sources of DCV offset are:
1) an excessive ADC noise / shot-term instability,
2) large leakage current or damage of FETs in MUX U001, ultra low leakage protection diodes D003-D004, short pulses protection capacitor C008, ultralow input bias current opamp U009 (AD549) in the Overvoltage Protection Unit,
3) non-Ohmic contact or large thermal EMF in the K001,006,008 nonlatching relays.
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Something I noticed in your picture. Can you check the solder joint I marked? It looks not well soldered.
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Hi, Twoflower,
Thank you for reply.
The point you mentioned is maked. But I have not test the function of the relay. I will check it.
Best Regards,
szszjdb
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Hi, Mickle T,
I directly short the GUARD port with the other 4 port together and re-calibrated the zero front , and the zero offset is around 1uv and it is not so stable runing from 100nv to 4.5uv range. The meter has warmed up for about 8 hours.Is it fine?
When I measure the input signal, I just connect the HI and LO port to the 6144 source with the normal test line , the reading is also running in the last 2 digit ,2.0-3.0uv at 10v input. I know it might causing by the source noise, but how can I evaluate the noise performance of the meter? In my view , the 8.5 digit meter should keep stable in the uv digit and jump on the nv digit, right?
I have made a LTZ1000 reference board and does it can be used to evaluate the noise performance of the meter?
For running the LTZ1000 board about half an hour, the 10v output has max 2.0uv jumping range in 8.5 digit mode, and the A-ZERO is open and plc=20. Is it aslo fine?
More information, if I go to the diagnostic menu and measure the internal 7.2v reference , it is also jump about 2-3uv, in the last 2 digit range. It is fine? The meter is power on for 11 hours till now.
Best Regards,
szszjdb
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... zero offset is around 1uv and it is not so stable runing from 100nv to 4.5uv range. The meter has warmed up for about 8 hours. Is it fine?
It's absolutely not fine :( At least the measurements that I just carried out showed DCV zero about 300 nV with +-250 nV span (100 samples, 100 mV range, 10 PLC, AZERO On).
I think it makes sense to ask questions in that topic: https://www.eevblog.com/forum/metrology/dmm-adc-noise-comparison-testing-project/ (https://www.eevblog.com/forum/metrology/dmm-adc-noise-comparison-testing-project/)
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Hi, Mickle T,
Thanks for your advice.
About my 6581 in diagnostic mode :
1. the X10Z is 1.69315mv and X100Z is 1.8875mv, both seems too huge than the sample 0.06373mv and 0.01811mv in the diag mode document. Is there still have some issue in the circuit?
2. when get into the TRANSFER or A/D check item and choice one to perform, the LCD show the item name, but seems no real action taken because no information show the check finished. How can I find the result of the check?
Does the potentiometer r170 need to be adjusted to get better performance?
Best Regards,
szszjdb
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1. "Diag mode document" is not oficial and was compiled by me :) All results, displayed in this mode, are for diagnostic purposes only. No autozero and no cal constants are used in this mode.
2. TRANSFER, A/D and many other checks are instrumental checks, performed with a scope, logical analyzer e.t.c.
R170 potentiometer - InpAmp precision channel coarse balancing (x1Zero_2). I don't think you get a better performance than you have now.
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Hi, Mickle T,
Thanks a lot.
I found many data of my 6581 worse than yours in diagnostic mode, I just want to find out the reason and make result better. My 6581 has been repaired by somebody and might have some mistake lead to the bad performance. The X10ZERO, X100ZERO, the artifact votage and the current might have chance to improve?
Best Regards,
szszjdb
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Diagnostic mode isn't intended for DMM fine tuning. Only a serious malfunctions can be detected in this mode. So, there is absolutely no need (and you can't) to "improve" these data, because they have no direct influence to DMM performance. These zeros, artifact voltages, currents are only raw datas without applying a calibration constants, corrections etc.
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Hi, Mr. Mickle.T ,
I see what you mean.
Why I was wondering the hardware abnormal is because the unstable reading of the DCV zero. It is keeping changing in span of about 4-8uv in 100mv meter range. It is also leading to the bad noise performance in 100mv range ,where the reading of the last 3 digit jumping from time to time.
I have repaired the damaged front port , covered the case and used the short jumper to calibrate , the DCV zero still performed the same.
Is there any posibility that the issue is causing by the amplifier of the 100mv range? How can I check for it?
I will make more test for DCV zero in 10V range to check the A/D 's noise performance.
Best Regards,
szszjdb
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Hi, Mr. Mickle.T ,
After the test these day, I found the DCV zero of the meter become more stable than before, data as below:
1. DCV ZERO , 10PLC, AZERO ON, N=100, 100mv RANGE, 5 TESTS
1 2 3 4 5
MAX -0.00013 -0.00009 -0.0001 -0.0006 -0.00009
MIN -0.00053 -0.00046 -0.00059 -0.0006 -0.00056
AVG -0.00035 -0.00029 -0.00033 -0.00035 -0.00037
VPP 0.0004 0.00037 0.00049 0.00054 0.00047
? 8.25E-08 8.18E-08 9.52E-08 8.41E-08 8.06E-08
UCL -0.0001 -0.00005 -0.00004 -0.0001 -0.00013
LCL -0.0006 -0.00054 -0.00061 -0.00061 -0.00061
2. EXTERNAL LTZ1000 homebrew REF PCB , 10PLC, AZERO ON, N=100, 10v RANGE, 5 TESTS
1 2 3 4 5
MAX 7.0684339 7.0684347 7.0684342 7.0684347 7.0684352
MIN 7.0684316 7.0684321 7.068432 7.0684324 7.0684329
AVG 7.0684329 7.0684335 7.0684332 7.0684336 7.0684338
VPP 0.0000023 0.0000026 0.0000022 0.0000023 0.0000023
? 4.60E-07 5.91E-07 4.50E-07 4.39E-07 4.98E-07
UCL 7.0684646 7.0684353 7.0684345 7.0684349 7.0684353
LCL 7.0684315 7.0684318 7.0684318 7.0684323 7.0684323
Does the result accecptable?
Many Thanks and Best Regards,
szszjdb
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Well done! You got excellent results.
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Hi, Mr. Mickle.T ,
Thank a lot!
I was wondering if there have some posible modification for the meter to get higher noise or stability performance?
I have found some modification proving to be effective, listing below
1. change the 70k RES R2/R3 from reference PCB to metal foil type.
2. change the relay K001 ,K006,K008 to low EMF type.
How about the replace some OPAMP to the newest highend type in the signal chain to reduce noise performance?
Would you please give some advice on this topic?
Best Regards,
szszjdb
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All modification you listed (and some others) was well descripted on the bbs.38hot.
You can try and then publish the results, that you received, in another thread.
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When looking for points to improve one should first get a good idea of the noise source. There are the input amplifier, the ADC and the reference and reference amplifiers. The ADCs noise also depends on the integration time with the two main parts from general low frequency noise and the second from measuring the residual charge, which gets more and more important for short integration time.
One point where I see a chance would be filtering the reference for the higher frequency (10 s of kHz range) part of the noise. For some reasons many DMMs don't use filtering (or only partial filtering) for this noise contribution. The modulation in the ADC brings back this noise to the near DC range if a small voltage is measured. I don't know, but maybe they did not realize that this higher frequency noise of the reference could matter.
Another obvious noise source are the resistors used for input protection - a super low noise input amplifier is of limited use if there is a 100 K resistor in front.
There is a chance to find better OPs for some places, but changes at the ADC itself are tricky, as fast settling might need an adjustment to the OPs speed. So different OPs would also need changed resistors / caps, which might not be easy.
It looks like the native range of the ADC itself is something like a -1 ... -14 V and the input is initially shifted /divided. This concepts is not really good for very low noise.
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Input protection resistors string is only 4x2.2=8.8 kOms.
The native range of the ADC itself is +-14.5...15V and the input isn't initially shifted /divided.
But there are other big problems, such as no precharge amplifier in the inputs MUX e.t.c. :(
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
My key concern is the short-term stability or the noise performance.
Per your suggestion ,it seems not an easy case to improve the noise performance of my 6581.
So I am planning to change the 70K res of the reference PCB first and left the low EMF relay later when I find them.
All this is for the long-term stability or the temp. drift improvement right now.
Is there any further mods I can try?
Attached is the copied circuit of the reference PCB, FYI.
Best Regards,
szszjdb
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It is not that easy to improve a high grade instrument, especially not without knowing where the weak spots are.
Form the little circuit diagram parts I saw, I would imagine that filtering the reference could be an option. This is not for the 0.01 Hz -10 Hz range that is essentially impossible to filter, but for the 10 kHz range that might be mixed back. At least filtering should not interfere with the rest of the operation.
Looking at the ADC part (photos) I would expect quite some noise from the AD707's. However changing things here would also change the AC response and would thus need more changes.
I don't think there would be much gained from changing the 70 K resistors in the reference part - the LTZ1000 circuit attenuates changes and noise from the resistors quite a lot.
It also depends on what you are looking for: if it is small signals at a small fraction of the range, it would help to have a special input amplifier before the DMM. If you are looking at a signal near full scale the reference gets important and the existing ADC may be good enough.
Factors like gain drift are more set by the resistors at the ADC. These resistors are much more critical than the resistors at the reference.
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Hi,Mr. Kleinstein ,
Thanks for your suggestion.
I would add some cap like C2 near the U2A to form a LPF and C9 on the power rail as attached in another circuit. The 70k Res is benefit for the long-term stability of the reference, researched by some DIYer.
The noise of the LTZ1000 reference board is measured to be 1.2-1.4uv and hard to be improved more .
My main purpose is to evaluate the performance of the voltage/current source , so the performance of the 10V range is key for that.
I had use the meter to test the DIY LTZ1000 board and you can find that the Vpp is 2.2-2.3uv, in the condition of 10PLC, AZERO ON, N=100, 10v RANGE,
1 2 3 4 5
MAX 7.0684339 7.0684347 7.0684342 7.0684347 7.0684352
MIN 7.0684316 7.0684321 7.068432 7.0684324 7.0684329
AVG 7.0684329 7.0684335 7.0684332 7.0684336 7.0684338
VPP 0.0000023 0.0000026 0.0000022 0.0000023 0.0000023
? 4.60E-07 5.91E-07 4.50E-07 4.39E-07 4.98E-07
When changed to 50PLC, the Vpp is 1.1-1.5uv.
1 2 3 4 5
MAX 7.068434 7.0684337 7.0684334 7.0684332 7.0684339
MIN 7.0684327 7.0684322 7.0684321 7.0684321 7.0684325
AVG 7.0684334 7.0684331 7.0684329 7.0684327 7.0684334
VPP 0.0000013 0.0000015 0.0000013 0.0000011 0.0000014
? 2.35E-07 3.18E-07 3.32E-07 3.03E-07 2.35E-07
Both the number is 2-3 times larger than the HP3458 ,which is causing by the higher noise floor of 6581, showed in attached. So I was wondering if can modify somewhere to get improvement.
As your said, it is very difficult to do.
Best Regards,
szszjdb
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There is not much to improve at the LTZ circuit itself. One has to be quite careful, as it uses a feedback loop on the reference that is already a little tricky. So it might oscillate (and this way damage the reference) if the modifications are wrong. I would definitely do a simulation before any change with the reference. The modification might work but I am not so sure it is stable and I am not so sure the noise will actually be lower.
My suggestion would be more at the first amplification stage on the main board. Here it would be just adding a cap at the first OP - so nothing unusual. At least the plan I saw did not have the cap from output to the inverting input I would normally expect. It could be still a simplification and the cap is already there. The improvement would be more when measuring smaller voltages though, but 7 V is still not all the way to full scale.
Anyway I would not expect a magic large improvement from a small change - maybe a little. If it would be so easy the manufacturer would have done it right from the beginning. Though there are sometimes a few point that deserve a :palm:. To get a really better reading it would be more like building a new reference with lower noise, like a dual LTZ1000.
Due to the large integration cap the 6581 is not very low noise at short integration times. So it is not so much comparable to the 3458 - more like the Keithley 2002. So it could be normal to get considerably more noise at the 10 PLC setting compared to the 50 PLC setting.
When measuring a low noise external reference one will see at least the combined noise of the external and internal reference. So with a 2 nd LTZ1000 reference it would be normal to see at least 1.4 times the noise of a single reference. So getting something like at least 1.5-2 µV_pp for 100 consecutive readings is kind of normal. So from the data shown I am more surprised to see so little noise in the 50 PLC case.
Anyway for testing the noise one get less scattering values if one looks at the RMS value instead of the peak to peak values. Even better would be Allan variance or similar.
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Does it means the issue is not so serious and can be fix by the self of external calibration?
How does that work out so cheap?
The answer is very simple ;D
Ah I see!
So this is "only" good prices if you have the knowledge to fix them? I do not....but I have a :-DMM and a :-BROKE and am a bit :scared: so you never know I may get one to have a go at! :box:
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R6581D, R6581T have "good" prices due to lack of huge magical AC board :D
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks for your advice. I got know that the noise performance is hard to be improved by simple mods.
I have not check the DCI performance before and found some stange result when testing today. The DCI zero is not the real 0 and have a large offset, and the number is jumping in the last 3-4 digit when in ua or na range. Data are as below.
range 100na 1ua 10ua 100ua 1ma 10ma 100ma 1000ma
6581 zero 0.8xxx 0.7xxx 0.00065 0.0065 0.1014 0.000614 0.00602 0.0012
6144 output 100na 1ua 10ua 100ua 1ma 10ma 100ma
34401 310 1.14 10.12 100.16 0.99995 9.99935 99.9925
6581 12x.xxxx 985.xxxx 10.01xxxx 100.03xxx 1.00023xx 10.003843 100.01975
As I know , there have not external zero or fullscale calilbration for DCI. Are there any issues upon my data and which component should I check?
The DCI is abnormal before and repaired by somebody and one of the relay has been repalced, as attached.
Best Reagrds,
szszjdb
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DCI zero calibration is performed during the external zero calibration procedure. But if you have a zero/fullscale calibration problems with DCI, then you have the same problems with Ohms too.
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Hi, Mr. Mickle.T?
Thanks for your help.
I just performed the external zero and DCV calibration and left OHM undo because no accuracy 10K res inhand. Is it the reason for the DCI zero and fullscale issues? If do, I will do the external OHM calibration tonight compared to 34401.
For the noisy data output in the DCI test, is there posibility that the 100mv DCV amplifier has problem ? I also feel that the 100mv range DCV performance still have noisy problem. I will confirm it tonight.
Best Regards,
szszjdb
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I just performed the external zero and DCV calibration and left OHM undo because no accuracy 10K res inhand. Is it the reason for the DCI zero and fullscale issues?
How can you check a DCI fullscale with low-end 6144 and 34401A? So I sees only a large DCI zero offsets and these offsets are not related to external OHM calibration. Some of the possibles sources of the leakage current are U503 MAX327 switches (100 nA and 1000 nA ranges), protection transistors Q502-Q503 and MUX hybrid U001 pin 3,4,5.
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Hi, Mr. Mickle.T?
Thanks for your soon reply!
Yes I know that, but just have them inhand. How about use my LTZ1000 with a precision resistor to produce a simply current source to test the noise performance in the lower DCI range ? Just to evaluate ,not calibrate.
How can I test the parts you list? Apply the current in that range and measure the voltage?
Could you give some advice on the detail to test the MUX hybrid U001 pin 3,4,5? What should be the right voltage? That parts is difficult to find replacement. If DCV 10v work fine, does it mean the U001 is posible ok ?
Best Regards,
szszjdb
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It makes sense to short the input for DCV or DCI noise measurement.
MUX hybrid have a complex two-way structure to reduce a stray capacitance and leakage paths. In addition, all of the DCI readings are made in dynamics with auto-zero cycles always ON, i.e. auto-zero mode does not matter. So, it is very difficult to test U001 properly. I'm don't know how.
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Hi, Mr. Mickle.T,
Many thanks!
How about turn off the AZERO and apply the current and test the voltage on MUX hybrid U001 pin 3,4,5 by using 34401 or scope?
Is there any posible that the relay replaced , who causing the zero offset ?
How to test the U503 MAX327 ?
Best Regards,
szszjdb
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Turning AZero off and read the output of the MUX with a 2 nd DMM is possible. It is not so much about reading a current, but more like reading the voltage with a short at the input. One could also check the resistance - just in case there is still a problem for the signal from the input to come through (e.g. relay, MUX, protection ) - just make sure the current is not too high for the mux. A current range could be still used as a second channel towards a zero. It could be also interesting to use a scope to check if there are excessive spikes or other higher frequency signals present.
Another useful test would be to measure the input bias (e.g. use a high value resistor at the input) - here it might be a good idea to do this with AZ active and enabled. As the 100 mV range might not be reliable one could also use a 2 nd meter to measure the current (e.g. change in drop over a 10 M resistor).
One should first get the 100 mV range to work properly before looking at the scaling of the low DCI ranges. So no need to apply a test current yet.
I don't think the changes relay would have much effect. In the current ranges the voltage reading would not go through the relays. If at all dirt on the board (e.g. flux from replacing the relay might be an issue related to the relay.
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As I already said, it's not possible to disable of AZERO in DCI mode.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks for all!
I am back home and sit down before my 6581.
What is the current flow when in DCI mode and any draft about the circuit or the step to check the issue?
I had re-calibrated the external zero and the offset chang a little . Then I connect 34401 to DCI input and use OHM to measure the input resistor and attached the data below.
RANGE 0.1ua 1ua 10ua 100ua 1000ua 10ma 100ma 1000ma
DCI 0.2191na 0.11723na 0.000132 0.00075 0.0075 0.000053 0.00045 -0.0036
34401 1005k 101.7k 10.003k 1.0003k 100.678 10.7 1.719 0.667 0.076(short 34401)
6581 overload 492.1xxxna 9.8758xx 98.377xx 986.44ua 0.986466 0.98672 0.9826
It seems almost right except the res of 1000ma and it should be 0.1ohm ,but measured to be 0.6ohm.
Any further suggestion?
Best Regards,
szszjdb
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The extra measured resistance for the 1 A range is from the fuse and maybe a little from cables and relay.
For finding a problem that still looks like one of the DCV input amplifier these resistance measurements don't help much.
The offsets in the DCI ranges support trouble measuring small voltages.
I would first test the bias current in the 100m V/ 1 V and 10 V DCV ranges.
A next point would than be looking at the input to the ADC / output of the DC amplifier with the scope. There was already an odd curve (looked like ringing for the 7 V reference) for this case before. One might even test this with a AC signal (like 1 kHz square wave) at the input, as the sharp edges could provoke ringing.
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Hi, Mr. Kleinstein ,
Thanks for soon reply!
I remember the DCV is workable and re-test the DCV zero, listed below.
RANGE 100mv 1000mv 10v 100v 1000v
DCV ZERO 0.00029 0.00034 0.0000003 0.000003 0.00004
The DCV zero seems normal in each range. Then I test the linearity and short-term performance from 1-110mv in the 100mv range, comparing with 34401. It is also normal.
34401 6581 34401 6581
1.0009 0.99766 9.9827 9.97756
1.9995 1.99645 19.9596 19.95501
2.9987 2.99503 29.9473 29.94221
3.9957 3.00289 39.9265 39.92107
4.9953 4.99173 49.9162 49.91031
5.9935 5.98961 59.8959 59.88951
6.9925 6.98823 69.8769 69.87031
7.9916 7.98745 79.8674 79.86071
8.9895 8.98544 89.8502 89.84275
9.9886 9.98447 99.8325 99.82467
109.8257 109.81778
So how to test the bias current in DCV ? Which is the test point?
Best Regards,
szszjdb
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For testing the input bias there are two options:
1) Connect a high value resistor (e.g. 10 M) to the input and use the voltage read to calculate the current. If the voltage is very low one might have to take the offset into account. It may take some time (e.g. a minute) for the voltage to settle.
2) Connect a low leakage (e.g. PS or PP) capacitor in the 1-10 nF range and record the drift of the input voltage. This also allows to measure the current at voltages different from zero, by first setting the approximate voltage. This method gets easier if one has a PC to record the data, but it is still possible to read by hand (e.g. 2-4 readings 10 or 30 seconds or so apart. With a small cap one might have to include internal capacitance in the calculated current - though usually no high accuracy is needed. Its more like the order of magnitude that counts as the current can change with temperature and humidity quite a bit. A current below about 50 pA would be good.
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Hi, Mr. Kleinstein and Mr. Mickle.T,
After add the 9.5M res between the DCV port and the reading is 0.384v for 6581's 100mv range and 33mv for 1v range, using a YOKOGAWA 7532 handheld. So the bias current is about 40na on 100mv range and 3.5na on 1V range. Right?
In order to find out what wrong, I open the case and get out the analog PCB to check the detail . Really found an issue that the Q502(2sc3420) is assembled in wrong direction, please refer to the attached pciture. I was so happy when found this, but after re-assembling , The DCI zero offset is still there ,even if ater another external zero calibration. Too upset when haveing none progress after checking for a whole day.
100na 1ua 10ua 100ua 1000ua 10ma 100ma 1000ma
before 0.2191na 0.11723na 0.000132 0.00075 0.0075 0.000053 0.00045 -0.0036
today 0.1737na 0.1021na 0.000055 -0.00016 -0.0005 -0.000057 -0.00045 -0.091
short 0.3413 0.2821 0.000583 0.00477 0.0384 0.000385 0.00201 -0.0008
It's strange that when short the DCI port the DCI zero will enlarge, data as above..
I also noted that the relay K500 is the replaced part and when in 100na and 1000na range ,it will stay in same situation , and change situation when set to 10ua range.
How about the next step? I feel very difficult now.
Best Regards,
szszjdb
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You should not use an external DMM to input current checking. All voltage measurements must be performed by 6581 itself (after the nulling with a shorted inputs).
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Hi, Mr. Mickle.T,
Many thanks!
After add the 9.5M res between the DCV port and the reading is -2.6mv for 6581's 100mv range and 0.5mv for 1v range, readed form 6581. Is that right?
As your advice, Some of the possibles sources of the leakage current are U503 MAX327 switches (100 nA and 1000 nA ranges), protection transistors Q502-Q503 and MUX hybrid U001 pin 3,4,5.
I had checked the Q502/503, then to replace the MAX327 ? It is exactly the bigger zero offset in the 100na and 1000na range.
Is there any posibility the replaced relay K500 have some problem?
How to check the next step?
Best Regards,
szszjdb
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First of all, you must divide the problem into the two parts:
1) a high input leakage current on DCV ranges;
2) a high zero offset on low DCI ranges.
And you can forget about #2 without the solving of #1. The 2.6 mV voltage drop on 9.5 MOhm resistor gives about 0.27 nA input current. This is the one-two order of magnitude higher, than my results (~12 pA with AZERO=ON & PROT=ON & PLC10, ~1-5 pA with AZERO=OFF).
There are not so many parts on the input signal way. The mains are U009 buffer, D003-D004 ULL diodes, U001 MUX, Q102 and Q104 dual-FETs.
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0,27 nA is already much better, but still not good. It might be a good idea to get readings for both the AZ case and the non AZ case, as the AZ mode can add to input bias. Normally one should get a value well below 50 pA, better below 10-20 pA.
Normally there should not be a difference in input current between the 100 mV and 1 V range. The difference could be from the DCV offset problem. One could get away from the DC offset by using the capacitor way to measure the input bias. This method is kind of not sensitive to an offset.
Sometimes the input bias current at a different voltage tells something about the source of trouble.
I don't think the replaced relay is causing the trouble.
I also don't think the max327 is the problem - at least not for the DCV problem. It might have something to do with a problem in the current ranges - but this would be only after the DCV range is really working well.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Many Thanks!
I used to take that the DCV is normally working, as the DCV zero and fullscale seems ok for the moment. Thanks for point out that issue.I will re-test the bias tonight by two method of the res and cap.
Is the signal flow like that DCV port -> U009 ->D003-D004->U001 MUX-> Q102 and Q104 ? If it is, the U009 is in front of all and should be damaged by the surge voltage before. The only way is to replace the U009 and re-check the bias? The others behind U009 should have slightly influence to the bias?
Best Regards,
szszjdb
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U009 isn't in front of all, but can be damaged by the surge voltage too.
You can temporarily disconnect the overvoltage protection components, by desoldering R061, D003 and D004.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
I had test the bias by the res method and get the result of 0.4mv with AZ ON and 0.2mv without AZ in 100mv-10v range. So the bias is 42pa when AZ on and 21pa when off. It is nearlly 4 times larger than your number with AZ ON and 20 times without AZ. Both in 10plc condition. I am using a shorter cable than yestoday, so the reading become smaller.
The cap method is not so stable when I connect the 22nf cap, and the time to charge the cap vary hugely , so I dropped the data.
I am going to disconnect the parts you mentioned.
Updated , the reading is still 0.4mv and 0.2mv with or without AZ when disconnecting the R061 and D003/004.
What can I do in the next step?
Many Thanks and Best Regards,
szszjdb
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21-42 pA are sufficiently small values. The problem is somewhere else, but not in DCV signal path.
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The capacitor method should also work, but it needs a good quality cap, like PP or PS. With a large cap there might be dielectric absorption and it thus needs some soaking the cap before getting useful data. The bias can also change with input voltage - especially the AZ case can be quite different with a voltage applied.
With the input bias so low, there is no need to disconnect the protection.
The bias can be different between different instruments - it can also change with contamination (e.g. flux), humidity and temperature. Also light can cause some bias, especially with some SMT parts. One could test U009 offset, with a short at the input and measure the output of that OP with a 2nd meter. Too much (e.g. > 5-10 mV) of an offset could cause a higher bias.
When doing sensitive measurements it is a good idea to keep the mobile phone away from the meter / circuit - it can cause an upset, especially in some older models.
If everything is OK so far it may be a good idea to do something like noise test with an input shorter in the 100 mV and 10 V range at one speed like 10 PLC.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!
Yes I found the reading is still 0.4mv and 0.2mv with or without AZ when disconnecting the R061 and D003/004, then I recover it.
I use a short jumper to short the 5 port(HI,LOW,HISEN,LOSEN, GUARD) for at least 5 min long and the DCV zero are as below. The data is worse when az off and the AZ OFF MAX is obtained when power on and the reading is running up . Sometime it will drift to around 20uv, but when I turn on AZ, it will return to arround -1uv.
100mv 1v 10v
AZ ON -1uv -1uv -1.1uv
AZ OFF max 19uv 20uv 25uv
AZ OFF normal 3.5uv 3.4uv 4.0uv
The setup of the noise test is also as above, and run the statistics test internal from 100mv to 10v range.
100mv azon 100mv azoff 1v azon 1v azoff 10v azon 10v azoff ,N=100, 10plc ,all in mv
MAX -0.00117 0.00275 -0.00093 0.00317 -0.0000008 0.0000034
MIN -0.00164 0.00198 -0.00188 0.00257 -0.0000029 -0.000001
AVG -0.00145 0.00236 -0.00137 0.00289 -0.0000018 0.0000009
VPP 0.00047 0.00077 0.00095 0.0006 0.0000021 0.0000044
dev 9.63E-08 1.86E-07 2.09E-07 1.35E-07 3.93E-07 1.14E-06
Any further check should I make?
Best Regards,
szszjdb
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I get 10V PLC10 noise std. dev. value 2.8E-07 V. Very close to what you received.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!
It 's can be seen from my data that the Vpp when AZ off is almost twice the number when AZ on. I should note that the DCV zero will be a large number like 50uv when in cold state and will slowly come down to 2-3uv after warming up,all with AZ off.
Is that means the DCV is probably normal working? How I can check in the next step?
Further more, if the DCV is fine, let's look at the DCI zero data I recorded before. I also contacted a friend who give me his data,also listed below.
100na 1ua 10ua 100ua 1000ua 10ma 100ma 1000ma
before 0.2191na 0.11723na 0.000132 0.00075 0.0075 0.000053 0.00045 -0.0036
today 0.1737na 0.1021na 0.000055 -0.00016 -0.0005 -0.000057 -0.00045 -0.091
short 0.3413 0.2821 0.000583 0.00477 0.0384 0.000385 0.00201 -0.0008
friend -0.007x -0.01x +0.0000x +0.000x +0.00x +0.0000xx +0.000xx -0.000x
1. My data is closed to the friend's except the lower range 100na and 1ua. Is that means the DCI issue is only in that 2 range, and the MAX327 or some other parts might cause it? Further information shows that the relay k500 had been replaced before due to DCI measure failure, and it is in charge of the lower 2 range switching. Can we suppose that the K500 relay is abnormal and can not change range before and the meter is input a huge inrush current ,which leading to the potential damage or more leakage of the MXA327 or some other parts?
2. Why the DCI zero data change so obviously in every range when I short the DCI port, comparing to the open the port?
Best Regards,
szszjdb
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This is my data. No thoughts yet.
Surely it's time to draw a schematics diagram.
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The DCV part looks good so far.
The DCI offset is still too high. Has there been an new offset zero after the repair of the DCV input section ?
A schematics (even if only crude) of the DCI section would really help to locate possible faults. Without an schematics it is hard to tell how the MAX327 is used and where the relays are used.
The current section should have an OP to drive the protection element, just like in the DCV front end. This could be one of the first parts to check. Due to the much larger diodes, an offset here would be more critical.
One more test would be, if it makes a difference if the voltage input is shorted or a 9 V signal is applied during a current measurement. It should not have much of an effect, but it would be a test to check the off state of the MUX used for DCV.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!
Yes it is time to analize upon the circuit. I will try to get the draft.
Acturely I had repaired nothing but find the way to perform the external calibration. The DCV and DCI zero is improved after that, especially for the lower range. For example ,the DCI 0.1ma is used to be as 0.07177ma and now is nearlly same with my 34401.
For the further test, I connect the DCV port to 6144 DC source and it is 0.32na when apply 0v, and 0.34na when add +10v, and 0.29na when add -10v. It is 0.29na when left all port open or short the DCV port, and 0.35na when short the DCI port. Both are in 100na range. I must point out that the reading changed when open all the port from 0.1737na ,the data recorded yestoday, to 0.29na, and this might be caused by the drift.
Re-test the DCI zero and attached FYI.
100na 1000na 10ua 100ua 1000ua 10ma 100ma 1000ma
open 0.2752 0.2034 0.000141 -0.00011 0.0069 -0.000052 -0.00032 -0.0124
short 0.3511 0.2941 0.000651 0.00454 0.0405 0.000285 0.00112 -0.0047
delta 0.0759 0.0907 0.00051 0.00465 0.0336 0.000337 0.00144 0.0077
ppm 759 90.7 51 46.5 33.6 33.7 14.4 7.7
delta uv 75.9 9.07 5.1 4.65 3.36 3.37 1.44 0.77
Pls look at the delta uv on shunt , the trend is very clear and the number is become smaller with the DCI range increasing. That is the correct data compared to yestoday's, which might be some mistake. That might imply something?
I had found a occurrence that the DCV zero will be a large number like -50uv when in cold state and will slowly come down to -3uv after warming up for 2 hours and stay there,all with AZ off. After I turn on the AZ, the reading become smaller like around -1uv and then turn off AZ ,it will stay there around -1uv , more like that the AZ on fixed the zero offset from the 1st time it was turned on in this power on cycle. I don't know if it will cause the DCI zero offset issue. Does it fine in the DCV zero offset ?
Best Regards,
szszjdb
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The effect of AZ on the offset in non AZ mode is normal. The AZ mode makes the DMM alternate between measuring zero and the input. The result is the difference. In non AZ mode it still uses a zero measurement - likely the last available.
The DCI mode likely measures the voltage at both sides of the shunt and this way needs the AZ mode to work properly. This would at least explain why one can not turn of AZ in DCI mode.
As far As I understood it so far there was a change in the input protection part, which reduced the input bias.
There is some effect of the input voltage (DCV) on the DCI reading in the lowest range - which is kind of indication leakage at the MUX. I don't know if the observed size is normal, it is only 30 pA, but it looks a little high to me. It's about the order of magnitude as the input bias - so maybe that is the leakage level of the MUX. One might reduce the effect by having a short at the DCV input when doing a very low level current measurement. When left open the DCV input can (and will ) drift due to the bias (that can be a little different when not active) - this would than cause drift or random movements for the DCI readings. If I understand the table from Mickle correct there are separate points to measure the voltage at the shunt chain. Thus it should be the lowest 2 ranges that can be a little sensitive to leakage in the MUX.
One possible source of offset errors in the DCI readings might be due to an internal bias of the MUX+input amplifier when measuring the voltages at the shunt. The values still look a little odd - but there can be some numerical compensation already. So the readings would not directly reflect the ADC readings.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
I have checked the shunt with 34401 and found no isssue with them. The lo side of 0.1R is connected to GND. I hope the mux have none issue as there can not find the replacement.
Any furthter test should I make before de-assembly the PCB?
Best Regards,
szszjdb
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A 6581 DCI schematic diagram is very similar to HP 3458A one.
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Hi, Mr. Mickle.T,
Thanks a lot!
I will try to check it tonight. I took off the pcb last night, but confused with the track as it was multilayer PCB than 2. Many track were under the top or bottom layer. But I am sure the shunt ,900k and 90k res , were connected to MAX327 and others connected to relay. So it is really like 3458, but the FET were replaced by MAX327.
In my case, the MAX327 might have been damaged and have more leakage than normal, leading to zero offset of lowest range in DCI mode . I will find a replacement for it.
BTW, I got a question that where is the boot point connected to in 3458 circuit and what is the purpose? I also saw the same layout on 6581 PCB ,but hard to find the connection.
It is strange that I can not login last night and it note that my account is banned forever. But now is fine.
Best Regards,
szszjdb
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"BOOT" is a designation of equipotential protection (guarding). A guard driver op-amp U107 is located in the input amplifier section.
P.S. I will be very grateful for the photos of the reverse side of the PCB in hi-res ;)
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Mickle T., szszjdb
You guys doing great, thanks for contributions :-+.
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Hi, Mr. Mickle.T,
Many Thanks !
I will take the photo tonight and send it tomorrow,as my account is banned at home.
I will get the new MAX327 and try it tonight.
Does the 6581 use the same way as 3458 to add the acal current source to the shunt and calibrate the fullscale? I had recorded the current data in diagnostic mode, as below:
10ma -9.659214
1ma -965.6122
100ua -96.5745
10ua -9.655528
1000na -968.3756
100na -97.2028
10na -8.504
Does these data caculated by measured voltage on the shunt? If so, the pricision of DCI rely on the current source, right? But how it can make sure the pricision of the current source in the spec. limit?
Best Regards,
szszjdb
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As far I can understand, current shunts and current sources values are calibrated in one ACAL sequence on the base of internal 10 kOhms standard.
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Hi, Mr. Mickle.T,
I have seen the picture you sent before, but really don't understand the principle inside it. Could you give me some giude on it?
I also check my 6581 photo, there only 3 pcs metal seal metal foil res , but both of them are not for the reference standard. You means R212 ,the plastic seal res near the ADC?
Many thanks and Best Regards,
szszjdb
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It takes me too long to translate my explanations into English. But a principles of artefact calibration was perfectly described in the HP Journal 04/1989, dedicated to HP 3458A. R6581 performs the calibration almost the same way.
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Hi, Mr. Mickle.T,
Fully understood the principle. The key is the tranfer ratio ,which might have introduced some small error in the 0.5ppm range.
Many Thanks and Best Regards,
szszjdb
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Hi, Mr. Mickle.T ?
The new 327 is tried and the issue is same. I finally found out that the U010 were reversed assembling.Pls refer to the picture attached. After corrected it, I record the DCI zero data as below:
100na 1000na N=100, 10plc
MAX 0.0551 0.0324
MIN 0.0352 0.0062
AVG 0.0437 0.0212
VPP 0.0199 0.0262
DEV 4.80E-12 5.48E-12
It is improved more but still not near real 0. Does it work normally? Is there any posible that the U010 is damaged by reversing ,which leading to that?
I also checked the R6581 Evolution file, that the U010 is the DCI guarding OP, right? Where is the input and output of that OP? The track is under the top/bottom layer and hard to following.
About the guarding, should I connect the guarding port to the LO port when in testing and how to select in the guarding menu, FLOAT or LOW?
Many Thanks and Best Regards,
szszjdb
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Thanks for the photo of the PCB's back side. Now, I can recheck my schematic diagrams.
R6581 Evolution file was obsolete and have some mistakes :( U010 is ACI-mode signal follower. If you don't have AC RMS board, U010 is absolutely useless.
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Why are they using an AZ OP for AC ? That would be a really crazy choice. Also for a guard, I would not chose an AZ OP. Have you checked if the LTC1150 is really the right OP for this place - maybe the earlier repair attempt not only turned it around, but also used the wrong type.
There is a chance that one OP could be used for AC and as a guard amplifier.
Even if used only for AC, it might still influence the circuit through it's input bias. However Mickles drawing suggests a relay that might separate the input.
With already some odd, ill repair attempts before, maybe look for changed parts.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Many Thanks!
I have checked the U010 before desoldering , no sign of ever been soldered and clean enough. The OP on my board is LTC1150, same with others photo attached. Maybe it is wrong in production line.
I have not tested the output pin 6 on pcb and the U010 ,which reversed, might output a high voltage to the ACI route to U001 , leading to higher leakage when in 100na and 1000na DCI range. If so , I am just wondering how the unit pass the final quality test in factory.
Per the test data for 100na and 1000na range, do you take that the 6581 is working normally? Why is there still have 30-50pa zero offset?
Best Regards,
szszjdb
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DCI specs includes max 40 pA zero offset. So I think, that your 6581 is working normally.
DCI Schematic diagram draft is below. It only needs to correct errors in relays routing.
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I would expect the path for the ACAL current from the ohms source to go the other side of the first relay in the low current path (initially marked as K503).
In that position it does not make sense to Use U010 for a guard. It would be kind of odd if it would have an effect on the low currents. So effect could be accidentally, like a cold solder joint or loose contact somewhere else.
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Sorry for my mistake. U010 is not guard opamp. It is "isolation" follower for the lo-o-o-ong ACI signal path to the AC RMS board.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!
I have removed the IC socket for 327 and the DCI zero reduced to around 20pa , better than before.
I just perform the external DCV calibration base on the LTZ1000 reference, and left the OHM as I have not the standard res. Is there any way to evaluate the linearity of other range of DCV and DCI without the 3458 for reference?
I also change the R2 and R3 to metal foil type and add the C4 47UF for the power rail. It might be useful to the long-term stability.
I also tried the C5 with 22nf, but found some oscillation occured , so removed it.
Best Regards,
szszjdb
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There are few possible test for linearity.
One first check would be for DNL by looking at the histogram. This likely would be running with 1 PLC (maybe a little more, if the resolution is not that good in 1 PLC mode) and the non AZ mode. Despite of drift the non AZ mode might be more suitable, as the AZ mode can hide some possible DNL problems. It helps if the temperature / Environment is relatively s Record the data and calculate the histogram for chunks of data of about 1000 Samples (the best number depends on the noise level). Ideally one would do this not only with a short but also with a few small stable voltage (e.g. in the range of maybe 0-10 mV) - the DNL will not be the same at every voltage, but may show trouble only at a few critical point. So it would be about the quality of the worst cases.
A second possible check for linearity would be to check if the reading from the sum of two voltages is close to the sum of the readings. The simplest case of this is checking the readings with changed polarity. This type of test is more like a spot check so testing a rather limited number of point. So it likely won't show the subtile INL problems at a few critical points, like shown in some graphs for the instrument. This type of test is more like sensitive to a smooth low order nonlinearity, like caused by nonlinear resistors. The INL curves shown for the R6581 look more like some INL due to DA in the integration cap - kind of expected with a large integration cap.
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I need to get one of these sexy 8.5 digit wondermeters, my HP-3478 just doesn't have the pizzazz anymore.
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Current shunts part of 6581 schematic diagrams is fixed now.
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Hi, Mr. Kleinstein and Mr. Mickle.T ,
Thanks a lot!
For the DNL, I haven't got the GPIB cable, so how about use the internal statistic function instead of capture data to PC? It have MAX ,MIN,AVG,MAX-MIN, and STD DEV output. The 6581 has only the
10plc -100plc setting, so 10plc is ok?
How to estimate the result?
I will try the method for INL and report here.
Thanks to Mr. Mickle.T's schematics. Without them , it's hard to fix the issues of my unit.
Best Regards,
szszjdb
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The 6581 has only the 10plc -100plc setting, so 10plc is ok?
Advantest R6581 have an integration time settings in range of 1 us...100 PLC.
By the way, A/D converter have a maximum 10 PLC int. time.
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The histogram method needs the PC interface unless the DMM offers this internally. The min / max, average and so on is not a real substitute.
It is with most linearity tests that one would need an interface to a computer, as quite a few data are involved.
It is only the INL test with adding voltages that could be done with manual reading. From the display. This test needs an isolated short time stable reference and maybe a few switches. In a simple version one might get away with a set of 1.5 V batteries in a holder so that they are untouched from switching the inputs - this could be just a manual multi position switch to choose a meaning full sequence of readings, like
0, U1 , U2 , U1+U2 and maybe extra -U1, - (U1+U2). In addition U1 and U2 might be chosen to a few values (e.g. via a set of jumpers).
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Hi, Mr. Kleinstein and Mr. Mickle.T ,
Thanks a lot!
I had checked the PLC setting,which could be 1PLC, but the the DIGIT is down to 7-1/2. That 's ok ? I have to find the GPIB cable for the DNL test later.
I also tried the battery method for ANL ,and found normal but the reading is slowly decreased. Then I tried using R6144 to output some other voltage as 100mv, 1v and the reading is normal. It might hard to detect the DNL issue as 6581 is pricision enough.
I had an idea that how about use my LTZ1000 board to output 10V and use 10pcs 10K res in seriers to divide the voltage and test the linearity? But it is still hard to test the DCI linearity performance.
Best Regards,
szszjdb
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Testing linearity on a high grade meter is difficult and it takes time. There is a reason they used a JJA to measure the INL curve they show. It still take quite some time to get "all" the readings. The other simpler test with a histogram for DNL and the adding of isolated voltages are considerably slower and can thus only provide some point checks.
The LT1000 board and resistor chain could be used for a linearity test, quite similar to the battery version suggested before: use the string of resistors to get a string of approximately equal low noise references. One could do the U1+U2 -(U1+U2) test on a few points. Alternative one could use the 1 V range to measure the voltage over each resistor and than measure the different sums in the 10 V range.
As the INL is expected rather low, it would likely need more than just one reading. So more like test the single resistor voltages, test the sums and repeat that something like 2 or 3 times to eliminate drift. It also need a careful check on the zero !
DCI linearity is a different field. There is an possible additional effect of the nonlinearity of the shunts - at the sub ppm level one can not assume resistors to be linear per se. Self heating is one effect that can limit the linearity.
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Hi, Mr. Kleinstein,
Many Thanks!
I know that it is difficult to fully evaluate my 6581 without the higher grade instrument. I just want to make sure the meter now is reliable and trustable with its reading,as it has been repaired. I usally found different reading between my 6581 and 34401, so want to find out the simple way to detect which is the correct one.
I will try using the string resistor method later. It 's funny in the way and learn more from you and Mickle T. .Thanks again!
It seems the final solution is to calibrate it with a 3458 and compare it in all range.
Best Regards,
szszjdb
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INL of Advantest R6581 is a rather unpredictable thing. I have some measurement results, received by me, by bbs.38hot members and by Advantest Laboratories Ltd. itself.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks for your picture.
I have tested the INL by the string resistor method and get data as below.
RES VOL 0.9982601 0.9983018 0.9982538 0.9982941 0.9982555 0.9982828 0.9982635 0.9983029 0.9982555 0.9982643
0.9982601 1.9965619 2.9948157 3.9931098 4.9913653 5.9896481 6.9879116 7.9862145 8.98447 9.9827343
6581 0.9982601 1.9965634 2.9948124 3.9931063 4.991357 5.9896427 6.9878998 7.9862089 8.9844558 9.9827393
INL 0 0.07525 -0.11038 -0.08780 -0.16657 -0.09031 -0.16915 -0.07024 -0.15828 0.05017
34401 0.998252 1.99656 2.99481 3.9931 4.99136 5.98963 6.98791 7.98621 8.98447 9.98274
INL -0.81281 -0.09532 -0.19065 -0.24584 -0.10636 -0.30271 -0.02293 -0.05644 0 0.0571
I am using the LM399-10v board output 9.9827343 as input(LTZ1000 has been sent to my friend for calibration) and 10pcs 10K res. string without switch using but only banana jack. Every reading of 6581 is the average of 20 sample.
It can be seen that the INL of 6581 is a little better than 34401 in the 10V range.
I also found the big error between each range as I input 1V and get reading from 1V and 10V range of 6581, comparing with 34401. I had just perform the internal calbration 2 hours before.
6581 34401
1v 0.9998735 0.99987
10v 999.86696 0.999866
err 6.54087E-06 4.00054E-06
Are these data normally with yours?
Best Regards,
szszjdb
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I can't understand how you calculated these INL results :(
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Hi, Mr. Mickle.T ,
Thanks for your help.
Sorry, I just use 6581 data instead of the best fit to calculate the INL. That 's my mistake.
Could you help to comfirm the issue of the error between each range. The A/D has large tranfer error?
6581 34401
1v 0.9998735 0.99987
10v 999.86696 0.999866
err 6.54087E-06 4.00054E-06
Best Regards,
szszjdb
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1. One of the possible error sources - a different zero offset on the 1 and 10 V ranges. DMM must be nulled before each measurement.
2. As you can see, the voltage artifact source, used in the 10->1 V transfer, have a negative polarity. So INL must be checked in the same negative polarity too.
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Hi, Mr. Mickle.T ,
Thanks for your soon replay.
1. You means I must short the test line and null the reading every time when I change the range? If does, is there any way to fix the issues in the hardware ?
2. I will try the negative polarity check.
Further more, I also checked the reading difference in other range and found it exist in most range, data as below.
The error for 100mv-1v is 3ppm and 18ppm for 1ma-10ma range and 37ppm for 10ma-100ma range. I really can't believe it .
It must have some hardware issue that can't be corrected by software, am I right?
100mv-1v 100mv-100mv 1ma-10ma 1ma-1ma 10ma-100ma 10ma-10ma
MAX 99.98701 99.98676 0.99932 999.2757 9.99798 9.997452
MIN 99.98672 99.98618 0.999256 999.2635 9.99755 9.99741
AVG 99.98688 99.98658 0.999289 999.2708 9.99781 9.997437
VPP 0.00029 0.00058 0.000064 0.0122 0.00043 0.000042
DEV 8.16E-08 1.27E-07 1.29E-08 3.74E-07 1.05E-07 1.00E-08
err 3ppm 18ppm 37ppm
Best Regards,
szszjdb
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I wonder if moving this thread to metrology would be good idea? 8)
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Due to the nonlinearity of the ADC and also offset errors the numeric adjustment of the different ranges is not that perfect. This is also reflected in the specs of the DMM. The 10 V range is more accurate for this reason and it needs a really good ADC to make this Autocal mode feasible. Anyway I would have expected better accuracy too.
Especially with the current ranges there can be additional nonlinearity from self heating of the shunts. So uncertainties are expected to be larger with these ranges. Choosing the voltages for the internal ACAL procedure is kind of a compromise between noise and offset problems at low voltage and nonlinarity of the the shunts. Anyway the errors will be higher there.
In theory there could be some improvement by software, but as this it the fixed DMM internal part it's kind of fixed.
For the part of the error that is repeatable (e.g. due to resistor nonlinearity) one might be able to do software correction one the values afterwords. Not very elegant, but an option if really needed. However this requires the errors to be about constant and a reliable measurement of the errors.
Hardware errors like more leakage or internal offsets could also contribute. For this reason the instrument should be well warmed up before doing the ACAL adjustment.
Ideally the INL test should be done for both signs.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
1. I had nulled the reading after changing the range and the issue is same and error is about 6.5ppm. I also checked the DCI zero when shorting the test line and the result is normally around 0.
2. The negative polarity test shows improvement and the error is about 1.3ppm, data as below.
-0.9998667 -0.9998673 0.9998842 0.9998874
-999.86541 -999.86619 999.87772 999.88096
1.29017E-06 1.11015E-06 6.48079E-06 6.44077E-06
My 6581 had been powering up for at least 2 weeks and all calibration are carried out at warm state.
Refer to the spec. attached,the max error for 1v is 2.5ppm and 20ppm for 10ma range and 30ppm for 100ma range. The reading of 1v range must be out the spec. and the one for 10ma and 100ma range is marginal out the spec..
Is there any thing I can further check? How can I improve them?
Further information, I get a message from my friend whose 6581 has the same error with mine , arround 6.5ppm in 1v range. Is it the general issue for 6581?
Best Regards,
szszjdb
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The 3 ppm deviation between ranges is larger than specs. For the direct comparison the short time accuracy would apply and thus the even stricter specs.
One first point to check would be to test if the internal cal is repeatable. This would show if there is a noise problem. Normally this should not be the case, but it's good to check - just in case. Another point of the check is to see if the adjustment changes at all - it might need an explicit call of the right internal cal procedure to take effect. For shorter time scale just the divider to make the 1 V my be used.
For the internal cal, the meter should do a similar measurement than the external test. E.g. measure a test voltage of around 1 V in the 10 V and 1 V range and than calculate the gain ratio. So it is kind of odd to get a different result. I can imagine three possible problems, that could efffect both the DMM internal measurement and the external measurement.
One is a possible offset, that might be caused by leakage currents - so a careful test of the leakage currents might be a good idea. This could be a HW fault. The output resistance of the test source could be important here. For the external test one could measure both a +1 V and -1 V instead of 0 and 1 V. This would reduce the effect of offsets and also noise. It would also be a first test for linearity.
A second point is linearity: the 6581T does not seem to be that good here, and some voltage may be different than others. So one could do the external test with a few more voltages (e.g. +-0.7,+-0.8, +-0.9 , +-1 V). If there is nonlinearity in resistors the test with 0.7 or even less V might give a clue.
Another possible effect could be settling time: the input amplifier may need some time to fully settle - most of the settling will be fast, but there might be a small slow part that can cause trouble. This could cause a slightly (usually < 1 ppm) different gain for different PLC settings. The internal cal is done much faster than the external check. It is a little tricky to test just from the display, unless the DMM offers suitable statistic functions. The Solartron meters seem to have a related kind of problem in it's Az mode - Mickle T has shown this very nice in a different thread.
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Hi, Mr. Kleinstein ,
Thanks for your advice?
1. I had repeated the internal cal and no error display. How to verify if the internal cal take effects?
2. Offset is the DCV zero point? If so, it is ok by now. I also checked the +-1v to +-0.7v and found error between +- reading.Data are as below.
0.9998879 0.8999006 0.7999162 0.6999385
-0.999881 -0.8998955 -0.7999122 -0.6999343
-6.90082E-06 -5.66732E-06 -5.00055E-06 -6.00056E-06
3. The linearity result are as above and the error is nearly the same number.
4. How to check the effect of settling time in detail?
Best Regards,
szszjdb
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An error in the 5 ppm range just from changing sight is really bad. This would be really poor INL. One has to expect not so good INL values in the 1 V range, but these numbers look odd. So maybe there is still a HW fault causing poor linearity, or maybe to much input bias in some ranges.
With a JFET based MUX the JFETs that are turned on may not contribute to leakage current - so there is a slight chance that the input bias could be higher than normal when not reading the DCV input.
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Hi, Mr. Kleinstein ,
Thanks a lot!
How can I test the bias? By connect the 10M res ? I had checked it yestoday and got 0.2mv when AZON and 0.02mv when AZOFF on 10V range. I forgot to test them on 1V and 100mV range and will comfirm it tonight.
Further information,my firend had comfirmed that his 2pcs 6581 also have the same issue in 1V/10V INL ,which is about 5-7ppm, refer to 1V range. And he told me that the error is about 1.5-1.6ppm when in cold state and become larger when in warm state. He use the 732b output 1v for testing.
Best Regards,
szszjdb
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R6581T: preheated during 6 hours, Int CAL, AZERO ON, PROT ON, 100 PLC, LO-G, NULL ON. Voltage source - LTZ1000 10-1-0.1 V
1 V Range polarity reversing errors:
-0.9999918; +0.9999929; 0.9 ppm error
10 V Range polarity reversing errors:
-9.999904; +9.999910; 0.6 ppm error
1V -> 0.1V transfer error:
+0.10000225; +0.1000016; 6.5 ppm error (in 24 h spec)
-0.10000180; -0.1000013; 5 ppm error (in 24 h spec)
10V -> 1V transfer error:
+0.9999949; +0.9999929; 2 ppm error (not in 24 h spec)
-0.9999912; 0.99998995; 1.25 ppm error (in 24 h spec)
100V -> 10V transfer error:
+9.999910; +9.9999082; 0.18 ppm error (in 24 h spec)
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Hi, Mr. Mickle.T,
Thanks for so detail test!
Could you give me some advice on the further check? There has 3pcs 6581 have the same issue with the 10V to 1V transfer error, plus my unit.
Best Regards,
szszjdb
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Hi, Mr. Kleinstein ,
Thanks a lot!
How can I test the bias? By connect the 10M res ? I had checked it yestoday and got 0.2mv when AZON and 0.02mv when AZOFF on 10V range. I forgot to test them on 1V and 100mV range and will comfirm it tonight.
Further information,my firend had comfirmed that his 2pcs 6581 also have the same issue in 1V/10V INL ,which is about 5-7ppm, refer to 1V range. And he told me that the error is about 1.5-1.6ppm when in cold state and become larger when in warm state. He use the 732b output 1v for testing.
Best Regards,
szszjdb
0.2 mV over 10 M would be around 20 pA. This is OK. However there could be still an issue at higher voltage (e.g. to test with capacitor charging).
The other point is that the test in the DCV range does to include gate leakage for the FETs turned on - thus the one for the DCV range, which is the one that is exposed the most and thus the most likely one to get damaged (e.g. from ESD or overvoltage events). It would be really hard to test these FETs in the MUX. It should show up when comparing the lowest current range with the inputs open compared to short. However I am not sure the resolution is sufficient and there might be additional contributions, e.g. from the input protection.
If the problem is due to an offset / bias current the 1 V - 0.1 V transfer should be similar bad, with an even larger error.
Besides offsets, it could also be an INL problem that could cause the 10 V - 1 V transfer to not work that well. From looking at the ADC circuit known so far, the ADC does not looks like it is made for good INL, more like for good stability and in parts for low noise with the old parts. My guess is that DA in the integrating cap could be a major contribution to INL, especially the more complicated irregular shaped part that is difficult to correct for. It depends on the way the ADC works, but usually the rather large integration cap is not a good sign. There is the possibility the cap when getting old will slowly take up humidity and this way the DA goes up. If really bad excess DA should also show up in histogram tests - not with all, but at a few critical points.
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Hi, Mr. Kleinstein ,
Thanks a lot!
1. Yes the FET is hard to test. I had test the DCI in 100na range, data as below. It is not sufficient to find out something strange.
OPEN DCI short DCI short DCV
MAX 0.0271 0.029 0.0319
MIN 0.0191 0.0281 0.0245
AVG 0.0246 0.0286 0.0289
VPP 0.008 0.0009 0.0074
DEV 2.10E-12 2.60E-13 2.00E-12
The 1V -100mv transfer have 3ppm error, just in spec.
N=100, 10plc 100mv-1v RG 100mv-100mv
MAX 99.98701 99.98676
MIN 99.98672 99.98618
AVG 99.98688 99.98658
VPP 0.00029 0.00058
DEV 8.16E-08 1.27E-07
ERR -3.00039E-06
2. The stange is the error is larger in the positive polarity than the negative one, which is almost in the spec. If the cap has problem , why it just contribute to the positive polarity?
-0.9998667 -0.99988 -0.9998673 0.9998842 0.9998874
-999.86541 -0.999867 -999.86619 999.87772 999.88096
1.29017E-06 1.30017E-05 1.11015E-06 6.48079E-06 6.44077E-06
I also finished the 1-10v positive /negative check, data are as below. The most critical area is the 1-3v ,which is beyond 2ppm.
-0.9982572 0.9982602 3.00523E-06
-1.9965605 1.9965682 3.85662E-06
-2.9948251 2.9948311 2.00345E-06
-3.9931183 3.9931236 1.32728E-06
-4.9913767 4.9913802 7.01209E-07
-5.9896593 5.9896629 6.01035E-07
-6.987925 6.9879291 5.86726E-07
-7.986225 7.986221 -5.00863E-07
-8.9844896 8.9844866 -3.33909E-07
-9.9827622 9.9827581 -4.10708E-07
Any further check should I do ?
Best Regards,
szszjdb
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The current zero test (29 pA) seems to be consistent with the bias measured in DCV mode (around 20 pA). The effect of shoring also is small, so likely no problem here.
The turn over test kind of indicates a problem, either with an offset or with INL errors. A few more points towards even smaller voltages (in the 10 V range) could help to distinguish offset and true INL a little better.
One source of nonlinearity are resistors, e.g. due to self heating. This effect should be smooth, mainly an U³ contribution. The main candidates are the resistor at the ADC input and the gain setting resistors in the 1 V range. Self heating takes some time and thus the 1 PLC mode might act different from a true 100 PLC mode. A comparison of 100 PLC mode an averaged 1 or 10 PLC mode might give some clues. However slow settling might have a similar effect - thermal effect can be one part of a slow settling contribution.
From Mickles description the internal cal for the 10 V 1 V step is done in 10 PLC mode. So it would be worth a test at 10 PLC.
A second source for INL is DA in the integration cap. In a multi-slope converter this is a rather odd jagged function with possible hundreds of points going up and down over the range. This is kind of difficult to measure and test, especially without PC connection. One could repeat the turn over test with a few (e.g. 5 points close together, like 1 V, 1.02 V, ...1.1 V). DA caused INL would give a more random up and down, while resistor caused INL would give a smooth curve. Depending on how the converter is made, there may be an additional smooth function INL caused by DA. Here positive and negative direction can be quite different as there is a constant current added at the input of the ADC.
The capacitor can effect different voltage different.
In theory there might be an error if the resistors for the current source change in ratio. I am not sure if and when the DMM checks those and measures them - it should be possible to use measured values, but I don't know if such a measurement is done, and if so when. It could be part of the ACAL procedure or a separate point.
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As in case of HP 3458A, R6581 don't have a true 100 PLC integration time. All of the 20...100 PLC modes are simply averaging of 10 PLC one.
DMM don't measures the ADC current weighting resistors ratio in the ACAL procedure. I have check an every ms of the DCV and DCI/OHMs ACAL timeline :(
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Hi, Mr. Kleinstein and Mr. Mickle.T ,
Thanks a lot!
The transfer error is more like the offset one which is almost 6uv around. Why it is corrected in the negative polarity and left undo in the positive one? I had try both in the 10PLC and 100PLC, the same result got, allway 5-6uv, 6ppm error, very strange!
For the check of the DA in the integration cap, you means to test 5 points close to1V and record the 1v-10v error and check if it is in random number? I will try it.
Is there any posible the U105 work abnormal, as it is been replaced by the former?
Any further advice?
Best Regards,
szszjdb
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A fastest way to check the DA - is a replacement of C206 (SOSHIN NQP 20 nF) to the new MKP one ;)
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It is still possible to have a problem with the DCV amplifier. If you have a suitable meter (the 34401 might work) one could check the input an output of the DCV amplifier (e.g. output might be output of U105) and input could be the input terminals in non AZ mode. The difference should be pretty constant with input voltage.
A changed chip (U105) might at least point to a problem in that area. So it might be worth checking the input amplifier, that seems to be using discrete JFETs for the input and an OP (U105 ?) for the output. A offset adjustment might also help, though with JFETs there is no such simple relation from offset to drift as with BJT based amplifiers.
As there is no real 100 PLC mode (does not make much sense due to 1/f noise of the integrator) - the 10 PLC and 100 PLC mode should give the same readings - it is only the 1 PLC or similar mode that might be off a little, but hard to tell without the computer.
Not checking the exact ratio of the reference currents could be a problem, or at least a kind of odd solution. For me it would be kind of the obvious way to use the ADC in a special mode to measure those ratios to get the exact numbers. The first ones might need to be relatively accurate - the small one likely don't matter that much. It might still be something only done at a special factory cal or similar.
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Hi, Mr. Kleinstein and Mr. Mickle.T ,
Thanks a lot!
I had try another 3 type cap inhand as attached , and the original is the best ,which has the minimal error.
22NF CBB 22NF mica 20NF mica SOSHIN 19.6n CL 20.1N
999.84399 999.85551 999.8478 999.8682 999.85
0.9998821 0.9998825 0.9998799 0.9998752 0.99988
-3.81159E-05 -2.69932E-05 -3.21039E-05 -7.00087E-06 -3.00036E-05
What is the substitution type for the SOSHIN ,I will find it later.
From the data above , is there still any issue with the cap?
I had test the U105 with 34401, but the output is square wave, so can got the pricision result.
Any further advice?
Many Thanks and Best Regards,
szszjdb
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In my measurements R6581T Input Amplifier shows a very little INL (about 0.1 ppm, InpAmp.png), so the main problem is in ADC.
I did not even expect such a strong DA influence :o SOSHIN NQP have the same polypropylene dielectric as CBB.
By the way, at slow integration times (>200 uS and up to 100 PLC) both of the integrator capacitors C206 and C210 are connected in parallel. If C210 have a large DA, it is possible to temporarily cut it and looks to INL changes.
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Hi, Mr. Mickle.T ,
Thanks a lot!
1. I measured the data as below. It has very big error than yours. The error is calculated from in to adin. I am using 34401 in 1Gohm mode and the string res to divide lm399-10v to 1-10v for input.
You can see the error is become bigger and bigger when the voltage decreased. Is there any posible the mux or the input amp. have problem?
1v-10v 2v-10v 3v-10v 4v-10v 5v-10v 6v-10v 7v-10v 8v-10v 9v-10v 10v-10v
in 0.998259 1.99658 2.99483 3.99311 4.99138 5.98966 6.98789 7.98621 8.98446 9.98273
disp 0.9982827 1.9965798 2.9948377 3.9931279 4.991386 5.9896655 6.9879287 7.9862213 8.9844758 9.9827379
u105 p6 1.00518 2.00552 3.0058 4.00611 5.00635 6.00662 7.00689 8.00721 9.00751 10.00785
adin 1.000184 1.99848 2.99674 3.99503 4.99328 5.99156 6.98982 7.98811 8.98638 9.98464
err -0.00192 -0.00095 -0.00063 -0.00048 -0.00038 -0.00031 -0.00027 -0.00023 -0.00021 -0.00019
1v-1v 100mv-1v 100mv-100mv
in 0.998254 99.9834 99.9695
disp 0.9982582 99.98455 99.9859
u105 p6 10.02991 1.024366 10.21227
adin 10.00671 1.01938 10.18879
err -0.00241 -0.0191 -0.01882
2. You means to cut C206? If does, it will report A/D check error. There have another cap c208(33n) and c209(1500p) and should I check it?
Many Thanks and Best Regards,
szszjdb
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I means to cut C210. But I was forget about a power-on selftesting :-[
C208 and C209 - are part of ADC zero offset correction scheme (C209 - for the short int. time, C209+C208 - for long one).
Inp Amp linearity (offset) can be measured in this way:
-
That changing the capacitor has an effect on INL somewhat indicates that the cap might be part of the problem, even though the other caps are worse than the old ones.
Mica and polyester (Mylar) caps are known to have relatively poor DA performance. So it is not such a surprise to see the large errors here. PP caps are expected to have DA of about 1/20 of mylar caps.
One possible problem with DA is that humidity inside the cap can increase DA - so not all caps with the nominal same dielectric may be the same. Also looking at C210 might be a good idea - so maybe do an exchange here too. Testing without C206 might not pass self test. If 210 is much smaller it will not have that much of an effect anyway.
The square wave at the output of U105 is likely due to the AZ mode still active. As the amplifier is working U105 is not broken - it would be odd to have a defect to cause poor INL but still have the amplifier kind of working at all. It is more like having the JFETs drifted so that the symmetry is not that perfect anymore. Normally the amplifier should not contribute to INL, but a broken (e.g. bootstrapping for the JFETs not working well) /largely unadjusted amplifier could.
For the INL test with the resistor string, one might have to look at the source impedance. The missing pre-charge circuit could cause some effect of capacitance (e.g. cable length) at the input. Not sure how big the effect is, but some ADCs with internal S&H have similar issues.
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Hi, Mr. Mickle.T and Mr.Kleinstein ,
Thanks a lot!
1. I tried to cut off the c210, it report a/d check error when powering up. I have to find the replacement 10 days later as the long Chinese New Year vacation.
2. Re test as Mickle's advice, data are as below, all in mv. It seems not so bad, but per the test I made last time, the data at the 1v point is so bad. Does it mean taht the MUX have problem?
1v-10v 2v-10v 3v-10v 4v-10v 5v-10v 6v-10v 7v-10v 8v-10v 9v-10v 10v-10v
-2.012 -2.005 -1.998 -1.998 -1.985 -1.964 -1.97 -1.981 -1.973 -1.968
3. I don't know what is the function of U105 and just found it has been replaced. The PIN voltage seem ok and how could I test it?
Best Regards,
szszjdb
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I don't know how the DC amplifier exactly works, but chances are it will be similar to that in the 3458. So use a dual JFET for the input with some kind of bootstrapping (needed to get any reasonable linearity) and than an OP (likely U105) to amplify the output of the FET stage to the output.
Anyway taking the ADC input (should be a test-point of some kind) as the output of the DC amplifier.
AS the DC amplifiers works for most of the part, a very much doubt U105 would cause such a problem. So I don't think there is much tests needed. If at all it would be a test of the DC amplifier as a whole system, not just U105. It is really more pointing towards the ADC itself.
In the ADC it could be DA from one of the caps or it could also be the ratio of resistors for the rundown. Both could cause INL problems.
-
I suppose that 6581 ADC can calibrate the ratio of resistors "on the fly" on a each measurement.
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Hi, Mr. Mickle.T and Mr.Kleinstein ,
Thanks a lot!
1. I re-check the input amp. and move the 1st test point to the HI port and the 2nd is still the ADIN. I also test the 1V and 100mv range and the data are as below. It is clear that there has a negative offset about -1.938mv and will be amplified by 10/100 when in 1V/100mV range. Does it the normal one?
10v-0v 10v-1v 10v-2v 10v-3v 10v-4v 10v-5v 10v-6v 10v-7v 10v-8v 10v-9v 10v-10v
Q102-adin -2.012 -2.005 -1.998 -1.998 -1.985 -1.964 -1.97 -1.981 -1.973 -1.968
HI-adin -1.938 -1.938 -1.935 -1.936 -1.934 -1.933 -1.933 -1.933 -1.933 -1.929 -1.927
1v-0v 1v-0.1v 1v-0.2v 1v-0.3v 1v-0.4v 1v-0.5v 1v-0.6v 1v-0.7v 1v-0.8v 1v-0.9v 1v-1v
HI-adin -19.032 -0.92026 -1.82012 -2.72027 -3.62039 -4.52055 -5.42167 -6.32193 -7.22223 -8.12258 -9.02294
0.1v-0mv 0.1v-10mv 0.1v-20mv 0.1v-30mv 0.1v-40mv 0.1v-50mv 0.1v-60mv 0.1v-70mv 0.1v-80mv 0.1v-90mv 0.1v-100mv
HI-adin -0.19045 -1.17965 -2.16944 -3.15957 -4.14965 -5.13844 -6.1287 -7.11876 -8.10892 -9.09815 -10.08851
2. I had desoldered the C210 and the INL is down to 10ppm when I assembly it back. And I also exchange the C210 and C209 and found no improvement. Now the INL is about 12.6ppm, data as below. Is the C210 damaged by the soldering?
solder c210
998.24955
0.9982622
-1.2672E-05
3. Further more ,I replaced the U105 from lt1220 to the OP27 , the INL (10v-1v transfer)result is the same.
Any further thing I can check ?
Best Regards,
szszjdb
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1. 1V and 0.1 V range data are useless. Only a 1:1 mode of the input amplifier is make sense for INL measurement.
2 mV offset is normal for non-chopper amp. with FETs inputs.
2. I don't think C210 is damaged. Did you nulls the readings of the DMM just before measurements at both of the ranges?
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Hi, Mr. Mickle.T and Mr.Kleinstein ,
Thanks a lot!
I did not null the reading as when I short the input line and the reading is steady in the uv digit both in 10V and 1V range, so I just left to do. The 0.1uv digit is not so steady ,so I am not care about it.
I had performed the external and internal calibration each time I change the cap and I found the INL is nearlly the same with the 4 type cap I had tried if I do not calibrate again.
I got LTC1052, LT1001 and OP27 in hand and I just try the last 2, the result is almost same.
Any further test, please advise!
Best Regards,
szszjdb
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Even though used in the input amplifier, U105 will not effect the INL. Chances are high the amplifier is OK. I might be important to get the original speed of the LT1220, as this can effect the settling time.
The about 2 mV of offset is not a problem. However the difference does not look that constant. It might still not be a problem if this is just due to slow drift. The second series looks better - the contact at the fet might have increased the drift due to a thermal disturbance.
So I don't think there is a problem with the amplifier.
I don't think the DMM will measure the resistor ratios on the fly: I would expect this to take some time to get reasonable accurate numbers - so it would be more like a few seconds maybe 10 ms at best to get good enough ratios. There might be a slow adjustment, somehow judging from the data, but also this can be tricky and a direct measurement would be the more obvious way. So I would more like expect a measurement during self test on turn on, or during calibration. Another option could be accurate resistors (and thus simple math and not measurement) or a measurement only at the factory - the resistors may be stable enough that resistor drift is not expected to become a problem.
There might be some effect of soldering on the caps, though I don't think they will be broken. Parts of the integrator could also be sensitive to capacitive coupling - so things like bending a cap to the side or having a part closer to the board might have a small effect.
Another possible source of error for the 10 V to 1 V scaling could be the resistors for the x 10 gain. Self heating could effect that gain and could thus give a different values for the slow readings used when doing the manual test compared to the fast test during ACAL.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
I had made a mistake that I want to see the performance of LTC1052 and I replace the U105 with it, but got the ZERO checking error when powering on and smell something is burning . When I replaced the LT1220 back in U105, it recovered but the AUTO RANGE function failed. Maybe the LTC1052 is damaged as the max power rail is 18V and now applied 30V. The INL issue is still same, so the input amplifier is ok?
Which is the range comparator? Please give me some advice!
Updated, the R155 is burned to 750ohm, when replaced , the auto range is working now.
Back to the 10V -1V INL issue. What can I do in the next step?
Best Reagrds,
szszjdb
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U105 have a 27 V p-p supply voltage. LTC1052 have a absolute maximum rating of 18 V.
There are no range comparator in R6581T.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!
Updated, the R155 is burned to 750ohm, when replaced , the auto range is working now. Now the V+ is 13.5v and V- is 14.3v for U105.
Back to the 10V -1V INL issue. Now it is 13uv or 13ppm, larger than when I start to check for it, where it is just 6-7ppm.
What can I do in the next step?
I also note that it drift more 10-15uv when set to AZ off. Is there any posible issue with the input amplifier?
Best Reagrds,
szszjdb
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It would be strange if the disabling of AZERO did not lead to an increase in drift :)
ADCMT have a very l-o-o-o-ng DMM production history. I believe that it's time to stop the "torture" of the multimeter and start searching for technical information about it: patents, ADC algorithms, science papers, manuals e.t.c. Further progress is almost impossible without a detailed understanding of how it works.
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Hi, Mr. Mickle.T,
Thanks for your kindly reminding.
It's my first high grade DMM and I am new in the area. Learning more from you and Mr. Kleinstein when starting repairing the unit.
Thanks Indeed!
Best Regards,
szszjdb
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I did a quick experiment. Changing a one of run-down current sources (via a parallel resistor) immediately gives an offset and fullscale errors. These errors are resets after the next autozero cycle. But I'm don't know how about changes in linearity.
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I am currently experimenting with a self build multislope design and with this found that coupling from the comparator / slope amplifier towards the reference current sources can cause quite some trouble at some special voltages (near the center of the range where PWM during runup is at 50%). So shielding in the ADC region (both around the comparator) and separate around the major current source(s) might have an influence in linearity.
On the other side I found that DA might not have that much of an influence as I thought, though this might be a special feature of my design (with some waiting time).
The effect of the extra resistor an INL / DNL would tell it there is a kind of adjustment cycle that would measure the resistor values. The most obvious error should be DNL in the form of missing / overlapping codes, that might be visible on a slow smooth slope (e.g. capacitor discharge).
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks for all.
I had made some test these day and comfirm the INL issue as below.
1. For positive / negative check, the error reach 7-10ppm when 1v input of 10V range. I have tried 2 method of input and one is using the r6144 source and the other using the string resistor divider. The result is similar as attached.
2. For transfer test , the negative one have smaller error than the positive and almost in the spec except the 10V-1V transfer at 0.1v input. Also attached.
3. I am planning to find the replacement part for C206/C210 and to try for it .
4. I have hear from my friend that his 2 pcs 6581 and 1pcs 7480 also have the tranfer issue and reach 7-8ppm of 10v-1v transfer at 1v input , just like my 6581 before repairing(now is 12ppm after repairing) . That is to say the issue is not a occasional one. I hope to find out the solution.
Would like to have your advice.
Thanks and Best Regards,
szszjdb
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Everything indicates that the R6581T and 7480T devices are much less accurate (and cheaper) than their full metrological versions :-\
I do not know whether it will be useful or not. Below I have cited several documents and translated drawings from our forthcoming publication on the study of Advantest multimeters.
Eiichi YADA - the one who developed the multi-slope analog-to-digital converter used in the Takeda Riken (and then Advantest and ADCMT) top multimeters:
“High Speed A/D Converter With Variable Integrating Time”, by Yada, Honjoand Hirose, IEEE, Catalog No. 86CH2271~5, 17 Jul. 1986, pp. 144-147.
US4559521 Calibration of multi-slope ADC (Takeda Riken,1985) (https://drive.google.com/open?id=13hJbbiu5WcX6iRaKId-rt8bcxM8fmUb8)
US4574271 Multi-slope ADC (Takeda Riken,1986) (https://drive.google.com/open?id=1YXi8LvxRC0xSP40Aw_u9tIeAgMJyPDMM)
Application of the AC Josephson-Effect for Precise Measurement (2000) (https://drive.google.com/open?id=1OaizrWFKoDXLvYzZNCGbK6eJorf8y812)
Precise Measurement of the Accuracy of 24 bit ADC by AC Josephson effect (https://drive.google.com/open?id=1RHwXGbEKkrCL7jlqMCzAfk-ex-EgiyW0)
Precise Null Balancing Technique for 10-V JJ Array Voltage Standard System (https://drive.google.com/open?id=10ZBCFWVzYUgBfBhX_T9A5PyLuYCmg8eH)
Advantest R6871E:
(http://storage7.static.itmages.ru/i/18/0217/s_1518898331_3703061_1022483c28.jpg) (https://itmages.ru/image/view/6484452/1022483c) (http://storage6.static.itmages.ru/i/18/0217/s_1518898329_2379686_3cad1fec89.png) (https://itmages.ru/image/view/6484451/3cad1fec) (http://storage5.static.itmages.ru/i/18/0217/s_1518898329_9450175_4b82469b7f.png) (https://itmages.ru/image/view/6484450/4b82469b) (http://storage5.static.itmages.ru/i/18/0217/s_1518898329_8982202_87f2c6db05.png) (https://itmages.ru/image/view/6484453/87f2c6db) (http://storage7.static.itmages.ru/i/18/0217/s_1518898331_2865586_a2c6e3aa07.png) (https://itmages.ru/image/view/6484454/a2c6e3aa)
Integrators waveform: https://drive.google.com/file/d/136GaTFkkmIdEB0bY2-u5BOY8N9hyCwK-/view?usp=sharing (https://drive.google.com/file/d/136GaTFkkmIdEB0bY2-u5BOY8N9hyCwK-/view?usp=sharing)
Advantest R6581:
(http://storage1.static.itmages.ru/i/18/0217/s_1518899154_1706760_38ce1cb1eb.gif) (https://itmages.ru/image/view/6484464/38ce1cb1) (http://storage1.static.itmages.ru/i/18/0217/s_1518899154_6594332_e6ccaf33d1.gif) (https://itmages.ru/image/view/6484465/e6ccaf33) (http://storage3.static.itmages.ru/i/18/0217/s_1518899645_3687752_fb34d81e02.png) (https://itmages.ru/image/view/6484484/fb34d81e) (http://storage4.static.itmages.ru/i/18/0217/s_1518899645_8123652_50eef58442.png) (https://itmages.ru/image/view/6484485/50eef584) (http://storage5.static.itmages.ru/i/18/0217/s_1518899646_7483050_f7e31f0d75.png) (https://itmages.ru/image/view/6484487/f7e31f0d)
Integrators waveform: https://drive.google.com/file/d/1FrEv-MCtTosHj2QvtJ8Jneyz27bW14Y8/view?usp=sharing (https://drive.google.com/file/d/1FrEv-MCtTosHj2QvtJ8Jneyz27bW14Y8/view?usp=sharing)
Runtime A/D selftest and calibration sequence:
(http://storage8.static.itmages.ru/i/18/0217/s_1518899698_1552182_005e51a96d.png) (https://itmages.ru/image/view/6484490/005e51a9) (http://storage9.static.itmages.ru/i/18/0217/s_1518899698_3606387_0f868cd163.png) (https://itmages.ru/image/view/6484492/0f868cd1)(http://storage8.static.itmages.ru/i/18/0217/s_1518899698_3522119_e7370ab3a1.png) (https://itmages.ru/image/view/6484491/e7370ab3) (http://storage1.static.itmages.ru/i/18/0217/s_1518899699_2312025_83fdb511fc.png) (https://itmages.ru/image/view/6484494/83fdb511) (http://storage1.static.itmages.ru/i/18/0217/s_1518899699_2865774_9464df878d.png) (https://itmages.ru/image/view/6484493/9464df87)
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Hi, Mr. Mickle.T ?
Many Thanks for your so detail information!
You means the 6581 is similar to 6871. That's great as the document of 6871 is more easy to find to learn from it.
I will try to test it with the scope.
Best Regards,
szszjdb
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
I had tried the COG(NPO) ceramic cap (5 pcs 0.1uf in serial ) for C206, found nearlly the same INL performance with the original SHOSIN one, which is around 10-11ppm both in the positive 10V-1V tranfer test and 1V positive-negative test.
It seems that the INL error is not causing by the INT cap.
Best Regards,
szszjdb
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Hi, Mr. Mickle.T,
I tested the INT output of the A/D and found something strange that the waveform is different in negative and positive Vin, attached FYI. It can be seen that only single-slope used in positive voltage input and multi-slope when negative input. So how can it keep the symmetry when just changing the sign of input?
I also checked the waveform of the 5 a/d check condition and there are all exactly like you post both in timing and amplitude. So can I say the A/D is almost fine working?
Many Thanks and Best Regards,
szszjdb
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The waveforms look a little like the run-up phase only. The positive and negative side are a little asymmetric, as the input current source to the integrator can only be one sign. However there is no principle difference: the voltages are just rather high and the run-up patterns are thus already rather close to the limits. The waveforms should much more similar when at a small voltage.
The A/D check might not be very stringent. So it might not cause an errors if there is a small error in the current ratios, that could already cause a noticeable error. I am not sure if that AD check is just checking the rations or actually measuring the ratios and the DMM uses the measured ratios instead of the nominal rations. I am afraid the DMM will use the nominal ratios, as the simple dual slope type check might no give a sufficient accurate reading of the current ratios: there is extra charge injection that is included and thus an accurate measurement would likely need something like a repeated cycle with different lengths.
The higher grade version 6581E seems to use an accurate measurement and than correction via extra hardware . So they seem to have passed on a possible correction via software :-//.
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szszjdb, have you a plcc44 EPROM programmer to dump the old flash and burn the new one? 8)
https://www.eevblog.com/forum/repair/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1355028/#msg1355028 (https://www.eevblog.com/forum/repair/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1355028/#msg1355028)
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!
I tested the INT waveform again and can not find the round down timing in it, attached FYI. I am testing with +1v input.
I haven't got programmer in hand but I can try to borrow one. I had checked the EEPROM code that it is the version for production in 1998, but my DMM is made on 2000. Can it works?
Best Regards,
szszjdb
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Run-down is here: ;)
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks for pointed out my misunderstanding about the INT waveform. It is a little different from the 6871's which have not the negative rundown period. It's really a clever and fast method to reach the high precision. Could you mind me the detail of the whole timing when measuring like +10V/-10V. How are they arrange the 6 Iref source work with the Ix?
I had checked the download EEPROM code that the version is 004246-A02 and 004245-A02 , the same with my DMM, so it seems no need to update ?
For the 10v-1v transfer issues I was focusing on , I think it is in the front DC amplifier. Please look at the data I recorded as attached. It is tested between the HI port to ADIN using 34401 in 10Gohm mode. The error between the 10v and 1v input have reached 11uv, that is exactly the error when in 10v-1v transfer test. As your document about the calibration, it show that there have only the fullscale and zero point to be calibrated . For 10V range, it only calibrated the zero and -10v point and left the +10v undo, so it can't fixed the error for 0-10v input introduced by the DC AMP, right?
Would you please help to confirm the test with your 6581?
Best Regards,
szszjdb
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The difference measured over the input amplifier can include quite some drift, that is in normal operation corrected be the auto zero mode. In addition the difference seems to be a more more linear function of the voltage - this would only lead to a gain factor slightly lower than 1, but no errors as the same gain factor would be used in calibration. Still the 11 µV difference looks rather high to me, as this would be an open look gain of only about 1 million - not more than some of the better OPs. Depending on where exactly the ADin test-point is, it might include some track resistance, as the ADC has a rather low input impedance. I am still not that convinced that the amplifier is the problem.
The rundown phase seems to be rather long (around 2 ms) . With so many rundown slopes I had expected a faster rundown.
Aus the manual test to check the 10 V and 1 V gain ratio is rather close to the measurement done during the automatic calibration, my suspicion would go towards what is different: The manual check is rather slow, reading 0 V and 1 V in the 1 V and 10 V ranges for quite some time each. The ACAL mode seems to repeat fast fast sequence with 0 and 1 V in both ranges. So there is a slight chance that the slow part of DA might cause some errors in this case. To test this one would need the computer interface and look at something like signal steps, going from full scale (e.g. 10 V) to 0 V and record a few samples each. It might need a few repeats and averaging to make the DA effect visible, especially during the 0 V reading after reading 10 V.
Unless there is a correction factor in software, I am afraid there is not much one can do about it. One might have to live with a certain correction factor for the 1 V range. However that factor might also be temperature dependent as DA gets faster with higher temperature.
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Hi, Mr. Kleinstein ,
Thanks a lot!
It can clearly viewed the drift when apply a voltage or just short the input port. It will take about 10s to settle down from 3uv to around 1 uv when shorting the input. And this zero number is almost the same in the 100mv-10v range. When in calibrating, each step will take 200ms ,but it will repeat for at least 5-10 times .
I also check the front amplifier and find the U106(marked with TO72, from TI) with strange voltage, attached as below. I can not find such part number in TI's website. What is the part? OP? The U107 looks good.
Best Regards,
szszjdb
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The time it takes to reach zero could be a hint towards the problem with the 10 V - 1 V step. Though with manual reading you might miss the very first readings. Besides settling of the input amplifier it could be DA in the integrating cap of the ADC to cause such trouble. Have you done the test in AZ mode ?
The AZ mode could also contribute to settling time - so a more stringent test would be repeated readings in non AZ mode, but this is difficult without PC connection.
My guess for U106 would be Tl072 instead of TO72.
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U106 TL072 opamps are part of current sources for Q102 and Q104 dual FETs input stages.
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Hi, Mr. Kleinstein and Mr. Mickle.T ,
Thanks a lot!
I tested all in AZ mode as the drift will be stable. I will find a GPIB cable later.
By now, I had tried polypropylene(cbb) and polystyrene film capacitor together with the COG ceramic capacitor. The best is the original one and the COG ceramic capacitor ,which have the 11-12uv transfer error for 10v-1v . I had also ordered the new SOSHIN cap and am waiting for it.
As the input MUX and the DC amplifier are in front of all ,so it is more easy to be damaged by surge voltage. I am still in doubt for it. So,Mr. Mickle.T, would you please help to test the HI port to ADIN error?
I had found another strange thing about the Q102(small one in the picture) in DC AMP , that there has voltage detected on the can of it, but can't find with Q104. Does the Q102 been potentially breakdown, as the substrates should be isolated with the can? I had checked the mark on the can and it is 0401 F00300, which can not find any information on the Google. What should be the substitute, also the 2n5912?
I had tried to draw the schematics for the DC AMP. but falled, as many track was inside the inner layer. What is the DC bias check point for the AMP?
Best Regards,
szszjdb
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The error between the 10v and 1v input have reached 11uv, that is exactly the error when in 10v-1v transfer test.
These 11 uV isn't nonlinearity.
ADC input resistance is 20 kOhm. 10 V/20 kOhm = 0.5 mA. Copper trace length is about 50 mm. It's have a resistance about 0.025 Ohms. So, 0.5 mA * 0.025 Ohm = 12 uV.
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Some FETs have the case connected to the FET, sometimes even to the gate (e.g. 2N4392). It's possible to have a not so reliable connection to the substrate, but this does not matter, unless there is a lot of capacitive coupled signal. So I really don't think there is a problem with the amplifier.
My best guess is DA of the integrating cap causing a kind of after effect that upsets the gain adjustment procedure. Much of this could be a limitation of the instrument, but some of it might be from aging of the capacitor (e.g. humidity getting into the cap and causing more DA). With a fast sequence (via the PC interface) one should be able to see this effect. Much of the effect of DA from the cap can be linear and more of a kind of settling problem. From the plans Mickle provided I would expect quite some DA effect in this meter, as the runup phase uses slow modulation and not extra compensation for the DC level. So even with a better capacitor settling will take some time and the 10 V / 1 V step will thus be systematically off - just a little odd that there is no software correction for this.
The general nonlinearity could be due to the rundown resistors drifting a bit. With the computer interface one might be able to see this as peaks in the DNL error measured from a slow slope. However this would be a rather slow and difficult test !. The earlier error message might be an indication in this direction - it could got better now with the meter used a little more. Another contribution to nonlinearity is self heating of the resistors - the ADC uses a rather high input current and for this reason quite some self heating in the resistors. Aging could have effected the TC and thus INL due to self heating.
I think one has to accept that this meter is not that close to perfect and accuracy has it's limits.
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!
I had added a line on the back of the PCB to reduce the res. of the track , but seems no obviously improvement by checking the data.
Could you help to identify some of the part from DC amplifier ,like Q102,Q104,U103,U104,U105 ,U102 and U101. Which are for the pricision channel? I am still trying to drawing the schematic for reference. It's not like the one in 6871 or 3458.
About the transfer error and positive-negative check error , I am not expect more than the specification. Most of the 6581 might keep the spec. limit when first in using. But as your mentioned , the design are more sensitive to the component aging or changes by some surge events. Some of them are of still accuracy enough like Mickle's and some are bad like mine. What I try hard for is to find out the most sensitive one and replace them with the new one. But I know maybe I can't find out the solution even with your help ,because it is too complex or can't find the replacement parts like the MUX or the JFET in DC amp. The 6581 is still a reliable and easy-to-use tool when debug in the 8.5 digit world., despite the issue we found.
I agree that the cap might be the sensitive one to aging. So I had tried the original SOSHIN cap together with the COG ceramic cap , which are the best two in my testing, and got some data as attached.The MAX error is around 10uv at 1v input of 10v range and nearly no big change with the original and the ceramic one. It is very interesting that the 1v range perform much better than the 10v range, why? I will try the new cap like the one using in 7480, which was producted recent years by SOSHIN, and report.
For the rundown resistor , it is the ceramic film type and packaged in one chip. The temp. coefficient will be better except the truth-value. I had checked both the external and internal calibration, it seems no timing for the directly resistor calibration. Maybe they do it by the indirect way like the voltage calibration? It 's unlikely not to calibrate the res. as the aging of the resistor maybe 10-20ppm/year.
I remembered that Mickle have given me one picture before ,which are the measured zero voltage by the ADC in the diagnostic mode. You can see that the X10zero and x100zero of mine are much bigger than the others. Are these the hint for debug?
Many thanks to your help these day!
Best Regards,
szszjdb
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The turn over error in the 10 V range looks like a problem with the zero or offset, as the errors gets much larger with the small voltages. I am not sure how the zero is measured and used in the calculations. In principle there is a separate offset for the amplifier and the ADC itself. The ADC has a zero function, but this might no be perfect. If the same zero point is used for the 1 V and 10 V ranges this might explain some of the differences. Chances are that zero reading is handled better in the 1 V range as it is more important.
The resistors for rundown do not have to be so super accurate. It is only the ratio of the very first that should be relatively good, the smaller the current, the less important there contribution will become. So a few 10s of ppm drift would not be such a problem, though it could sum up over years. I would normally expect some kind of measurement for the resistors, but so far there only seems to be a likely rather crude check to find gross errors. If the timing for the fastest part is relatively good, the smaller current will only provide a small fraction, especially in the 10 PLC and longer mode. With something like a 0.2 µs timing resolution it would be only 10 ppm of the full range the next resistor would contribute at 1 PLC. So something like 0.1 % accuracy would be good enough to not cause something like missing codes at 8 digit resolution. The measured accuracy level might even allow for larger errors. For the even finer steps that are handled by the ceramic network they can even get away with 1 % resistors. The critical step would be between the two separate current sources. From this point of view I can't understand the complicated correction mechanism for the 6581E - it is more like overkill to avoid a 0.1 % resistor.
It is likely possible to get a good measurement of the resistor ratio - however the ADC check as shown might no be good enough, as it does not include charge injection. However I have the feeling they preferred to use accurate resistors over extra math in the µC. This would not be my choice, but this is an old design (less software more HW) and there are quite a few odd points that I don't understand. So the more I learn about this meter, the less I like the design. However other meters have bad design decisions too, up to the point of :palm:.
Mickle showed a crude plan for the amplifier - that is not that much different from the 3458. However that plan still has an odd extra OP as a follower stage at the output, which would be a very bad decision.
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Photoset of my R6581T: https://drive.google.com/open?id=1gHMFwEq2IObkc5OwuliWz9lFPD9lBKo_ (https://drive.google.com/open?id=1gHMFwEq2IObkc5OwuliWz9lFPD9lBKo_)
Some pics of R6581, R6581D, R6581T from www: https://drive.google.com/open?id=1XXnEh5WHusZWv0Yv-133bKSi6yV5aBa_ (https://drive.google.com/open?id=1XXnEh5WHusZWv0Yv-133bKSi6yV5aBa_)
PCB Top (R6581, unknown?)
(http://storage8.static.itmages.ru/i/18/0225/s_1519561060_6694345_c6417f87de.jpg) (https://itmages.ru/image/view/6501236/c6417f87)
PCB Top (R6581T, Mickle)
(http://storage9.static.itmages.ru/i/18/0225/s_1519561062_6389476_4c5015d2cf.jpg) (https://itmages.ru/image/view/6501237/4c5015d2)
PCB Bottom (R6581T, szszjdb)
(http://storage9.static.itmages.ru/i/18/0225/s_1519561062_6672493_b2b47b0f40.jpg) (https://itmages.ru/image/view/6501238/b2b47b0f)
Second part of Eiichi YADA patents, used in R6871E, R6581 and other top Advantest DMMs: https://drive.google.com/open?id=1y4pMli3YrJwvg73Cwn8BWc5iabx4qC-8 (https://drive.google.com/open?id=1y4pMli3YrJwvg73Cwn8BWc5iabx4qC-8)
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Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!
The turn over error is really a big issue which might leading to the bad INL performance. I had re-tested the INL in positive/negative input by the string resistor method and attached. It's clear that the negative INL is much better than the positive one.
I have an idea that can I cut the line between DC amplifier and the A/D and direct input the voltage to check the turn over error? Any risk?
I will test the new cap tomorrow and report.
I havn't found the schematics for the DC amplifier. It might take some time to draw it.
Does the Q102 for pricision channel and the Q104 for fast channel?
I don't know why I can't open the link post by Mickle. Might be the network issue.
Many thanks and Best Regards,
szszjdb
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szszjdb, google drive is blocked by a firewall ? :(
I havn't found the schematics for the DC amplifier. It might take some time to draw it.
Have you looked in private messages? I sent you a link to PDF doc.
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Are you guys going to give me welcome, as I just got myself R6581T too, today.
As usual, it is broken, no VFD display image, and no high voltage for it. Glass is ok, digital voltages look good, unit made circa 97, all clean and nice inside.
;) Battery on my unit is gonesky.
I also start collecting all data on my server about these boxes. Mickle's archive from google drive (https://xdevs.com/doc/Advantest/R6581T/R6581D_T_WWW_Mickle.rar) mirrored already.
Is there reversed schematics anywhere?
I'll bring unit home tomorrow, and take lots of hi-res photos, as usual.
EEVBlog user ramon, who happen to live also in Taipei also have one R6581T, so I took photos of that unit and did brief test of too. His unit drifts ~1ppm/4 hours on 10VDC and 10ppm off (last calibration 10 years ago), but spot on resistance 1k-100k :)
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Livestreamed my first playing with R6581T.
During 2 hour I've managed to:
* Check the VFD front panel and fixed dead fuse for HVAC supply to front panel. :=\
* Check inguard section power input supply. :-+
* Perform initial power on for meter, we got display and some ranges operating. :bullshit:
* Calibration data was lost, with most of function as result inoperative. :-BROKE
* Perform an external calibration versus Fluke 5700A 10V and secondary xDevs.com 10kOhm standard. ^-^
* Checked all DC ranges function, ohm ranges function and DCI function. ;D
* All seems to be working good :o :-+
link (https://www.youtube.com/watch?v=pUceB_7kmZU).
Calibration did not get lost on mains power cycle either, perhaps it is stored in non-voltatile ROM and not backed up by battery? That would be great, another item better than HP 3458A.
Next step would be replace dead RTC battery, put all shields and covers on unit, let it warm up for few days and then start comparison data vs my standards and reference meters.
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Calibration did not get lost on mains power cycle either, perhaps it is stored in non-voltatile ROM and not backed up by battery? That would be great, another item better than HP 3458A.
It's only the internal cal that's stored in battery, hence the unit performs all funny when the battery runs out but it'll function fine until power cycle as long as you do an internal cal. (well that's how my unit behaved anyway when I got it)
Damn since you did an external cal I think the date string for the cal data got rewritten. =P
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Ah, obvious, doh. Unit takes cal date from RTC reading :).
I guess time to buy new battery, recalibrate unit properly, and then we good to do some long runs to see drift and tests-comparisons vs 2002s/3458s.
I quickly check linearity at 1V-10V points, it all looks pristine (<0.3ppm difference).
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I have few questions, perhaps somebody can help to clarify.
* Is it correct that VFD high-voltage is AC, not the DC? This can be measured at the fuse F1 near front panel connector. I have about 41 VAC there. Instruments I've dealt with before from Keithley/HP/Datron use DC high-voltage to drive display segments and AC filament.
* Mickle.T. posted photos of his later unit circa 2006. What are those reworks with wires, modifications from factory or improvement mods? Should I modify my older unit accordingly too? :popcorn:
Few photos of my unit (rest are on my site https://xdevs.com/fix/r6581t/ page).
(https://xdevs.com/doc/Advantest/R6581T/img/adv_top_1.jpg) (https://xdevs.com/doc/Advantest/R6581T/img/adv_top.jpg) (https://xdevs.com/doc/Advantest/R6581T/img/adv_bot_1.jpg) (https://xdevs.com/doc/Advantest/R6581T/img/adv_bot.jpg)
LTZ board bodges. Trace to pin 4 of opamp is cut and solder-jumped to next trace. That might be an issue for tempco...
(https://xdevs.com/doc/Advantest/R6581T/img/adv_ltzref_1.jpg) (https://xdevs.com/doc/Advantest/R6581T/img/adv_ltzref.jpg)
Somebody (ain't me, promise) had fun and forgot to clean flux
(https://xdevs.com/doc/Advantest/R6581T/img/adv_flux1_1.jpg) (https://xdevs.com/doc/Advantest/R6581T/img/adv_flux1.jpg) (https://xdevs.com/doc/Advantest/R6581T/img/adv_flux2_1.jpg) (https://xdevs.com/doc/Advantest/R6581T/img/adv_flux2.jpg)
First time I see film SMT capacitors in equipment. :box:
(https://xdevs.com/doc/Advantest/R6581T/img/adv_filmsmt_1.jpg)
Next step I will be taking LTZ1000 reference out and testing standalone for tempco and stability, while waiting for electrolytic capacitors to replace all on digital/PSU and one cap on analog boards. :)
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Illya,
that's again a nice teardown/repair thread.
But what are the oven set points for the LTZ1000 or LTZ1000A?
You mentioned, that it's running on lower temperature than 3458A, but the divider ratio is undisclosed, also the LTZ version.
Could you please provide this information, also?
Thanks - Frank
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It looks like earlier in the thread (and in the 38hot thread), 13k / 1k was used.
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Guess no more :)
(https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_ltzstand_1.jpg) (https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_ltzstand.jpg)
Advantest REF looks like very practical (except the bodge). No overdoing where not required, and good resistors where it matters. Will be interesting to see it's tempco performance vs A9. The only thing that somewhat questionable is board-board connector.
(https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_ltzdiv_1.jpg) (https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_ltzdiv.jpg)
And yes, it is non-A version. There are also few ICs under the REF module board on main analog board.
(https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_fx_1.jpg) (https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_fx.jpg) (https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_pcbreft_1.jpg) (https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_pcbreft.jpg)
Ready for comparison:
(https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_refz_1.jpg) (https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_refz.jpg)
Few more photos on article WIP. (https://xdevs.com/fix/r6581t/#ltzpcba).
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Just a little piece of trivia on this machine, but worth knowing.
It has a 1kV DC range. However, the inputs are only marked as 120V max. The 6581T has 300V max input, and the 6581 is 1kV.
And yes, I figured this out the hard way and now have a few 6581 spare parts...
(TiNs work here is sufficient therapy that I can now talk about this sad event).
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Huh, why so?
And yes, I figured this out the hard way and now have a few 6581 spare parts...
More details please, what failed?
I can't see obvious difference on input relays, and both 6581 and 6581T have HV divider, HV resistors in series of same value. I did supply 1kVDC for some seconds during initial test, nothing blew up right away either. :-//
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I have a hard short between 5V and ground on the main analog/digital board.
I applied a low voltage source, and probed around ICs looking for the lowest differential voltage between + and ground.
I removed a couple of obvious parts (discolored or cracked).
I stopped when the short appeared to be in the ASIC.
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What are the obvious parts? R008-R011? Not so obvious to me, TBH. :'(
And now input MUX ADC is cooked? Can you crack the hood open for us to see what's inside? You can heat it up (e.g. using small gas torch) and then cool the top with wet small towel.
Top ceramic likely will crack and fall off without resistance :)
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I did few quick checks on R6581T. This is definately not the "replace the fuse and she'll be alright" repair here. :-- :box:
There is wierd issue with resistance ranges 100Kohm and higher, showing consistant error over 300 ppms, even after fresh ext cal.
I've used uncalibrated 5700A for this test and linearity test, and my FX protoref for 10V log.
EDIT: Added 3458As result vs same calibrator.
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Critical bug-fix for R6581T with firmware 004246-A02/007342-A01, 2006 yr.
Errata: an erroneously swapped bits in the relays control word are breaks the switching sequence of K006 relay and leads to large thermal EMF due to overheating.
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I did few quick checks on R6581T. This is definately not the "replace the fuse and she'll be alright" repair here. :-- :box:
There is wierd issue with resistance ranges 100Kohm and higher, showing consistant error over 300 ppms, even after fresh ext cal.
I've used uncalibrated 5700A for this test and linearity test, and my FX protoref for 10V log.
A simple repair with just replace the fuse and maybe all the electrolytic caps is much less fun than such a hidden fault causing poor performance.
The problem wirh the higher resistors could be a problem with leakage currents, present with the external terminals. 300 ppm for the higher values could also be a kind of problem with waiting times.
The INL curve looks kind of interesting. It the ppm scale relative to the range or relative to the actual reading ?
I would consider the absolute error or relative to the range more suitable.
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A simple repair with just replace the fuse and maybe all the electrolytic caps is much less fun than such a hidden fault causing poor performance.
Yea, indeed. However current schedule do not permit such time investment. Will do some more testing, but more in depth troubleshooting will be for later on.
I thought of leakage too, but 10K range is nearly spot on. That what puzzled me. I've used usual settings, OCOMP, DELAY 3, 4Wire, just like with 3458A. I'll post more detailed data, once I confirm there is no problem with the calibrator (that is repair project on it's own due to AC board failure). Calibrator is being tested now versus 3458A. So I can also use 3458A results as a reference for repeated INL test.
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Hi, Mr. Mickle.T and Mr.Kleinstein ,
Here comes the trying these day.
1. The INL issue are nearlly the same even with the new cap. Please refer to the attached. There alway have a turn over point around 7-8V input. As I know , the 6581 only calibrate the positive 10V and negative 10/1/0.1V together with the zero point . It seems have no correction if the gain is not flat in the whole 10v range. Which might lead to that? The transfer error for 10v-1v is still in the 12-14uv range.
2. Futher more, I had replaced the U214/DG442 with reed relay, no obvious change viewed . I was worry about the leakage of the DG422 before.
3. I had chaneged the K006 to low EMF type reed relay.
Focusing on the ADC, but have no idea about the next step.
Hi, Tin,
Your INL issue is like mine. Hope to find solution!
Best Regards,
szszjdb
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There is wierd issue with resistance ranges 100Kohm and higher, showing consistant error over 300 ppms,
I have found a similar problem with 10 MOhm (and possibly 100 M and 1 GOhm) range: 100 k -> 1 M transfer error is about 1 ppm, but 1 M -> 10 M gives a repeatable +150...+180 ppm multiplicative error |O
Have anyone tested a full version of R6581 (i.e. non-D and non-T) ???
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U214 (the CMOS switch in the ADC section should not be critical.
For the 10 V - 1 V transfer it is more like some problem with fast (during ACAL) / slow (manual) measurements. This would be the classical DA part from the integration cap. However there is not much more one can do about this. PP caps are about the best affordable caps at 20 nF. PS caps might be slightly better, but not really by much. The effect of DA would be about the following: When measuring near full scale charge is stored in the cap and thus the reading a little smaller and the next reading (e.g. the zero) tend to read to high. To a first approximation and slow changing signals (e.g. 100 PLC mode) this would lead to reduced gain for all readings and thus not a problem. However when switching fast from a high reading to a low reading this would also bring the readings together, even with the zero readings in between. So in fast sequence the 1 V read in 10 V range would read a little higher and the 1 V in 1 V range a little lower. Thus the 10 V to 1 V transfer is expected to give a small error, towards too high a reading in the 1 V range. The factor is expected to be about the same for the 1 V to 0.1 V range transfer. There might already be some software correction for this effect, but this is really hard to tell.
Another possible trouble would be, if for some reason the TC of the critical resistor array R200 (input part of the ADC) has increased. This could lead to thermal effects, like a time dependent response and additional INL from self heating. The performance could really suffer if R200 turns bad (e.g. higher TC). I am not sure if there is a possible independent test for these resistor array. The drift in the non AZ mode ( 10 V range) might give some indications, but it is kind off difficult to get hard numbers this way. I would be very careful with R200 - this is a really critical part for the ADC and likely impossible to replace.
If it is just the 10 V to 1 V transfer one might have to live with a correction factor applied afterwards if the 1 V / 100m V are used for highest accuracy.
These time dependent effects would be best visible with the PC interface.
p.s.: The DA effect on the fast slow readings is more complicated than I thought: it depends on how the auto zero measurements are done. So it is hard to tell upfront how much error to expect and which direction.
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Critical bug-fix for R6581T with firmware 004246-A02/007342-A01, 2006 yr.
Errata: an erroneously swapped bits in the relays control word are breaks the switching sequence of K006 relay and leads to large thermal EMF due to overheating.
Yes,This is a big bug!
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Critical bug-fix for R6581T with firmware 004246-A02/007342-A01, 2006 yr.
Errata: an erroneously swapped bits in the relays control word are breaks the switching sequence of K006 relay and leads to large thermal EMF due to overheating.
Sounds like you got some data for this meter. I have not been able to find any user manual in english (all japanese) and no service manual at all. R&S who supports Advantest here has none either (meter not sold here). Any idea?
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Sounds like you got some data for this meter.
Unfortunately no. But I have found another bug ^-^
R6581T, firmware 004246-A02/007342-A01.
Errata: switching the measurement mode from 2W-OHM to DCI doesn't reset the corresponding bit in the control register U407, so the current source remains on until DCV mode is selected. This can lead to a spurious leakage when measuring low currents at 0.1-1 nA ranges.
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Critical bug-fix for R6581T with firmware 004246-A02/007342-A01, 2006 yr.
Errata: an erroneously swapped bits in the relays control word are breaks the switching sequence of K006 relay and leads to large thermal EMF due to overheating.
Hi, Mr. Mickle.T
My 6581T firmware version is same with u, but the K006 dirve voltage is diffrent. I think it should be like K008. Look the picture please. How can I do. Thank you.
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I has the same relay drive voltage.
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I has the same relay drive voltage.
Oh,I see.Thank U! :-+
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I has the same relay drive voltage.
After patch, It's OK!
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Hi, Mr. Mickle.T and Mr.Kleinstein ,
For the INL improvement , I had replaced the R200 with 4pcs 20k foil resistor(2.5ppm/C, 2 in series and 2 in parallel ) , still found no improvement. The turn over and transfer error are still 10-13uv at +1V input in 10v range and the transfer error is 2uv at -1V input in 10v range. The negative side performed much better than the positive as before. All the test are steady and repeatable.
I also checked the output waveform of the slope amplifier ,the U207 LT1220, and I don't know if it is correct. It is the red channel in the attached picture.
Any advice for the next step ?
Best Regards,
szszjdb
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The slope amplifier waveform looks about correct. I very much doubt there would be a problem here.
A waveform that might be of some interest is the output of U205 (OPA177/AD707 in the integrator). This should show a signal similar to a square wave with reasonable fast (e.g. < 5 µs) settling. Due to the rather slow switching, I don't expect it to be critical anyway for the slow mode.
Replacing R200 is not such a good idea, as soldering can already effect the resistor. Chances are that the original C200 was tighter specs than the replacement. At least I would consider that resistor so critical to requite something like a TC in the 1 PPM/K range. Anyway R200 got the mistreatment, so it is to late. I thought my warning was enough to prevent this.
INL due to a higher TC of R200 would be a contribution proportional to U³ anyway. So it would not explain a different positive and negative sign.
A ratio that is slightly off could have an effect, but this would likely be more like an DNL problem at a few critical points. Chances are the replacement resistors are not that accurate, or at least not the same ratio as the old one.
For the low voltage turn over error there is still the possibility to have some kind of error in the zero measurement, like due to some leakage around the input MUX. Checking the turn over error for a few voltage could give an indication if it is an offset problem - it is still possible to have an error that looks like an offset, but is not.
A next step would be to get the PC interface running and check for step response. Another point to check with the PC would be for massive DNL errors - e.g. check a capacitor charging / discharging (e.g. from bias).
Is the transfer error for 10 V to 1 V range the same as for the 1 V to 100 mV range ?
A similar factor would kind of indicate a problem with INL, while a much larger error for the 100 mV range would indicate an offset problem.
While there are quite a few point't that can cause nonlinearity, I don't see many points that would change with age. One point might be aging caps in the decoupling and thus increasing supply ripple / ringing. However this is really hard to track down.
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Hi, Mr.Kleinstein ,
Thanks a lot!
I just replaced the R200 and do a fast check last night. The detail of the transfer and turn over error are as below. The transfer error are both 13ppm on 10V-1V and 1V-0.1V range, but just 1.3uv on 1V-0.1V range and 13uv on 10V-1V range . The turn over error is almost the same with the before.
I had replaced the cap on the power board and found some little improvement on the noise performance. None of the cap on ADC board had been replaced.
I will find the GPIB cable in next week.
Any other check should I make?
Best Regards,
szszjdb
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The meter does the 10-V - 1 V - 0.1 V transfers with negative voltages. The error in the 1-4 ppm range is not that large. Especially the 100 mV transfer could suffer from some offsets. 4 ppm of 100 mV is just 400 nV. This is not just during the internal transfer, but also during the external measurement.
The poor transfer for the positive sign corresponds to the turn over error and thus INL error. A 10 µV range error is too much to be a simple offset problem. So the main problem is like poor INL of the ADC or the amplifier. For the amplifier in x1 mode I doubt it would cause so much error. So we are back to the INL error of the ADC.
It is kind of odd that the turn over error is so large with small voltages. This only covers linearity over a small range in the middle. Thus normally the turn over error is expected to get smaller at low voltages. It might help to get a few more points for the turn over error at smaller voltages - e.g. 0.25 V , 0.5 V , 0.75 V - still in the 10 V range.
One possible source of INL around zero is capacitive coupling from the comparator towards the modulated current source around U202 / U203 and the reference inverter. So one could test to add some shielding to these areas.
Similar there might be some similar effect of coupling via the supply again from the comparator / slope amplifier towards U202 / U203 / U210.
One could check some extra decoupling (e.g. an extra 100 nF) at U202 / U203 / U210.
Another possible test would be adding an offset to the ADC input. The idea would be to shift the problematic area a way from 0 V. The shift could be by adding a resistor (e.g. 1 M ) from the +19 V towards the neg. input of U200/U201.
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Hi, Mr.Kleinstein ,
Thanks a lot!
The result of the turn over test for 0-1v input at 10v range is attached. The error is decreasing to around zero.
I had added 4.7uf cap on C214/C211,which is the decoupling cap for the comparator U208. No visible change found. I still need more time to change others decoupling cap around ADC and report.
I had also added the copper plate above the U200-U203, no visible change found.
You means to add a bias to +17v or -19v ?
Any further advice?
Best Regards,
szszjdb
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Trying to add shielding and extra decoupling is kind of long shots. So chance are many tries won't change much. However I am afraid that measuring supply noise won't help much either, as it would be small and thus likely not visible on the scope. And even if one sees something, it's not clear if real or just the wrong grounding point or an artifact of the probe. Anyway looking at the supplies again would not hurt.
The turn over tests for lower voltages look rather smooth. So it is more like a smooth type of INL error. Still quite a lot happens below 100 mV.
The 0.5 µV zero error can to a large part explain the 1.5 µV value for the 10 mV turn over. So it does not look like the +-10 mV is that bad. It does not look like a very localized type of error that could happen due to capacitive coupling, but more like a continents bend over the +-0.8 V range. The -8..-1 V and 1 to 8 V range might be Ok again - at least the turn over tests so far don't show clear trouble in the part. Above about +- 8 V there might be a problem again, but this might very well be a totally different one.
With this type of error I don't think it would help to add the offset - this would be something to help of there would be a very local problem at lets say +-50 µV, that by some coincidence just moved to zero. With the more continuous error it won't help.
For the ADC the range around 0 is not that special: the input current source has the added current from the -19 V and is thus just in the middle of the range. Also the Feedback during run-up is not that special at 0 V.
Most of the error developing over the +- 0.8 V range makes me think about a diode drop. There is a small chance the U108 in the input protection could cause trouble, not providing the U_in*1.07 +-1V. Another point worth checking might be the fast amplifier: are the very fast modes (<= 100 µs) working at least reasonably ? A broken fast amplifier could load the precision channel.
Some more tests related to the input (like voltage dependent input leakage) could be done much easier with the PC interface.
Edit:
To dampen possible coupling to the reference one could also try adding caps (e.g. 10-100nF range) in the feedback of the reference amplifiers (7 to 17 V and 17 to 19 V step). Besides filtering possible switching effects it would also filter reference (and amplifier) noise and this way could give a slight reduction in noise.
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Hi, Mr.Kleinstein ,
Thanks a lot!
I have checked the output of U108 to D003/004 and it is right the Uin+-1V. I also tried to desolder the D003/004 and found no improvement for turn over check.
I checked the reading when in 100US PLC and it is normal, but it just have 6 digit and the number is jumping very fast in the last 2 or 3 digit. So hard to find out something. But I can find a replacement for U104 and try it.
I will add some decoupling cap around ADC and check the improvement for noise and INL.
I am waiting for the GPIB cable and report when install it.
Best Regards,
szszjdb
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Some R6581 A/D conversion waveforms.
P.S. I was surprised that PLC100 A/D timings <> 10x PLC10 ones in the RESET phase :o
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If U108 is working correct there would be not need to desolder D3/D4. These diodes are important for ESD protection. Soldering in this area might also change the input bias.
I don' t think U104 will be a problem, if this is bad the amplifier would not work at all.
For the fast mode it is only important that it is working at all - no need to really check for precision. If would have been a really broken fast amplifier that might have a negative effect.
One could try to measure the turn over error in the 1 V range, to check if the error appears more like in the 0.1-0.8 V range or more like in the 0.01 to 0.1 V range, thus the same voltage at the ADC. I know this could be difficult, as input offset and noise will be more important.
I don't think the trimmer R170 at the DC amplifier should be that critical - so one could check if it makes a difference. The trimmer would influence the coarse offset of the amplifier and no accurate adjustment should be needed here. There might be a slight difference if the fast amplifiers runs to the positive or negative rail if the slow amplifier is active. I don't know how the trimmer should be set, but a could imaging a setting to get a similar (but not too close) offset for the slow and fast mode could be about right - a small offset could be a another target as well.
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Hi, Mr.Kleinstein ,
Thanks a lot!
I had checked the turn over error in 1V range before(on Feb.24) and it seems better than the 10V range. You reminded me that the ADC might be fine as it is also used in 1V range. So the issue is pointed to the DC amp.. But how to explain the test data from HI port to ADIN in 10V range? It is also fine in that measuring.
I will re-confirm the 2 test tonight.
I had trimmed the R170 before and it do change the offset of the precision channel, but have no effect on the turn over error.
Any further advice?
Hi, Mr. Mickle.T ,
Could you tell me where is the test point of the red channel in the last picture you attached. Why have there a flat part in the beginning of the run down phase. Is there fix timing for S1024 to S1?
Best Regards,
szszjdb
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The 1 V range turn over test shows quite some scattering, kind of like expected. So it is hard to tell if it is really better - 1 µV in the 1 v range corresponds to 10 µV in the 10 V range if the error comes from the ADC.
On thing one can see from this, is that the problem is likely not from the input side of the amplifier. So U108 or similar, as here the 1 V range is really better. This also includes the input side of the amplifier. But it is still impossible to tell if the problem is more like the output side of the amplifier or the ADC.
One possible source of nonlinearity is an effect of the input voltage on the reference voltages (+17V and -19V). This could happen from a not so good layout of the ground path, e.g. like input dependent current flowing through a ground path also used for the 7 to 17 V step. However this would cause a kind of square law contribution over the full range, thus no saturation of the error in the 1-6 V range like observed. In addition this type off error would effect essentially all instrument of one board revision in a similar way (unless the current is due to non perfect compensation). I am not sure the 34401 is sensitive enough to see a possible effect of the input on the +17 or -19 V reference. The problem is that this would need the 100 V range and would thus likely be not easy to measure. One should however be able to see individual ground points shifting - however here the problem is of deciding where to have the real ground.
I don't really expect this kind of beginners mistake in the circuit - but one never knows. Sometime even simple mistakes happen in higher grade instruments. This meter (and some others too) has some really odd design choices that makes me think :palm:.
A different timing in 100 PLC mode realized as 10x10 PLC and the normal 10 PLC mode is kind of odd. There might be the try to make the 100 PLC mode to use 100 x 20 ms for sampling the input, 100 x 20 ms for sampling zero and also make the total time lost to rundown and reset also an exact multiple of 20 ms (e.g. 20 ms,40 ms or maybe 60 ms). This could reduce the effect of 50 Hz residue a little, as than the starting phases would be evenly spaced. It could be just two separate parts of code independently written / modified and with no deeper thought.
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Kleinstein
I am not sure the 34401 is sensitive enough to see a possible effect of the input on the +17 or -19 V reference. The problem is that this would need the 100 V range and would thus likely be not easy to measure. One should however be able to see individual ground points shifting - however here the problem is of deciding where to have the real ground.
I can measure using two 2002's, which have 20V base DCV range, if someone guide me thru setup and points to measure.
A different timing in 100 PLC mode realized as 10x10 PLC
3458A does same thing, AFAIK.
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Hi, Mr. Mickle.T and Mr.Kleinstein ,
I had checked the turn over test in 1v range again, attached FYI. It seems a liitle different comparing to the last record.
I have installed the new gpib-usb cable and is learning to use.
EDIT: I found I can read data back from 6581 and 34401 in KEYSIGHT IO , but have no tools to record it. Is there any software can do the job? I am using the AGILENT 82357B , GPIB-USB cable.
I got a 6871, which is 20V range right for the 19V/17V test and will try it tonight.
EDIT: I had checked the 17v/19v/10v with 6871 and the reading are 16.695942v/-18.659821v/-9.821943v. It have nearly no change with input switch from 1V to 10V.
Best Regards,
szszjdb
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The turn over error in the 1 V range looks quite different from the old data and also different from the 10 V range. However this must not say the error observed in the 10 V range must come from the amplifier. There can be be some compensation of errors in the 1 V range. The prime candidate for the is resistor self heating, though this would be a contribution proportional to u³ and thus not visible in turn over tests. especially the higher voltage end looks better at 1 V. I am afraid the 1 V range turn over data are just to uncertain to really get much information from this.
For recording data and controlling the meter quite a few use Python scrips. A first point to check with the PC interface could be input leakage over a larger range by looking at capacitor (e.g. 1 nF PP/NP0) charging from input bias.
The relevant reference points for the "17 V / 19 V" would be something close to the current sources. Thus maybe the outer ends (17/19V) of R200 and the +-2 V levels of R201. Instead of the +-2 V level the center ground near R201 should be nearly as good. This should be rather close to the input of the current sources. A problem could be getting the probes there without disturbing the resistors too much.
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Hi, Mr. Mickle.T and Mr.Kleinstein ,
Thanks for all!
I will re-check the +17v/-19v around R200 this night. I was test them on the u209/210 ,where found no change when switching from 1V to 10v.
I found some uncertainty with my resistor string , so replaced the switch. Then I measure the 6581 INL by the method again compared to my 6871 for twice. The data is attached FYI. It is clear that:
1. both test can repeatable and the negative INL is much better than the positive one.
2. The odd is the 6871 is more like the 6581 in the positive INL, although they are the same kind of design, there still have detail in different.
3. My INL curve is more like the one made by Mr. Mickle.T. I also attach them ,FYI.
Would like to have your advice.
Best Regards,
szszjdb
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There should be a way to connect the INL test for the positive and negative side to one curve. They are measured separately, but the curve should continue to the other side, not just connecting the INL data, but also doing the linear fit over both sides.
I have the suspicion that up to about 6 V the positive side may be OP and just above about 6-8 v something happens, making the curve turn down hard.
Having a rather similar curve with the 6871 meter could be a general weakness of the design - again not clear if this it the amplifier or the ADC.
I don't see anything special at around +8 V. It is too low to expect beginning saturation at the input amplifier. The positive end is where the gate - drain voltage for the MUX JFETs is largest. So it might be something like starting leakage at the input.
The relatively strong downward trend at large positive voltage might be strong enough to see the corresponding effect in the 1 V range too. As the turn over error stayed low in the 1 V range point's away from the ADC.
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Would the simultaneous measurement of Vin at 6581T input AND at the 6581T AD IN node give more insight on this matter, to determine where error come from? I can use two 3458s for that.
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I joint the club, I have a R6581T coming to my lab soon. :-DD
It is supposed to have a battery issue but we will see when it is here. :-DMM
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Would the simultaneous measurement of Vin at 6581T input AND at the 6581T AD IN node give more insight on this matter, to determine where error come from? I can use two 3458s for that.
Measuring ADin together with the output of the 6581T is not that simple: without AZ mode there can be quite some drift that would make an INL test difficult to impossible. To get a good chance it would need a controlled input waveform with a few repeats (because of 1/f noise of the 6581). In the AZ mode there would be alternating signal and zero. So it would need something like a triggered measurement and there is a chance to get additional error from settling if the measured time in different. It might work from recorded readings at 1 PLC and sort out the data afterwards.
Similar a good measurement of the difference from input to ADin could give a test for the amplifier. No need for higher resolution here, more like a µV measurement calling for very good common mode suppression. But again one would need some suitable input waveform to do the test and drift and 1/f noise makes the test tricky. So it would be more than just connecting the meter. One might have a chance to directly see the error with an AC test: Apply a low frequency (e.g. 1-10 Hz ) AC to the input and do synchronous sampling, (looking for harmonics) of the difference over the amplifier.
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Hi, Mr.Kleinstein ,
Many Thanks!
You means the INL might causing by the leakage of input amplifier or MUX? But how to explain the data measured from HI port to ADIN? It seems ok from that picture.
I will check the INL in 1v range to confirm it.
The INL curve is perfect in 6581's datasheet and bad in my and some similar case. There must have some parts failed.
EDIT: I had test the INL for 1V range. It seems like the 10V range in the curve. So can we say the issues MUST be in the ADC?
Best Regards,
szszjdb
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The input to ADin curve is not a perfect line. This could be due to noise, drift or similar, but if real it reflects some INL error.
If one assumes the slope of initial part of the positive side, this could be an error in the 5µV range at the + or - 10 V level. This is less than the observed error in the INL test, but still more than specs. The observed deviations from a straight line could however be very well just an effect of amplifier drift and LF noise. The real measurements will correct for this in the AZ mode.
Extra leakage could be due to aged or defect (e.g. ESD damage causing more leakage) parts, but also due to contamination of the board. There can be states in between good and definitely broken.
If the INL test in the 1 V range looks like the 10 V range, this points towards the ADC. It more or less excludes the input side of the amplifier and the MUX, but in theory it could still be the output side of the amplifier. I don't see much at the output side of the amplifier to cause that type of problem, so it is very likely the ADC itself that causes the INL error.
I am kind of curious how the voltage at the output of U205 and U202 looks like. I would expect a kind of rectangular waveform with moderately slow (e.g. 1-5µs) slopes/ settling. Too slow a response at U205 could cause some INL. Form simulations I did on a similar integrator the resistor value for R216 looks relatively high to me and this could cause a relatively slow response. For the output of U203 there can be some ringing / peaks when switching. How much depends on the switching of Q204/Q205 and symmetry of Q204/Q205. A comparison between a good and bad meter might help here.
In the schematics it is a little odd the substrate pins are not connected. I would expect a connection to ground here.
C207 looks like a ceramic cap. Some higher value MLCCs show aging. I don't think the value is that critical, but at the PPM level there are many possible effects.
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All substrate pins are connected to -3.3V (U204/2 op-amp driver). I think C201, C204, C207 are film SMD capacitors, not MLCC.
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Hi, Mr.Kleinstein and Mr. Mickle.T ,
Thanks a lot.
I will test the waveform tonight.
EDIT: The waveform for U202/U200 pin6 is just an DC voltage. And for U205 is near zero signal. For U206 is a sawtooth wave. The cap on the ADC were CL type.
Would like to have your further advice?
Best Regards,
szszjdb
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For U202 chances are that there is very little AC part. This indicates that Q201 already makes a pretty good current source and/or Q204/Q205 are well matched. So it is not such a big surprise to have very little signal.
The signal from U205 looks quite noisy. If this is not just a problem of the scope or probe, this could point to no so good decoupling. The signal is small as expected,though a little less than I had expected. Because of the noise / higher frequency background it is hard to detect the time it takes for settling after the jumps - it is already hard to see the jumps. The interesting part is about 40 to 60 µs after the marker, but I am afraid one would not see much more with a zoom in anyway, even with filtering. At least no really slow settling visible - the decay back to zero over around 20-50 µs should be just the capacitor charging. So C207 should be at around 20-50 nF.
The higher frequency noise might be worth looking at a little more. With so much high frequency crap, all kinds of odd things can happen.
I am afraid the substrate "B" signal to the FET switches will not look clean too. Such a more continuous background could come from something further away, like the crystal clock, the µC or similar.
The Output of U206 is the integrator output and thus the expected triangle.
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Hi, Mr.Kleinstein ,
Thanks a lot!
I will make more pricision test with my scope tonight.
Further question about the 10v range INL, although the negative one looks better in ppm scale(<0.2ppm), it is still very large(15uv each) error between the V source and the V measure in the uv scale. The V source is the sum of the single resistor voltage ,which is measured both in 10v range.
What might be the reson for it? Attached the curve , FYI. Also attached the scheme of my KV divider.
Best Regards,
szszjdb
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One reason for a relative large error for the direct difference can be the error from the 10 to 1 V range transfer.
Another possible error source could be an offset error that adds up with the steps. The linear fit can to a large fraction compensate for this.
A big problem can be drift of the references during the measurement. This can look like a nonlinear part. For the reason it might be needed to do a repeated measurement and not just a single measurement each. A set of measurements would be something like:
1) the single resistor voltages
2) the sums (e.g. 1 , 2, 3, ...10 V and -1, -2 ....)
3) the single resistor voltages again to check for drift and get an idea on how much drift is expected.
Another possible problem can be input current - this would show the most effect in the center of the resistor string and could this way explain a curvature as observed for the positive side.
It is a little odd that the single resistor voltages don't match for the positive and negative side. They are quite different and might indicate drift.
Also the first voltage should fit rather well.
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Hi, Mr.Kleinstein ,
Thanks a lot!
I measure both the voltage of single resistor and the sum of it in 10v range, so the error might come from the INL itself?
The offset of each range is near zero. Where is the offset come from?
The drift of the voltage has the max 1-2uv recorded and it might come from the banana socket . It 's a repeatable test and I was doing them exactly like the step you mentioned.
The input bias is about 0.2mv on an 9.7M resistor.
The turnover test shows the different between each.
I went to my friend and recorded the performance of his 3458. All the test platform is like in the 6581 test. As attached , the INL is nearly <0.2ppm ,and the sum of the resistor voltage is near the measured.
I will test the waveform tomorow night.
Best Regards,
szszjdb
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R6581T INL in the full +-10V range :palm:
Measured with Datron 4000A (0...+19.999999V with 0.1 ppm INL) and subtracted 10 V from LTZ1000 vref.
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The idea of the test with the resistor chain is to measure INL at a few points. As ideally INL is rather small, one usually has to push it hard to avoid other errors. Offsets in the 1-2 µV range, e.g. from hand warm banana plugs might already be a problem.
A second type of difficulty can be settling of the meter and reference drift. A fast measurement sequence might see settling effects, while a slow sequence would see more drift effects. One could do a separate settling test with sending the data to the PC.
The different values (1.3 µV) already at 1 V and thus only the first resistor kind of indicates a problem - either with drift or quite a lot of offset. How good do the measurements of the resistor voltages match initial and at the end ?
One should be able to have both the positive and negative side in one curve (with 0 in the middle) - the voltages over the single resistors can be measured with one sign and than give a continuous sequence through 0.
With the PC interface one should be able to check for input bias at a few more voltages (e.g. with the drift seem with a good quality (PS or PP) capacitor in the 1 nF range). Alternatively one could do the test with and without an extra series resistor. Even if the input bias is in specs (e.g. < 100 pA), one might have to apply corrections, as the source impedance changes with the resistor chain.
As the meter does not use a pre-charge phase, there is a chance that there is some "charge injection" from the MUX changing between 0 and input. If this changes with voltage (which is to be expected) and input impedance this could cause some extra errors. It might be worth doing a test with a positive voltage (e.g. 5 V, 7 V or similar), comparing a few different series resistors (e.g. 0 Ohms, 100 K , 1 M) - if there is a significant difference, this would indicate an input related problem. Capacitance at the input (e.g. C008) could make a difference too, as the switching includes dynamic effects. There is some chance that switching can be different when going up or down in voltage so this could cause a difference between positive and negative voltages.
One might be able to see switching artifacts with the scope at the input.
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Hi, Mr.Kleinstein and Mr. Mickle.T ,
Thanks a lot!
The main drift might came from the EMF of the banana jack and the switch of the divider. But it is almost in the 1-2uv range and can be considered as the system error of my test platform. I will change the banana jack to low EMF type later.
I also noticed some more noise coming when testing the 3458 in the 6-8V input from the string resistor. The digit of uv jump more than the other voltage like 1-2v. I don't know the reason.
Would you give some detail advice on the PLC and interal setting when check the bias with the capacitor ? I can read back data from GPIB port now.
I just repalced back the r200 to the original one ,so will do more test tomorow night.
I also comfirmed that all my early test are conducted under the PROTECT on mode, which connected the C008. I will test again under PROTECT off mode.
Best Regards,
szszjdb
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The noise in the center part of the resistor string can be higher for two reasons:
The first is just Johnson resistor noise. With a 10 K string in the center output resistance is up to 50 K and thus noise of up to about 30 nV/Sqrt(Hz). I don't think one would really notice this in the 10 V range. In addition there can be some low frequency excess noise - though I doubt it will be much with only about 1 V per resistor.
The DMM input will have some current noise, not just voltage noise. There are rarely specs for this, but it can be quite a bit. Especially for the 6581 this can be relatively high from the way the JFETs are switched in the AZ mode.
At higher voltages there is additional noise from the references (both the meter and external source).
For checking the drift with a capacitor one could test the 1 PLC and 10 PLC mode. The 1 PLC mode would have a higher switching frequency and thus more contribution from charge injection. With a 1 nF capacitor the drift would be around 10 pA/1 nF = 10 mV/s . This does not need the high resolution of the 100 PLC mode. One could even check the non AZ mode for comparison. So the test would be to save the data to a file, have the cap at the input and than apply a voltage of the points to test (e.g. 1,2,3,...10 V) for a little while (to allow DA of the capacitor to settle) and than get the actual drift reading for maybe 10 seconds. Alternatively one could start at 10 V / 0 V/ -10 V and use the drift to cover a larger voltage range. At 10 mV/s this might take some 40 minutes to cover the full range. A slightly larger cap might help to reduce the effect of the internal cap to get more accurate absolute values.
Ideally the voltage reading should not change between the protect on and off mode. One could check that, especially with a voltage source that has some output resistance (e.g 100K-1M range). There will be some settling (e.g. 300 pF*100 K = 30 µs , thus short) but ideally no other change. I would not expect much DA effect form the capacitor - though it is odd to have a MKS type here. I would have expected a low loss type like NP0 or MKP. However charge injection could be influenced by the capacitor and something like a change in the input current of a few pA would be visible. With a 5 Hz switching frequency this would correspond to a change in charge injection in the pC range. I don't know data on JFET switching, but I would expect about that order of magnitude - maybe considerable more if the limited slew rate of the OP07 (U107) comes into play. So there is a possible effect.
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Hi, Mr.Kleinstein and Mr. Mickle.T ,
Thanks a lot!
I tested the noise of the LTZ1000 ref. PCB with AZON and AZOFF mode. Attached FYI.
I also checked the bias voltage on the 1nf cap with or with AZ and attached.
All the test was on 20 PLC .
Best Regards,
szszjdb
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The noise test at 7 V looks good. There are a few out-layers. The lower noise level in AZ mode is normal due to the 1/f noise of the amplifier that is suppressed by AZ.
The test with the capacitor shows very little input current: the negative side shown a slope of around 3 mV/s which would be a current of only 3 pA with a 1 nF capacitor. Due to internal capacitance real current is a little higher (maybe 50%).
The test with AZ and positive voltage shows a voltage / time dependent drift. Starting at around 10 mV/s this would be about 10 pA but leveling of.
A change over 100 mV corresponds to a 10 GOhms differential resistance. This might cause some trouble with higher impedance signal sources.
So it would be really worth doing the similar test at different voltages, to gets input current over the full -10 to 10 V range.
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Hi, Mr.Kleinstein and Mr. Mickle.T ,
Thanks a lot!
Would you please give me some advice on the detail to add the voltage with the cap. Parellel the cap with the HI/LO port,feed the input with a voltage source setting at 1V, and then plug out the feed line?
I had buy the new U401 for Q102 and am going to replace it to fix the INL of the DC amplifier(about 5uv ). Can I do it ?
Best Regards,
szszjdb
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...
Would you please give me some advice on the detail to add the voltage with the cap. Parellel the cap with the HI/LO port,feed the input with a voltage source setting at 1V, and then plug out the feed line?
......
Best Regards,
szszjdb
This the way I would apply different voltage for the tests. There is no need for exact starting points, it just helps if the whole range in covered. Depending on the input current, one could get away with starting at 10 V or -10 V and than just wait for the capacitor to charge / discharge.
Unless there was another mishap to damage it, I don't expect U401 to be damaged and responsible for INL. If U401 is damages somehow, the first things to expect would be the amplifier to not work at all and maybe excessive low frequency noise. The ref test was OK though.
Subtile INL errors might be from not working Q110, Q107 / Q115 or Q116. However a damage is unlikely. This cold be checked if in doubt.
The one point I find a little odd with the amplifier is the way the guard driver for the JFET input switches is handled. It can take quite some time for U107 to settle ( the OP07 has a rather limited slew rate) and this could cause quite some leakage current through the JFETs, when switching from a positive voltage down. So just for curiosity it might be interesting to look at the amplifiers output and guard with the DMM in AZ mode and with some voltage applied to the input. Possible problems (and maybe just the normal capacitance / charge injection) when switching would also show up as extra input current - thus the idea of checking the input current at different voltages too.
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The one point I find a little odd with the amplifier is the way the guard driver for the JFET input switches is handled. It can take quite some time for U107 to settle ( the OP07 has a rather limited slew rate) and this could cause quite some leakage current through the JFETs, when switching from a positive voltage down.
The amplifier's precision channel have the same OP07D (U104) in the signal path. There are another odd thing with JFET switches: R083 C026 series circuit.
szszjdb, can you makes some measurements, please. I found a huge Ohms transfer error from 1 MOhm to 10 MOhm ranges. With 1 MOhm resistor I get a 180-200 ppm difference (temperature independant) :bullshit:
Some small improvements:
1) R234 copper mod. VDC 10V tempco decreased about 5 times.
(http://storage1.static.itmages.ru/i/18/0325/s_1522006768_2119060_2a7d765f71.jpg) (https://itmages.ru/image/view/6561709/2a7d765f) (http://storage1.static.itmages.ru/i/18/0325/s_1522006768_6719192_28ce39e9d0.jpg) (https://itmages.ru/image/view/6561708/28ce39e9)
2) U504 OP07D v-ground op amp was changed to the lower noise AD8675. It makes sense only in low voltages non-AZ modes.
(http://storage7.static.itmages.ru/i/18/0325/s_1522008622_8121067_436c31952a.jpg) (https://itmages.ru/image/view/6561759/436c3195)
3) Input amplifier's dual FETs is rather sensitive to convective air flows.
(http://storage4.static.itmages.ru/i/18/0325/s_1522008621_1072647_c927263455.png) (https://itmages.ru/image/view/6561758/c9272634) (http://storage3.static.itmages.ru/i/18/0325/s_1522008621_5163321_6e1fe17b56.jpg) (https://itmages.ru/image/view/6561757/6e1fe17b) (http://storage8.static.itmages.ru/i/18/0325/s_1522008623_4218008_815de31eb9.jpg) (https://itmages.ru/image/view/6561760/815de31e)
P.S. STL and STEP 2.14 models attached.
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Mickle.T.
szszjdb, can you makes some measurements, please. I found a huge Ohms transfer error from 1 MOhm to 10 MOhm ranges. With 1 MOhm resistor I get a 180-200 ppm difference (temperature independant)
All ranges 100K and higher have big errors on mine too, so I can do measurements, just tell me what to do :). I have meter moved to workbench again, so I'll play with it soon again.
Can you also share CAD for cover for us, I'd like to get some printed too :).
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Hi, Mr.Kleinstein and Mr. Mickle.T ,
Thanks a lot!
I had checked the Q106-Q116 around the DC amp and found no obvious issue there. The dual FET work fine with the 0.5ma current. I am testing with 0v input and using the handheld meter. Attached FYI.
I will conduct the bias checking soon later.
I also check the transfer error for 1M ohm input in 2 wire method and it was at least 200ppm error from 1M to 10M range transfer. Testing is in 2 method , the NORMAL and the OHM-COMP. The later has the worse performance than the former. I also re-calibrated the meter for further check and found some improvement.
Best Regards,
szszjdb
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So, my resume is here: Advantest R6581 - is a fake 8.5-digits multimeter: :--
1) "fake" >100 GOhm input impedance (although a user manual says about only >10 GOhm). Huge input current spikes in AZ mode are ruines these GOhms at all.
2) "fake" 1.1 kV VDC rating.
3) "fake" VDC ranges temperature coefficients (most users are complain about it).
4) "fake" ADC INL.
5) "fake" Ohms artifact calibration tolerances.
Did I miss something?
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Well, it's still okayish if priced in 6.5d meter range.
Yea, dreaded banana jacks instead of proper binding posts.
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For the Ohms problem, it might make a difference of the "protect" capacitor at the input is connected. If this really is an MKT type cap, its DA might cause problems too with very high resistors. Just in case one could change it from MKT to MKP or NP0.
For the very high ohms ranges and thus very small test currents, the current source uses quite small voltages and might still have quite some meter internal leakage. So I won't expect really good accuracy above 1 M anyway. So those extra ranges for very hight resistance are not expected to be very accurate.
The INL data for the positive sign from szszjdb look so bad, that there still might be a well hidden defect. TiNs and Mickle's meters seems to be considerably better, though not really what one expects from a 8 digit meter. From looking at the schematics, I would be kind of afraid of INL do the self heating of R200 (input of the ADC), causing a U³ component. At least so far the data shown look good at least - likely really good quality R200, or maybe a hidden numerical correction.
It would be interesting to see how large the AZ mode current spike is. I thought a little about the switching sequence and from this the critical part could be with large negative voltage, especially the small range below -10 V. The step from switching between a negative voltage to a positive voltage should not be so bad: the guard from OP U107 should start low and may cause a slightly delayed turn on, but nothing bad would happen. However the other direction might be tricky. the guard level can be relatively positive and it takes the OP07 quite some time to come down. If this is slower than the LM399 and the 100 K resistors allow the gate voltage to rise, this could result in a gate voltage that gets too positive and cause gate current to flow. R83, C26 might be for this purpose, to slow down the switching. So they make some sense.
With a positive input the problematic input step would effect the GND reference in AZ mode, with a negative one it would be the input. There would be definitively a asymmetry between positive and negative voltages and thus possible contributions to input resistance, that might be nonlinear. I would definitely expect the input current to be voltage dependent.
The reported VDC drift problems might be due to the bug causing the input relay to get rather hot. So chances are it gets better when fixed.
The DCV transfer between ranges (e.g. 10 V to 1 V) is also a bit disappointing for a 8 digit meter. However if known the error might be corrected manually.
Another possible problem could be due to DA from the integration capacitor. This might cause some settling problems. So it might be worth doing a test like switching from a relatively high voltage (e.g. 10 V for maybe 1 minute) to 0 and record the data for the first maybe 1 minute at 10 PLC. One might be able to do this with changing from front to back. Without AZ there will likely be quite some effect, but who really cares about this. Depending on how AZ is done there might be some effect with AZ active too - and this could be a problem, especially if not known.
On trying to improve a little, it might be worth adding some caps in the feedback to U209 / U211 to produce the 17/-19 V references. This would add some filtering to the reference and thus reduce the noise of the ADC a little. Due to the modulation the ADC is sensitive to noise reference noise at around the modulation frequency (around 5 kHz). It is not very much, but avoidable.
The meter is still better than many 6 digit meters.
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Hi, Mr. Mickle.T ,
I still can not believe that the data in the spec is just a story. How a big company trick so many professional user in such long time? I take that there have some more sensitive design to the parts aging or falure. Yet it is difficult to find out.
The weakness might fixed by some degree in the following model 7480/7470. My friend have got one 7480 and I will have chance to check it later.
Best Regards,
szszjdb
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I will get mine in the next coming days, the only thing I know is that the display is bright and that the battery need to be changed, i already got one ready.
The best other meter I have to compare is a Keithley 2001 in good condition but need to be calibrated, I will keep your guys posted!
PS: Advantest is a company with good reputation and don't think that they have put on the market something bad, maybe not so good than 3458A but correct.
The bad part from this instrument is that there is no documentation nor a decent English manual.
eurofox
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Perhaps Advantest's marketing team gold picked very good 6581 for above mentioned JJA linearity test. We will not know the true story.
Also Keithley 2001 also definitely worse for linearity, noise and stability than working 6581.
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I got my Advantest R6581 today :-+
Confirmation the battery is dead and since I got the same as the original I did a quick replace |O not so quick since one leg broke on the surface of the PCB next to an electrolytic capacitor, finally I removed the capacitor to be able to remove the broken wire and at the same time check the capacitor.
Instrument is in mint condition 8)
Next an internal calibration ...... :phew:
After a while calibration was done, no errors :-DMM
Finally use different voltages, current, resistor decade and everything seems to be ok.
Next will need a full calibration with external references but at first glance seems to be a winner :-DD
eurofox
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I got my Advantest R6581 today :-+
How about some experiments >:D
1) Internal Cal ALL. Set 10 VDC range, AZERO ON, input short, Null. Connect external 10 V source, then measure a voltage difference between +10 V and -10 V readings.
2) Connect external 1 MOhm resistor and measure its value on the 1 MOhm and 10 MOhm ranges (OCOMP OFF, AZERO ON).
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I got my Advantest R6581 today :-+
How about some experiments >:D
1) Internal Cal ALL. Set 10 VDC range, AZERO ON, input short, Null. Connect external 10 V source, then measure a voltage difference between +10 V and -10 V readings.
2) Connect external 1 MOhm resistor and measure its value on the 1 MOhm and 10 MOhm ranges (OCOMP OFF, AZERO ON).
Voltage is exactly the same in + or - !
Resistor is correct !
Based on the brightness of the display and cosmetic condition I think that this instrument spend most on his life on a shelf not used until the battery died ....
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Internals photo, ple-e-e-a-s-e :-+
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I got my 6581T in test now.
URL (https://www.youtube.com/watch?v=W-RcUcAnxbw).
URL (https://www.youtube.com/watch?v=uM6Lvwsa4TM).
Results:
* Autozero does not show any more noise with my 10V source setup (xDevs FX LTZ ref with ADA4522-2 chopper drive output and battery powered).
* +10V to -10V difference is 0.49ppm (3458A-2: 0.16ppm, 3458A-3: 0.27ppm, K2002's about 0.9ppm might be TC issue, both 2002 are too hot).
1 Megaohm resistor test results:
HP3458A
1.0000012 - 1 Meg
01.000037 - 10 Meg
001.00004 - 100 Meg
0001.00000 - 1G range
R6581T
999.80555 - 1 Meg : deviation = -195 ppm
00.999785 - 10 Meg : deviation = -251 ppm
000.99900 - 100 Meg : deviation = -1040 ppm
0001.0003 - 1G range : deviation = +300 ppm
Also can anyone confirm that VFD high-voltage is indeed AC voltage? VFD brightness is really dim, and it's unusual to me that VFD has AC drive for both segments and filaments. I've attached fuse F1 and F2 (near front panel FPC connectors) oscilloscope waveforms measured voltage vs GND.
P.S. Meter does not have relay drive fix yet.
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This video is unavailable :(
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There should be a difference in the noise between AZ and non AZ mode. In some cases it might have a similar RMS value, but there should be extra 1/f type noise in the case without AZ and the extra zero measurement would contribute a little more broad-band noise. As far as I have understood it current measurement and likely 4 wire ohms are always AZ. This might also apply to something like 100 PLC mode.
The meter from Eurofox working so well suggests that there is some kind of common wide spread type of error / defect that might influence quite a few meters. Just in case it might help to know the software version of the well working unit.
Edit - after seeing TiN's video:
The noise on the meter changes significant (higher noise without AZ) as expected. What did not change was the noise observed directly at the input, recorded with a sensitive amplifier to the scope. This is not a real surprise, as the first part at the input is a 8.8 K resistance that isolates the input from the ADC. So if at all one would see extra noise only with a higher impedance source, but not with a low impedance buffered source.
The kickback to the input can be different for the negative and positive sign - at least the switching of the JFET might behave different.
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Yea, sorry, I updated post above with both video parts and results.
Perhaps I did not see any noise difference because my 10V reference can do rather high power output drive (+/- 40mA with <1ppm load error).
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...
1 Megaohm resistor test results:
R6581T
999.80555 - 1 Meg : deviation = -195 ppm
00.999785 - 10 Meg : deviation = -251 ppm
...
Also can anyone confirm that VFD high-voltage is indeed AC voltage? VFD brightness is really dim, and it's unusual to me that VFD has AC drive for both segments and filaments. I've attached fuse F1 and F2 (near front panel FPC connectors) oscilloscope waveforms measured voltage vs GND.
1 and 10 Meg transfer in your DMM is almost perfect. I can't understand why all of these 6581x are so differents |O
VFD in my DMM almost unreadable. Waveforms and amplitudes on the F1 and F2 is the same as yours, but have a DC offset.
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The higher Ohms values could suffer from too fast switching on the Ohms Hi sense input. Different from the DCV input there seems to be no RC to slow down the switching. It might be worth looking with the scope at the sense_Hi input when measuring a 1 M resistor (OCOMP Off).
The 3458 uses quite some extra effort to control the JFET switching: e.g. using a current sink and cap instead of just a simple RC in the 6581. So it is not only having no pre-charge , but also a much simpler timing.
Another point could be to just look at the input current with the capacitor method at 1 PLC with AZ and without.
It is hard to tell why different meter behave so different. It might indicate defects / aging to a different degree. One example could also be timings that get critical more or less. One likely important source for INL should be self heating of the input resistor in R200 - so things can change depending on the individual TC.
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Hi, Mr.Kleinstein and Mr. Mickle.T ,
Thanks a lot!
Yes most of the used 6581 have more or less issues with them and mine is the worst case I ever heard.
Here updataed the bias test by cap method. One is for the zero start point in AZON and the other are for 1-10v start point in AZOFF.All in 10plc. It seems ok by now?
I got a 3458 and could check the AD with it at the ADIN point. I am still wondering who is the bad gay, AD or the DC AMP.
Any further advice, please!
EDIT: Add the test report of 0V input by 1nf on AZOFF and AZON mode .
Best Regards,
szszjdb
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The input bias tests look very odd, especially the case with AZ off. Why is the voltage going down to zero so fast. The interesting part wound be starting at 2, 3 , 4 .. V and than watching the drift from there, not the recovery after a 0 - 5 V - 0 V or similar pattern. That would be looking for something like DA in the capacitor and maybe internal caps at the input. If the fast drop back to zero and than back to around 0.7 V is just due to the DMM this would be really odd and would indicate a problem.
The test from 0 shows initially some current (still looks like < 100 pA and thus acceptable), but hard to judge from the scale how much exactly.
The current seems to vanish around 300 mV / 700 mV, so the extra AZ switching seems to have some effect, but not very much. The slow drift in the later part may be just slow drift of the current and thus moving the point of zero current around.
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Hi guy's!
Yesterday I did a calibration just after changing the battery to check that is was ok and of course the instrument was cold :palm:
Today after 1 hour warm up calibration and did the test again, I don't have a very stable 10VDC ref, the 2 last digits from my ref are "jumping" with 100 averages.
Sorry guy's but get the same results with inverting the polarity, if your meter does not do that you should look to fix it!
Now the resistors, I have only 1M ohm and 10M ohm with 5 % tolerance measured with 50 averages.
1M ohm
1000K ohm range : 1036.8568
10M ohm range : 1.0369998
100M ohm range : 1.03731
10M ohm
10M ohm range : 10.160642
100M ohm range : 10.16695
I need to calibrate it with external references to get better results but I'm happy with the instrument :-DD
eurofox
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Hi, Mr.Kleinstein,
Sorry, I need to re-do the step test ,as I use the NO-LOAD function of my 6144 and found diffirent performance from just plug out the line.
EDIT: Here comes the step test again with just plug out the feed line. The interal of each voltage step is about 90s. The spike on 4/5v is just the moment when plugging out. Also attached the excel file, FYI.
All are with AZON.
Best Regards,
szszjdb
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Sorry guy's but get the same results with inverting the polarity, if your meter does not do that you should look to fix it!
You can help our community to repair DMMs even by making just one high-res photo of your PCB.
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Sorry guy's but get the same results with inverting the polarity, if your meter does not do that you should look to fix it!
You can help our community to repair DMMs even by making just one high-res photo of your PCB.
I can try to do that maybe next week because I have to open again the instrument but I don't no what you expect with a picture ... detect different components ?
I just start to warm up my LTZ1000 board and will check again the polarity since this one is more stable.
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There could be different versions of the DMM. One point could be software versions - so there may be version without the relay drivers mixed up and there could be also small changes in the timing, that can make a big difference.
There are also different HW versions with changing some of the resistors / OPs - though I don't expect this to make a big difference. Much of this was changing non critical resistors from very expensive or no more available types to cheaper ones and the change in OPs from the old / obsolete AD707 to a similar OP177. For the more more critical resistor networks there seem to be blue and green versions.
There might be more changes / bodges that could make a big difference.
@szszjdb: for the capacitor test, it should be really unplugging the voltage source, and also avoid movements close the terminal caps, as this test is done to see current down to the pA range.
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Now the polarity test with Ltz 1000 board that is more stable :-+
+7.0659259
- 7.0659238
eurofox
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0.3 ppm difference is (almost) normal.
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Sorry guy's but get the same results with inverting the polarity, if your meter does not do that you should look to fix it!
You can help our community to repair DMMs even by making just one high-res photo of your PCB.
Please specify the area you want to get in detail on the pictures, also provide a link where I can upload since on the board it is limited.
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Here is ranking of the top 3 most critical parts of R6581 DMM:
1) ADC.
2) DC Input Amplfier.
3) Ohms Current Sources.
All photos can be uploaded to the TiN's ftp or any other file-hosting.
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Hi, Mr.Kleinstein?
Thanks a lot!
I had re-tested the bias input by the cap method both in positive and negative step input. It seems odd in the +8V input that the voltage get down too fast than other voltage input. The negative voltage seems ok by now. Attached FYI.
Would like to have your advice!
Best Regards,
szszjdb
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Looking at the discharge curves this looks like there is something odd with the input, for both the positive and negative side. The discharge on the negative side is a bit fast at the very negative voltages (below -6 V) with the input current reaching more than 100 pA and the resistance dropping a little below 10 GOhms. Also resistance looks a bit nonlinear, with increasingly more current at higher voltage.
For the positive side there is no table with data, just pictures. So it is a little hard to tell exact numbers, but it looks even steeper. The 8 V test is kind of odd - normally it should be just a single curve, going down - no matter if one starts at 10 V or 5 V. So it is odd to have that 8 V curve so different. So this might be a kind of artifact, maybe touching the input ?. How is the voltage source separated ?
If the voltage drops all the way close to zero, just 2 tests from +10 and -10 would be good enough to cover the whole voltage range.
Are the data really in 1 second steps, despite of using 10 PLC mode - the time steps would also effect the current scaling.
It would be interesting to have data on both the AZ and non AZ mode. With the AZ mode I would prefer the free running mode and thus more like 20-24 readings per second.
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Hi, Mr.Kleinstein?
Thanks a lot!
The bias test I made before are using the R6144 for the voltage source and I just disconnected one of the inpput line for the discharge. There performed a little difference from using the LTZ1000 powering by a battery, so I checked in both condition.
Below are the test result ,both in 2PLC (40ms) and 40ms of capture interal(25sample/s).
The bias current reach 5na near 10v in the negative test and 0.5na in the positive test , both in AZON mode. That must imply some issues in the DC amplifier? The MUX or the JFET U401 have probably starting breakdown in the higher voltage? So changing the Q102(U401) or Q104(dn2094-1) could be try?
Attached all picture and xls file ,FYI.
Best Regards,
szszjdb
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The other 3 xls file attached.
Thanks a lot!
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The input current is not that high (but still a bit higher than it should be) with AZ off. So the problem is more with the AZ mode (e.g. the JFET MUX) and not with the DC input amplifier. So there is not much sense in changing the FETs in the amplifier. In addition the input FETs are bootstrapped, so for these FETs there is no difference when the input voltage changes.
Possible defects to give extra input currents would be more like surface contamination, of maybe U009 (though not that likely) and maybe some of the FETs in the MUX. For the AZ mode there is a slight chance to have trouble due to timing problems, like some of the LM339 switching faster than others. For comparison it might be worth looking at the amplifiers output (e.g. ADC_in testpoint) with a scope, when in AZ mode. I would expect quite an odd waveform, as there will be charge injection through the jFETs. In addition if switching gets too fast there might be trouble from U107 (and maybe the slow DC amplifier) not being fast enough to follow a fast droping voltage.
As intended the low NPLC setting makes the difference larger. So the 10 PLC and slower modes would not be that bad, more like 90% of the current with AZ off + 10% of the current with AZ on. The higher input current in the AZ mode might be a general weakness of this meter, as there is no compensation for charge injection and no pre-charge phase. So it is not at all a surprise to see a considerable input current. If one compares the input switching to the HP meters (e.g. 3456 and even more with the 3458) they do quite some extra effort to compensate for charge injection by the JFETs. With the R6581 they seem to ignore it and maybe hope for some compensation from the different JFETs in the MUX.
The lacking charge compensation is expected to cause quite some current spikes at the input. On average this should not give much current. The lack of pre charge can cause some input current - especially an effective input resistance.
Estimating the input capacitance of the amplifier is a bit difficult due to the bootstrapping that reduces the capacitance a lot. I would expect much of the capacitance due to the MUX and layout. With maybe 20 pF and 25 Hz switching, the missing pre-charge could be effectively like a resistor of 2 GOhms to ground. I am afraid this a limitation if that DMM. So super high input impedance would not work with low NPLC and AZ. Even in the 100 PLC AZ mode one can expect a rather finite input impedance, maybe in the 10-40 GOhms range, but not much higher.
This would be differenz from other meters that usually also specify something like >10 GOhms, but can be well over 100 GOhms when clean.
The input current could be an issue with the INL test via the resistor chain or other higher impedance sources.
However the input current in the non AZ mode also seems to be relatively high. The odd part near the start could be due to hand movement, so it might not be so serious.
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How about some experiments >:D
1) Internal Cal ALL. Set 10 VDC range, AZERO ON, input short, Null. Connect external 10 V source, then measure a voltage difference between +10 V and -10 V readings.
2) Connect external 1 MOhm resistor and measure its value on the 1 MOhm and 10 MOhm ranges (OCOMP OFF, AZERO ON).
If it helps, here are some readings
Average of 10 NPLC 10 readings of a not burnt in lt1021/10
-9.99801447
9.9980031
Average of 10 NPLC 10 readings of a low quality 1M resistor
1M 996.893519
10M 996.9192
100M 996.710
1000M 997.37
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Hi, Mr.Kleinstein,
Thanks a lot!
I had removed the R061 and D003/4 to check the leakage and found no obviously change.
I also replaced the Q102 (U401)and Q104 (DN2094-1)to U401, the one I buyed before and also found just slightly changes. All that are not the key part concerned to the leakage. Attached FYI.
I also borrowed an analog PCB(2005 version, mine is 2000 version) from my friend(his digital board has some issue) and do a fast check about the INL and the bias. The turn over error is about 8uv at 10v and 1-2uv at 1v input, better than mine, which are 10uv and 10uv corresponded. The bias test result are like mine. Attached FYI.
Would like to have your further advice!
Best Regards,
szszjdb
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Attached the xls file for the new analog PCB, FYI.
Thanks!
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Hi, Mr.Kleinstein ,
Sorry, I just made a mistake that the former data for New PCB is tested under no cap parallel , so it is just the inner cap instead of the 1nf. The final result with the new PCB show very good bias current in the negative side with AZOFF , but still very odd with the positive one. Please look at the NEWPCB-POS10-AZOFF-LTZ10-BAT-N.jpg, there has two turn over point around 9v and 6.5v and the current become much larger than the other section. That should have some relation to the big INL arround 6v as tested before. What might be the reason of the turn over point?
Attached the picture and the xls file ,FYI.
Best Regards,
szszjdb
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The 2nd version curves look better. The input current is still not super low, but most of the time acceptable. The positive side looks bad above about 4 V. The negative side AZ mode also looks odd.
Chances are there are 2 faults. One with the AZ mode and one for the positive side.
So even though the INL might be slightly better, the input current shows some clear faults.
I would check the waveform at the amplifiers output and maybe the control gate of the MUX for the DCV input (pin 20 of the MUX).
The other points to check it the over-voltage protection (U009, U108 outputs, voltages at D3,D4), the guard amplifier (U107) and maybe the voltages to the control gates at the mux. For some reason I don't know there are sometimes failures in the LM339 to control JFETs.
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Uploaded some HR pictures in ftp server from TIN in directory \eurofox\100NIKON
I hope it is useful, pictures are taken without statif (my statif is somewhere in the garage :palm:)
eurofox
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I can't see any difference with my R6581T :-\
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I can't see any difference with my R6581T :-\
Then I suppose you have some problems with yours.
I have connected to my LTZ1000 board several hours and is quite stable. :-+
I look forward to calibrate it with a 10.000000V and 10Kohm reference.
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The possible problems, weaknesses of this meter seem to be input current and possible INL problems (likely the ADC).
Before making a real calibration I would do the input current test, like that with an capacitor at the input. Even if one may not find a fault, it would be good to know the limitations. Knowing what about to expect from a good meter could also help to find possible faults.
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Hi, Mr.Kleinstein ,
I had checked the waveform of the control gate voltage of PIN14, PIN17 and PIN20 of MUX ,together with the ADIN in the yellow channel. None of them have issues. Attached FYI.
Others voltage like U009/U108/D003/D004 seems normal.
Would like to have your advice.
Best Regards,
szszjdb
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I had expected pin 14 to essentially follow the amplifiers output / guard, as this fet (EN2) should be on all the time during a DC measurement. So +10 V and 0 V would be OK. So the Comparator is always off and it is just the guard to work there.
For pin 17 it is also normal to have 0 V when on, as during this phase the voltage is 0 V. So the 0 V and -17 V are also OK.
It could be a problem if the voltage is not going down fast enough.
The important part might be the transients. Here it could happen for a short time that a gate voltage is too high. There is quite some negative overshoot for the amplifier output - this not a good sign, but nor directly a problem.
Anyway a positive input is the well behaved case for the AZ mode. The faulty case was AZ with a negative input.
Here the exact timing between MUX PINs 20 and 17 might matter - to little delay could be a problem. So possible trouble with SW and HW not matching.
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I had checked the waveform of the control gate voltage of PIN14, PIN17 and PIN20 of MUX ,together with the ADIN in the yellow channel.
I had the same waveforms.
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hello,
can anybody point to the input protection circuitry?
regards.
-zia
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You are interested in the protection circuit for a particular measurement mode?
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the mode in which you have an inversion (turn over) error.
regards.
-zia
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In my case the rollover error is ~1 ppm with or without R8-R11, D003-D004, even without an input amplifier. So I think it's ADC INL problem only.
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Hi, Mr.Kleinstein and Mr. Mickle.T ,
I still take that there has something happened around +8V to+4V ,that the bias become larger than others. That might also cause the bad INL arround 6V. Attached FYI.
Further test about the gate of the MUX will be tonight.
Best Regards,
szszjdb
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I agree that there is still something wrong at positive voltages, higher than about 5 V. However this looks like it is about the same with AZ active and not. The gate voltages did not help with that problem. For this increased leakage, there are quite a few possible paths:
Through D003/D004 - seems to be checked with voltages around U108
Guard driver not working well - checked with the gate signals
slow amplifier input - unlikely as this should not be voltage dependent
fast amplifier input - maybe if the fast amplifier does not work -> should be easy to check, reasonable working should be good enough
JFETs in the MUX - some checks possible, e.g. for the Ohms_sense inputs, Hi_div.
Other are a little tricky, but 1 nA * 10 K is still 10 µV and should be thus detectable on the low input.
However leakage toward the gates hard to check. At least the -17 V level seems to be OK (not too negative).
A possible check could be with changing the -17 V level for the gates a little (e.g. to -18 v or -12..-15 V): if this also shifts the leakage curve it would point towards gate leakage.
For comparison one could do a similar leakage test for the Ohms_hi input, to measure leakage at this input. With something like 1 MOhms or maybe 100 K with higher test current, one could have the cap from Ohm_hi to ground and than disrupt the connection to the resistor. However this would be only the negative side. Not sure if the DMM will record positive voltages on Ohm_hi and show the corresponding negative resistance values.
For the excess leakage below -5 V in AZ mode, this could be something like to much ringing on the DC / guard amplifier, or just a wrong / drifted value for C26 R083 (gate slow down). A smaller value for R083 might be worth a test. Also having the protection mode active could make a difference.
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Would be direct current measurement helpful, using the electrometer for example?
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maybe the 1nf cap used for these measurements acts funny at ca. 5-6 volts (maybe some kind of a diode action in junctions?)
best regards.
-zia
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One could do a direct current measurement with suitable pA/nA meter. However I don't think it would be very much different from the test with capacitor discharge. I don't expect an capacitor to behave that bad (except for an electrolytic maybe). The scale could be a bit off (maybe 10-20%) because of extra internal capacitance and at there might be a few 100 fA of current going to DA. External coupling could also add a bit of error in the initial phase when the hand is moved.
It might help to have some discharge curves from a well working meter. Even a well working meter might show enough input current to effect measurements with a higher impedance source. One does not know before checking it.
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I just did new testing by improving my LTZ1000 board, housing, twisting the cables to te meter, make an internal calibration and check again the polarity difference :horse:
I get now the same value :-DD
Not a bad meter and very happy with it :-+
Video on TiN server that show that I'm not telling "fake news"
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Hi, Mr.Kleinstein,
Thanks a lot!
Here are some photo of the gate test. The 1st is the detail of the ADIN overshot in +10v input. The 2nd to the 4th are the detail of PIN17/20 waveform at +10v input. It could be found some delay at the back of the AZ timing. The 5th to 10th are for the -10v input waveform of the ADIN/PIN14/PIN17/PIN20. It also could be found some delay at the front of the AZ timing. Do the delay imply some issues in it ?
I was testing a analog pcb from my friend ,which might have better performance than mine.
Best Regards,
szszjdb
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At first glance the overshoot in the first picture looks quite bad. However the possibly bad overshoot happens already well in the zero phase. So even if there is some gate current due to the gurad amplifier to slow, this would be only current at the ground pin. No it should not be real problem.
The more tricky one it the other slope.
The 3rd picture kind of gives that information. The rising red curve in the later stage should reflect the rising guard amplifier signal and this looks a little suspicious. Possibly the slow DC amplifier might have reached it's slew rate limit and during this phase might take some input current.
A simlilar limited slew rate when going up is seen in the 9 th picture for pin 17. Here it is obviously following the guard amplifier going up at a constant rate (no extra RC with R17, making this more clear).
I would check the DC voltages in the slow amplifier input stage and maybe the effect of the trimmer. The input stage working with too much or too low current could be a problem. A slew rate of around 0.25 V/µs could also be still from a rather slow sample of U107. The first picture seems to show a slightly higher slew rate for the ADIN (= DC amplifier out).
A possibly interesting point could be the rising edge of ADIN (and maybe guard / pin 20) with an input voltage of +10 V and maybe around +4 V (so in the range where AZ still works OK).
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Little bird show me photo of (later?) R6581T, which have DCV 300V PK MAX Input labels.
Seems like Advantest were not able to make up mind about 6581 specs for a while. :)
Video on TiN server that show that I'm not telling "fake news"
Well, I watched it, and Mr. eurofox misled us, as meter he has is 6581T , not the real 6581. No wonder Mickle.T. did not see any difference :palm: .
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Little bird show me photo of (later?) R6581T, which have DCV 300V PK MAX Input labels.
Seems like Advantest were not able to make up mind about 6581 specs for a while. :)
Video on TiN server that show that I'm not telling "fake news"
Well, I watched it, and Mr. eurofox misled us, as meter he has is 6581T , not the real 6581. No wonder Mickle.T. did not see any difference :palm: .
Maybe I'm wrong but R6581 or R6581T is the same basic unit, R6581T is not provided with the AC input and for some reason they limited the maximum DC input voltage.
In the menus all AC options are provided in the R6581T version.
I don't need AC input on a 8 1/2 digit meter
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Idea is that they are the same, but in reality lot of issues with T-units we all see here leave us wondering if real 6581 actually meet the specified specs and 6581T is just reject units, or actually there are design changes/different parts that give 6581 higher performance.
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Idea is that they are the same, but in reality lot of issues with T-units we all see here leave us wondering if real 6581 actually meet the specified specs and 6581T is just reject units, or actually there are design changes/different parts that give 6581 higher performance.
are the issues faced by Mickle T., szszjdb and you shared by eurofox, specifically the turn-over error?
regards.
-zia
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Idea is that they are the same, but in reality lot of issues with T-units we all see here leave us wondering if real 6581 actually meet the specified specs and 6581T is just reject units, or actually there are design changes/different parts that give 6581 higher performance.
are the issues faced by Mickle T., szszjdb and you shared by eurofox, specifically the turn-over error?
regards.
-zia
Advantest is a company with a very good reputation and I don't think that they classify high end instrument on the end of the assembly line, having myself managed a factory where electronic is assembled look ridiculous for me.
They probably sold more more R6581T to put in automatic testing configuration instead of the R6581 dedicated to lab. Reason why many of the R6581T have more service hours and prone to have defective parts, look to the display of most of the R6581T, some are on the edge of readability and this is a results of many service hours.
Sorry guy's my unit got a very bright display, perform wel on the polarity check. After a full external calibration I will be able to make accurate test of my unit.
eurofox
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I do respect Advantest for doing the meter in first place, but in my book high-end instrument is not just a piece of hardware, but also documentation (anyone see any document about 6581T?), service procedures and reliability of the internal and external calibration procedures. Yes, long service hours affect instrument aging, stability and bring wear and tear issues. Actually that what is making high-end instrument so, ability to sustain it's tight specifications over the time and use abuse. One can calibrate "cheap" 6.5d DMM and 8.5d DMM to same initial accuracy, but over 1 year, you will see why 8.5d is priced 10 times more.
Single 7V/-7V point does not tell us much, sorry. You need linear source or a reference meter with proven linearity (hello, 3458A/5440/720A-732 etc), to verify issues that multiple people see.
Don't get me wrong, R6581T is nice meter to have, but saying it's on par with other industry proven 8.5d ones is bit over-excitement (unless we find out exact root cause of performance issues).
Or maybe all of the R6581T that multiple people have here are simply broken in various ways, yet pass external and internal calibrations and self-tests, giving a false pass and out-of-spec results.
Running external calibration on Ohms, with 10000.0011 Ohm standard and getting 9999.8791 ohm as result is bit unsettling :).
Given simple statistics we should have at least one person here with R6581T which actually does meet R6581 specs? Maybe it's you? :=\
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maybe the "T" in R6581T stands for Tolerance? >:D
btw. does anybody have a source for the display used in the meter?
-zia
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btw. does anybody have a source for the display used in the meter?
I found only this way: http://bbs.38hot.net/forum.php?mod=viewthread&tid=2014&extra=&page=1 (http://bbs.38hot.net/forum.php?mod=viewthread&tid=2014&extra=&page=1)
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btw. does anybody have a source for the display used in the meter?
I found only this way: http://bbs.38hot.net/forum.php?mod=viewthread&tid=2014&extra=&page=1 (http://bbs.38hot.net/forum.php?mod=viewthread&tid=2014&extra=&page=1)
wow.
imagine the 10-year cal-cycle with a display like that !
-zia
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I do respect Advantest for doing the meter in first place, but in my book high-end instrument is not just a piece of hardware, but also documentation (anyone see any document about 6581T?), service procedures and reliability of the internal and external calibration procedures. Yes, long service hours affect instrument aging, stability and bring wear and tear issues. Actually that what is making high-end instrument so, ability to sustain it's tight specifications over the time and use abuse. One can calibrate "cheap" 6.5d DMM and 8.5d DMM to same initial accuracy, but over 1 year, you will see why 8.5d is priced 10 times more.
Single 7V/-7V point does not tell us much, sorry. You need linear source or a reference meter with proven linearity (hello, 3458A/5440/720A-732 etc), to verify issues that multiple people see.
Don't get me wrong, R6581T is nice meter to have, but saying it's on par with other industry proven 8.5d ones is bit over-excitement (unless we find out exact root cause of performance issues).
Or maybe all of the R6581T that multiple people have here are simply broken in various ways, yet pass external and internal calibrations and self-tests, giving a false pass and out-of-spec results.
Running external calibration on Ohms, with 10000.0011 Ohm standard and getting 9999.8791 ohm as result is bit unsettling :).
Given simple statistics we should have at least one person here with R6581T which actually does meet R6581 specs? Maybe it's you? :=\
I don't have the "tools" to calibrate and test on the long run my instrument and I don't pretend mine is better but on the polarity check it perform well even better than some of your 3458A.
With respect to internal testing I have the impression the this test is very basic, it is to fast to be an advanced test and can probably not detect all issues of the instrument.
I google to try to find <> of the R6581 and R6581T but information is very limited.
Fortunately the front panel key system is "so logic" that you don't need a manual to use the instrument much user friendly than the 3458A.
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I'm afraid this is going to some sort of holy war, which is not necessary, so I'll shut up after this post. Most of information about 6581/6581T differences discovered by Mickle.T who did great job unveiling the design and functionality of these. I was talking about any official documentation from Advantest about T-version. Without it we are left speculating and applying 6581 specifications to the 6581T model (as from what we seen, both meters share same platform).
If I calibrate 3458A versus external standard I get meter to meet it's 15 minutes transfer spec, no worries there. However my (broken) 6581T unable to meet 1 year spec right after cal? Hmmm :popcorn:.
Fortunately the front panel key system is "so logic" that you don't need a manual to use the instrument much user friendly than the 3458A.
Just a matter of habit. I found 3458A very easy to use after programming macro onto numeric keys, so I can get 99% of modes and functions I want in click of two buttons.
Bling should not be the reason for performance tradeoffs, we are in metrology section after all :)
Looking forward to your ext.cal results.
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I'm afraid this is going to some sort of holy war, which is not necessary, so I'll shut up after this post.
hey lighten up guys. no WAR only PEACE. (imagine that coming from a Pakistani :-DD)
on a more serious note:
it looks like R6581T is the model specifically designed/selected to go into automated Test racks,
and i think all of the units are coming from some kind of testing setup.
has anybody evaluated the linearity using a fluke 720a kvd? maybe make some kind of a correction table in software?
best regards.
-zia
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I'm afraid this is going to some sort of holy war, which is not necessary, so I'll shut up after this post.
hey lighten up guys. no WAR only PEACE. (imagine that coming from a Pakistani :-DD)
on a more serious note:
it looks like R6581T is the model specifically designed/selected to go into automated Test racks,
and i think all of the units are coming from some kind of testing setup.
has anybody evaluated the linearity using a fluke 720a kvd? maybe make some kind of a correction table in software?
best regards.
-zia
Nobody here have to intention for an "holly war" and I'm not religious at all :-DD
I got in the past a HP3458A as well several years ago, I lost it because of Russian mafia, long story but true, according to police/court my money when to Russian account, don't ask me how is a long story and I prefer to forget it since this money is lost anyway :palm:
It seems that the few owner of R6581/T got problems with the instrument, it seems that there NO evidence based on information available that there is a difference between the "base" of the R6581 and R6581T, is the same firmware, on the R6581T all feature to manage AC input is available.
I was maybe lucky, the instrument that I scored is like new, no scratches, display is bright (visible on the video), battery was dead.
This instrument was never put in an industrial environment (coming from the industry I know how people behave with instruments) and I think it spend most of the time on a shelf unused.
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It seems that the few owner of R6581/T got problems with the instrument, it seems that there NO evidence based on information available that there is a difference between the "base" of the R6581 and R6581T, is the same firmware, on the R6581T all feature to manage AC input is available.
well,
an obvious difference is the "T", i have seen japanese manuals and spec. sheets (again japanese) they refer ONLY to R6581 and R6581D, no T anywhere to be found.
a lot of component specification testing goes into manufacturing these 8.5d buggers, and a lot of variance in component selection is there, even the ref module
on an hp 3458a (seemingly simple LTZ1000 ref module) has a couple of versions available at *wildly* variable costs.
it does look like, that the specification for R6581T *is* different and it is a fallacy in my humble opinion to hold it against the R6581 or R6581D specs.
best regards, and always a pleasure to read *fantastic* pieces of knowledge shared by you guys.
-zia
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I did the same test of yesterday and get exactly the same values ....
Now yes we could say that my LTZ1000 board was changing and exactly the same way the R6581T ... |O
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It seems that the few owner of R6581/T got problems with the instrument, it seems that there NO evidence based on information available that there is a difference between the "base" of the R6581 and R6581T, is the same firmware, on the R6581T all feature to manage AC input is available.
well,
an obvious difference is the "T", i have seen japanese manuals and spec. sheets (again japanese) they refer ONLY to R6581 and R6581D, no T anywhere to be found.
a lot of component specification testing goes into manufacturing these 8.5d buggers, and a lot of variance in component selection is there, even the ref module
on an hp 3458a (seemingly simple LTZ1000 ref module) has a couple of versions available at *wildly* variable costs.
it does look like, that the specification for R6581T *is* different and it is a fallacy in my humble opinion to hold it against the R6581 or R6581D specs.
best regards, and always a pleasure to read *fantastic* pieces of knowledge shared by you guys.
-zia
You should show really facts not your impression based on a manual in Japanese because there is no specification on the T version, I have it as well and use software translators since I don't speak Japanese language.
When you switch it on it is "R6581D" why?
I wonder if you have a R6581 with or without T?
eurofox
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Presto ! Please raise your hand whenever did you bought your R6581T *new* from authorized dealer. Anyone?
I guess the R6581T was the low cost 8.5 DMM to be use as cannon fodder for automated torture test when you don't want to risk your proven 3458A unit(s). And as eurofox said almost all second hand units have those torture test hours clearly visible on the (extremely dim) display. If some company had several 6581T units, the unit that goes out to sell is that old faulty-unreliable-broken unit. As simple as that.
If anyone bought the unit new and detected all those issues (6.5 DMM performance? WTH!), then it could have called directly the distributor or manufacturer to blame them all and ...
Life goes on ... Anyone is kind enough to summarize all previous testing and write some simple tests for dummies. Does R6581T have test points? is that documented anywhere? If someone is so kind, maybe I will be willing to help with all (our) issues. But don't know if I will be of any help as I don't have scope now.
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i have asked the adcmt company for the specifications sheet for the T version, so let us keep our fingers crossed.
i agree with you, the specs may turn out to be exactly like R6581/D or maybe not, or not available at all.
i have'nt seen any calibration sticker on R6581T, has it been calibrated / tested / verified at any national lab? if so the specs should be available,
if the specs are not available at all, or are only available to adcmt as part of a bigger system, then trouble.
regards.
-zia
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i have asked the adcmt company for the specifications sheet for the T version, so let us keep our fingers crossed.
i agree with you, the specs may turn out to be exactly like R6581/D or maybe not, or not available at all.
regards.
-zia
Maybe you missed my last message because I edit it, I double check and when I start the instrument it indicate R6581D why?
eurofox
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afaik R6581D is for DC only
my R6581 says R6581 and has AC function
(https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=409331)
Edit: removed AC board, now it shows R6581D as expected
(https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=409542)
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i have asked the adcmt company for the specifications sheet for the T version, so let us keep our fingers crossed.
i agree with you, the specs may turn out to be exactly like R6581/D or maybe not, or not available at all.
regards.
-zia
Maybe you missed my last message because I edit it, I double check and when I start the instrument it indicate R6581D why?
eurofox
no idea, maybe the firmware used is the same and specifications are different, but it definitely looks like a dvm with a long calibration cycle.
regards.
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Hi, Mr.Kleinstein,
Thanks a lot!
Understood that the current leakaged from the control gate of the JFET switch. That must be !
I tested the ADIN with the PIN20 and PIN27(GUARD) of MUX and recorded the front of the signal period . The input voltage changed from 10v to 7v and 4v to cover the full range. Attached FYI.
EDIT: The bias of the slow JFET is about 0.5ma tested before. And the trimmer is for the zero adjust of the slow JFET amplifier. Both seems no issues.
Best Regards,
szszjdb
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my R6581 says R6581 and has AC function
(https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=409331)
Any chance you can dump firmware for us, please? :-DMM
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Any chance you can dump firmware for us, please? :-DMM
no problem, I already gave a copy to Mickle and I can send you a copy too
But afaik my firmware version is already on your Server
If not just send me a Mail.
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Thank you, szszjdb, for new curves.
They clearly show the limited slew rate. Needing up to some 200 µs for switching and rising the voltage back looks rather slow to me. This would add a considerable delay to the measurement. So I wonder if this is normal. Besides a limitation of the amplifier, this could also be a limitation of the JFET switching: During turn on the guard driver gives a voltage that essentially follows the source voltage and thus only little higher than the gate voltage. So the current provided by the 100 K resistor to charge the gate is relatively low. It might thus take long to charge C026.
From the initial rise of the gate voltage I would estimate (C026+C_gate)*100K = 10 µs and thus around 100 pF.
So it would take some 2 V at the 100 K and thus 20 µA to get the observed 0.2 V/ µs. So it could be just a limitation due to C026.
Thus the slow switching might be just normal. Maybe too slow in some meters (e.g. due to threshold variations with the JFETs in the MUX).
I mixed up things a little in my last response. So the test with +4 V to +10 V of cause did not show the transient problem during AZ switching. This happens with a negative input. So the curves don't help much in finding the AZ problem. They just help to understand how the timing during switching works.
Leakage due to a gate biased foward during switching is at least one possibility for the extra leakage in AZ mode. However so far I can not see an indication for this.
Another possibility could be if for some reason the JFETs for DCV_in and Lo on phase overlap a little: this could happen at a very negative input voltage, as it requires the gate voltage to get very negative to turn off. Too large a value for C026 and/or R083 together with a high threshold could cause this. A reduced value for R083 (e.g. a second 10 K in parallel) could be worth a test. The old picture NEG10_PIN17(Y)_PIN20(R)_FRONT_9.jpg might point to this direction: the connection to the input might not be totally off, when the channel Lo turns on. It's not clearly visible, but it looks like it could be close to the edge.
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Found a very strange behavior of 6581 A/D converter :-//
While shifting ADC zero with 898 kOhm resistor, hot connected to the V-to-I converter's opamp U200 (pin 2 - current summing point), I was able to correct INL and rollover error in 1-1.5 0.5-0.7 ppm range. The minimum error was reached at 25 uA extra current (898 kOhm, connected to -27 V supply), which corresponds about -0.5 V ADC zero offset. Of course, with a such huge offset DMM can't start and do ACAL without error.
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This is the answer I got from my email request to ADC corporation ....
Thank you for your inquiry.
First of all, R6581T was made custom made model for ADVANTEST.
Therefore we can not provide R6581T to general market.
If you need R6581T and manual of it, please contact ADVANTEST sales department in Europe.
And We are provide 6581 to market. but this 6581 don't have English documents.
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The effect of added current is a little strange. Normally just an added current to the input would correspond to an added offset and should not have a direct effect on INL. So far my best guess for a nonlinear effect (to compensate the INL) in this case would be via a change in the -27 V supply.
Does a similar current coming from the -19 V reference (resistor around 600 K) have a similar effect ?
If the compensation is not just pure luck or tuning the resistor to get zero error at the few observed spots - it could be a change in the -27 V to cause the observed INL. Changes in the supply could be one way of getting nonlinear effect in the low ppm range - however so far I see no obvious path with poor PSRR. The small offset at the comparators inverting input (R260,R261) could be one path where the supply could have an effect, but I doubt it would be much.
A systematic test would be measuring the effect of a change in supplies on the result and the effect of the input voltage on the supplies. By measuring in two steps one should be able to see even small contributions to INL, as usually both steps should give error attenuation. Most (ideally all) of those paths should not give much of an effect, but one could at least eliminate these possible error paths.
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Hi, Mr.Kleinstein , Mr. Mickle T,
Thanks a lot!
I retested the ADIN with the PIN17, PIN20 and PIN27(GUARD) of MUX and recorded the front of the AZ period at the input of -10v , -7v and -4v . From the photos of PIN17 vs PIN20(Photo No. 4,5,7) , it might have the change of the overlay conducted of both JFET for AZ and DCV switch. How about remove the R083/C026 to accelerate the turn off of the DCV JFET? Attached FYI.
The analog PCB under testing is borrowed from my friend and I can not modify any thing on it. I will try the change of R083 on my PCB later.
Would like to have your further advice!
For the INL of ADC , there might have issue with the U214, switch of the CINT ? How about the Ron of the switch , which might count to the DA?
Best Regards,
szszjdb
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The file * NEG10_ADIN(Y)_PIN20(R)_AZFRONT-3.jpg could show some indication for cross conduction: that initial faster rise of ADIN could be from the input connection still turning off. One might be able to see the current at the LO input (pin 10).
For a test one might be able to add a little capacitance (e.g. 20 pF range) to C26 with a probe, so without soldering. If this makes the AZ leakage worse it would give some indication.
C26 and R83 do make sense, so removing them would not be a good idea. One might however try something like a smaller value for R83 to speed up the turn off of the input. The downside could be a stronger spike at the input as the switching would be faster. It likely would not take much to prevent cross conduction so even a small change could be all it takes. Similar just a little more capacitance could cause cross conduction. So with the first board one could do a test with maybe an extra 50 pF to provoke the cross conduction. A much larger R83 would not allow the FETs to turn off at very negative input voltage.
For the ADC I don't think the R_on of U214 would be a big issue as the time constant would be rather short (e.g. 100 Ohm * 20 nF = 2 µs) compared to the time for the rundown. With U214 I would more worry about coupling capacitance that could influence the fast mode. However the fast mode is not that high resolution and INL is less of an issue here.
With a reasonable 2.nd meter one could do checks on some of the supply voltages, if they change with input voltage. The +-5 supply of the comparator could be worth checking in this respect.
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Little bird show me photo of (later?) R6581T, which have DCV 300V PK MAX Input labels.
Seems like Advantest were not able to make up mind about 6581 specs for a while. :)
Video on TiN server that show that I'm not telling "fake news"
Well, I watched it, and Mr. eurofox misled us, as meter he has is 6581T , not the real 6581. No wonder Mickle.T. did not see any difference :palm: .
As far as I know, the R6581T with date code 03xx or 04xx on the ICs have DCV 300V PK MAX Input labels.
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Hello guys,
I just got my R6581T last week, and I want to know the linearity of this DMM compare to HP3458A.
Here is the result I get.
forgot to mention the PLC of 6581 I used is 100.
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short-term stability verify:
source: fluke 731B, 0.1-10Hz noise is 1.4uVpp
and check the attached files for more results
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hello friends,
can anyone explain the oddity in the following pictures?
-zia
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hello friends,
can anyone explain the oddity in the following pictures?
-zia
You mean the custom rack mount? Perhaps they had some kind of shield to protect the inputs from draughts and/or factory workers accidentally unplugging leads and putting them back wrong? :-DD
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Hi, Mr.Kleinstein , Mr. Mickle T,
Thanks a lot!
I had added a 50p COG cap on the C26, but found no obvious change with the -10v bias test at AZON mode. The time to discharge from -10v to -4v is about 1.54s for both with and without the 50p cap. Attached the xls file, FYI.
I also tested the +5v of the U208 and it is about 4.78650v with 0.2-3mv noise on it. Is that normal?
Further check with the new analog PCB shows that the INL is much better than mine, which has the max. around 0.47ppm in the positive range. The bias current is smaller and so the error of the totally reading to the sum of the resistor voltage become small enough to around 15uv , which is about 130uv in my old analog PCB. It proved that the bias of my old pcb is too large compared to the new one.
The 6581 has 2 record named with 6581-1 and 6581-2 in the picture. Also attached FYI.
Would like to have your further advice!
Best Regards,
szszjdb
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more results coming...
the linearity is not bad when using negative polarity input.
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more results coming...
the linearity is not bad when using negative polarity input.
Maybe a good idea is to check the voltage PPM <> when you change polarity.
The calibration sticker show last calibration in 2005 valid for 10 years :palm:
This instrument is in 2018 not calibrated during the last 13 years :palm: :palm:
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The negative polarity range really does not look that bad - for both the meter from Pipelie and szszjdb.
The odd thing is the kind of jump near zero and the poor INL in the positive side. So far I don't really see a point that is changing so abrupt when going from negative to positive. There is this split in the calibrator, but there is still a difference when you look at the difference to the 3458. So it seems to be more than just the step from the calibrator.
For the INL due to R200 (e.g. self heating) there is kind of sweet spot around -2 V. So some reason to get better values for the negative side, but not that much. It would be more like a contribution symmetric around -2 V.
Otherwise I don't see much special with the range around zero: The current source at the input of the ADC is at about the middle of the range, where no abrupt change is expected. The run-up cycle feedback is about 50:50 PWM for S1024 and thus far from settling times. The amplitude for the integrator output swing would be the largest, but this would be a broad maximum around 0 and not like a step change from negative to positive. The AZ switching would change from up to down, but it should be relatively fast in both cases. So I doubt that there is trouble with insufficient waiting times after switching. The rundown phase should be longer (e.g. 200 µs minimum, likely more) so that there should be sufficient time, even at high voltages where switching can get surprisingly slow. Mickle has probably already checked the relative timing of AZ switching and rundown.
For the long time since last CAL, it depends on the applications. In some cases you may not need a calibrated meter, and with higher speed measurements the cal requirements are not that stringent as resolution limits the accuracy. The more important point would be to check those modes for something like settling time if not done properly in the self test. The odd thing is that there are usually no accuracy ratings for a 10 year cal cycle.
They seem to distinguish between an external and internal cal. So there might have been less stringent calibrations to an internal calibration (e.g. to a 10 V ref only) in between.
@ szszjdb:
The discharge curve shows really high currents at high voltage. However this is the negative sign and thus the side where INL measurement is good. So input bias does not seem to be the main source of INL error. So this might be 2 separate problems.
Depending on the BW a 3 mV of noise on the 5 V supply of U208 would be normal. The interesting point would be if this voltage for some reason changes significant with input voltage.
With the 3458 available one could do an INL test for only the ADC: use the 3458 to measure the voltage at the AD_IN test-point (TP200). The test would have to be without AZ - so it could still be a little different from the normal AZ mode results. The ADC itself uses a second internal zero mode and should thus show very little drift.
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This is what I get on my R6581T:
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For the long time since last CAL, it depends on the applications. In some cases you may not need a calibrated meter, and with higher speed measurements the cal requirements are not that stringent as resolution limits the accuracy. The more important point would be to check those modes for something like settling time if not done properly in the self test. The odd thing is that there are usually no accuracy ratings for a 10 year cal cycle.
I just wonder why you need a 8 1/2 digits meter in this case since a 5 1/2 digits is good enough if precision is not critical.
Is like buy a Ferrari to drive only in the city with maximum speed is 50KM/h |O
Well at least you can use the Ferrari as a "girl catcher" but with a multimeter I don't think you can catch a girl :-DD
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more results coming...
the linearity is not bad when using negative polarity input.
Maybe a good idea is to check the voltage PPM <> when you change polarity.
The calibration sticker show last calibration in 2005 valid for 10 years :palm:
This instrument is in 2018 not calibrated during the last 13 years :palm: :palm:
My DMM comes with manufacture's calibrated seal.
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This is what I get on my R6581T:
turn off the AZ, and check again. or use a low output impendence voltage source to do the test.
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more results coming...
the linearity is not bad when using negative polarity input.
Maybe a good idea is to check the voltage PPM <> when you change polarity.
The calibration sticker show last calibration in 2005 valid for 10 years :palm:
This instrument is in 2018 not calibrated during the last 13 years :palm: :palm:
My DMM comes with manufacture's calibrated seal.
Calibration sticker 13 years ago ....
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This is what I get on my R6581T:
turn off the AZ, and check again. or use a low output impendence voltage source to do the test.
I just check it without AZ and get the same results.
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I just looked a little more in detail on the zero phase and especially the AZ capacitor. I might have found a possible source for nonlinearity:
During the measurement the bias of the OP (U205 = OP177) current charges the AZ cap. With something like a typical 1.2 nA into 35 nF during 200 ms this can be something around 7 mV. This voltage would alter the lower current sources during rundown, as there are only resistors for the currents. So this would result in a small error that depends on the rundown phase - so kind of some short scale wiggles or DNL type error. However it should be a small error only: 10 mV applied for maybe 10 µs during rundown are only about 0.05 ppm of 10 V applied during 200 ms run-up.
So it might be a just visible error in a well working meter and C208 is probably well chosen. An offset adjustment at U205 might help with ultimate performance though.
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This is what I get on my R6581T:
turn off the AZ, and check again. or use a low output impendence voltage source to do the test.
I just check it without AZ and get the same results.
The pictures ...
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Hi, Mr.Kleinstein , Mr. Mickle T,
Thanks a lot!
The +5v of the U208 will not chang with the input, sure! The c026 is 100p and found nearly no change when adding 50p on it in the negative bias test, why?
I found a cap broken on my old analog PCB , the C120 about 3.3nf, and replaced it with the similar one. And assembled back the analog PCB to my 6581 box. After done some bias test , it seems like the new analog PCB and even better than it. The Rin is about 2G in negative input and 11-22G in positive input. Attached FYI.
Then I re-do the INL checking , the INL became much better than before. The turnover check is also not so good ,but better than before. Please refer to the data in the INL test.
What is happen on it ? I will double check the result tomorrow night. Attached also FYI , together with the new analog PCB INL test.
Best Regards,
szszjdb
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I can not locate C120 - but from the number I would guess it should be somewhere in the amplifier stage. A failing / wrong value cap could cause more ringing and this way problem on switching.
There is a chance that bending the board (e.g when removing the board) might change things. Especially ceramic caps can be sensitive. Connectors / pots might sometimes get better on movement. So it is possibly to somewhere have something like a cold solder joint, or band contact / cracked part.
Another thing that might change is the GND contact to the chassis. Ground loops over such contracts might be source for INL. However I would not expect such a blunder in der layout. However it may be that higher frequency "noise" / switching glitches to change, depending on the ground contact quality.
There is also the possibility that mechanical stress could effect some of the resistors and maybe also FETs (shift threshold). The longer Resistor networks like R201 or R213 might be somewhat sensitive, but that should not effect INL very much (more like DNL).
Adding 50 pF to C026 would slow down switching a little more, but this might not result in that much more trouble.
Reducing R083 would be a way to speed up the turn off, though at the cost of possible higher current spikes at the input.
The AZ mode leakage looks somewhat bad over the whole range and not just above a certain voltage like with the other board. One might have to look at the switching waveforms again, to see if the error is more like
- trouble with the guard
- too positive a gate voltage in some cases (e.g. from amplifier ringing)
- cross conduction because off to slow turning off or too fast on
Cross conduction might be visible as current through R21, Pin 10 of the MUX.
The input current can be calculated over much shorter time frames (down to adjacent readings). This shows if the leakage is like a constant resistance or more like extra leakage above some threshold. As far as I did calculations the resistance seems to be lower at high voltages.
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C120 is film SMT cap near DG442DY by the left of the MUX hybrid.
I did a patch like Mickle.T. suggested to fix relay overheating issue, and now my meter have better matching for +FS/-FS on 10V range. E.g. my 792X reference (LTZ)
Positive 6581T: 10.0000118 V
Reverse 6581T: -10.0000158 V
Delta = 0.4 ppm.
I also compared firmware images from FTP and my unit (R6581_U102_EPROM0_27C4096_SIS004245_A02_sw.BIN (https://xdevs.com/doc/Advantest/R6581T/fw/R6581_U102_EPROM0_27C4096_SIS004245_A02_sw.BIN) and R6581_U103_EPROM1_27C1024_SIS004246_A02_sw.BIN (https://xdevs.com/doc/Advantest/R6581T/fw/R6581_U103_EPROM1_27C1024_SIS004246_A02_sw.BIN), I assume these are from quarks) and they are binary identical. Perhaps T-version meter have different GAL/PAL ROM or strap resistor pullup/down to detect as "T" somewhere?
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I can not locate C120 - but from the number
Sorry, it's my bad :( C213.
I have a more fresh DMM with another firmware version numbering, but unfortunately I don't have EPROM reader :(
The answer from ADCMT apps engineer:
Thank you for your inquiry.
R6581T was presented to market as affiliated equipment for IC Test
System by ADVANTEST.
Please contact and request for the data sheet with ADVANTEST.
:palm:
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I can not locate C120 - but from the number
Sorry, it's my bad :( C223.
The answer from ADCMT apps engineer:
Thank you for your inquiry.
R6581T was presented to market as affiliated equipment for IC Test
System by ADVANTEST.
Please contact and request for the data sheet with ADVANTEST.
:palm:
I got a similar answer from ADCMT advising me to get in touch with Advantest in Europe.
I got an answer from the assistant of the general manager of Advantest asking Rohde & Schwarz to answer on my email with respect to the <> of R6581 & R6581T.
eurofox
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Interesting thing I found on my 6581T. Diag mode values are not reported correctly:
DIAG INTERNAL Check ,
x1Zero_1 FAST = -0.0230 (OK)
x1Zero_1 PRECISION = +2.947131 V
x10Zero = +294.608 mV
x100Zero = +29.488 mV
7.2VREF = 10.0248870 V
-10VREF = -6.88450 V
-1VREF = -687.868 mV
-0.1VREF = -68.755 mV
Int_temp = +63.46 C
Current checks are not right either, most show around 6.88 ratio smth (e.g. 10uA is -6.885 uA)
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Hi, Mr.Kleinstein and Mr. Mickle T,
Thanks a lot!
After re-checked the INL and used the 3458 as the reference, the INL looks more reasonable than yestoday. The err is max. 0.4ppm in the positive side for 6581 vs 0.1ppm for 3458. Attached FYI.
I have to mention that I have changed the Q102 and Q104 to U401 before beside replacing the C120. That might reduce the bias to the normal.
Now the old analog PCB is more like the new one. I will check the timing of the control gate of the MUX tonight.
Best Regards,
szszjdb
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Hi, Mr.Kleinstein and Mr. Mickle T,
Further test with the control gate of the MUX PIN17/PIN20/PIN10 with ADIN. No odd point found.
I have also change the R83 from 10k to 68k or 1k and can not find visualble change both in the waveform of the gate test and the negative discharge test . It seems the 10K is better in the case.
The photo No.1-3 are for PIN17/20 and No.5-8 are for PIN10 with 10k/68k of R83. Attached FYI.
Would like to have your advice.
Best and Regards,
szszjdb
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The AZ-Back curves (no 5 and 7) show a significant overshoot for the amplifier output. This could cause the gate voltage on pin 20 to go well above the -10 V level and thus cause gate current to the input. I am afraid the capacitor is not enough to prevent this. The data from Pin 20 for the back case should give that information.
I would not expect a significant larger resistor for R083 to work, as this would not allow the gate to go negative enough to fully turn off with a very negative input. If at all a slightly small value could help a little in some cases.
One could likely test the amplifier on it's own with a square wave signal at the input in non AZ mode. If there is a lot of ringing this should be fixed. Different FETs for Q102 could have an influence (e.g. higher trans-conductance and thus higher gain - which would be good for low noise, but could cause ringing). The speed of U104 could also be a factor to effect ringing - so some units might be better than others. If ringing is a problem one could likely improve on this.
The current to ground via pin 10 (e.g. pic 6) looks a about normal: first a positive peak due to the gate going positive (-18 V to around -12 V), so coupling through gate capacitance. After that the slightly negative values from charging the DCV amplifier and rest of MUX circuit. The initial negative peaks looks a bid big and might include some cross conduction, but it could be just due to the steeper slope. The final positive peak with ringing is a bit odd. It includes the gate voltage rising above the threshold. The ringing could be capacitive coupled from the DCV amplifier ringing.
The front edge curve is mainly the large peak from a fast gate discharge. The small lager wiggles are very small, so I don't think they would be relevant and may also be just noise pick-up.
Are those test with the PROTECT on (the extra capacitor at the input) ? This might be needed in AZ mode to reduce the current spikes to reach the output and this way react to odd things like cable lengths.
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Hi, Mr.Kleinstein,
Thanks a lot!
All the test with the PROTECT off and GUARD low setting in AZ mode. I also notice something odd with the bigger noise in the reading when in INL test by resistor mode.The resistor string is powered by the LTZ10V with battery and the reading should have the same noise performance with LTZ10V(around 1uv), but sometime reached 5-6uv max.. So I was wondering if the protect cap will leading to that , then just turn off the PROTECT and set GUARD low, but no obvious change. Anything missing?
Best Regards,
szszjdb
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I got better resistors for 1 and 10M ohm at 1% now, calibration is done internally that is certainly not the best.
1M ohm
range 1000K 1000.635
range 10M 1.000611
range 100M 1.00062
range 1G 1.00xx xx = not stable
10M ohm
range 10M 10.089
range 100M 10.089
range 1G 10.091
eurofox
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Hi, Mr.Kleinstein,
Thanks a lot!
All the test with the PROTECT off and GUARD low setting in AZ mode. I also notice something odd with the bigger noise in the reading when in INL test by resistor mode.The resistor string is powered by the LTZ10V with battery and the reading should have the same noise performance with LTZ10V(around 1uv), but sometime reached 5-6uv max.. So I was wondering if the protect cap will leading to that , then just turn off the PROTECT and set GUARD low, but no obvious change. Anything missing?
Best Regards,
szszjdb
Like with other amplifiers the input of the DMM will have some current noise, not just voltage noise. In the AZ mode there is a good chance the current noise can depend on the DC voltage. Near zero voltage might be s sweet spot. There is a good chance the higher than normal input current is also paired with higher than normal current noise. Having a noise in the 5 µV range with something like a 20-50 K input resistance would mean an input current noise in the 20-50 pA(eff) range. This would be quite a lot and quite poor with higher impedance sources.
The extra capacitor from the protect mode can help to reduce current spikes reaching the outside. So I would expect it to be better to have the Protect mode on when using the AZ mode - up to the point of having this as a requirement. I don't understand the naming for the Protect option - to me this is more a bit of input filtering. So I would expect some possible improvement with the protect on, but it seems to not help much.
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Hi, Mr.Kleinstein,
Thanks a lot!
I checked the response of the DC amplifier at ADIN with square wave input and found normally with no ringing. Attached FYI.
The discharge test show that the Rin at 9V is about 1.87G, 1.25G and 0.62G , corresponding to the 10K, 1K and 68k value for R83. So I said the 10K might be the best pair for the 100p.
Then I tried to add the C26 to 1Nf and found obvious improvement in the Rin at 9v. It reached 2G vs the old 1G at 9v point. Attached also FYI.
Further waveform test with the gate shows that the speed of the DCV gate is slow down. That might lead to the AZ switch opening before the DCV switch closing ,thus reducing the current flow to the AZ resistor. Right?
But the waveform of the back edge of the ADIN show more ringing. Is that OK?
Would like to have your further advice!
Best Regards,
szszjdb
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The square wave curve dues show quite some undershoot. However the ringing is not resolved to the low horizontal resolution. However there seem to be no overshoot - so it could be a problem on limiting, not just the (linear) compensation, which would be symmetric.
The picture ADIN(Y)_PIN20(R)_AZON_BACK-3.jpg also shows clear undershoot. The odd thing is the gate voltage is still going up smooth, so the filtering with C026 seems to be enough. A strong overshoot, that is not filtered out by C026 might be a problem, as it could cause leakage to the gate. So far it looks like there is sometimes quite some overshoot, but C026 is still good enough to filter that out.
However things might be worse when doing current or resistance measurements: here there is not extra delay from C026 and thus trouble is expected with significant overshoot - this could for example be the cause of the trouble with the 1 M resistor measured in different ranges. So preferable there should be less ringing with the amplifier.
The odd thing is the ADIN_Back-3 curve showed today looks completely different (much better) to the tests before, when looking at pin 10 instead of pin 20. Looks like this curve is with a larger C026 and thus the FET turning on very slow so that there is less undershoot and less overshoot too.
The input current is highly voltage dependent. So it does not make much sense to show an effective resistance. I would take something like the slope of the discharge curve over a much smaller range (e.g. 2 readings) and give the current values for a few voltages to look at, like -8 V , - 5 V and - 3 V.
Again - R83 much larger than 10 K would not work as it would not allow to turn off at -12 V anymore. So if it needs to be a bit slower it would be about increasing C26. 1 nF is likely too large, but may be OK for a test. This test clearly showed that the is a kind of timing problem with the switching, as slower switching is causing less input current. However making C26 larger might solve the possible trouble on the "back slope", it could cause trouble at the front slope in that Pin 20 is turning off fast enough. So my guess would go towards a slightly larger c26 and slightly smaller R083 (e.g. 220 pF and 3.3 K). Thus the input channel would turn on a little slower due to C26 and turn off a little faster due to smaller C26*R083. In addition one might have to add a way to speed up the downward direction when the guard voltage is dropping fast. This could be something like 5 K and a diode ( kathode towards guard) in series between the guard (=pin28) and pin 20.
The test with the 1 nF cap seems to indicate that the problem is more with the back slope and not with the front slope.
However having 1 K for R083 also looks like a small improvement.
So there might be problems at both ends and also the overshoot problem is still possible with the original 100 pF in place.
I guess it would be a good idea to check a simulation of the input stage to get an idea of what performance to expect and where possible fixes for overshoot could be. For me that amplifier is a bit to complicated to do that on paper. relying on the compensation of the OP07 could be a problem though as it would requite a good model for that OP.
Edit:
I did a short simulation, but I still miss a suitable model for the U401. With 2N3819 used as JFETs, the circuit kind of works, but it shows a tendency to not so well behave when recovering from large steps. This would kind of supports the observed large overshoot after negative saturation and better behavior when in the linear range.
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Hi, Mr.Kleinstein,
Thanks a lot!
The difference waveform of the AZ back edge is due to the 1NF cap, which smooth most of the overshot of the PIN20, the gate of the DCV control JFET. Pls refer to the Photo 1 , the overshot reached for about 3V, which leading to large charge injection to the DCV channel. When change C26 to 1NF, the overshot is reduced to around 0.8v, so reduce the effect of the gate charge injection. However it is small, it become forward biasing of the G-S or G-D. That is normal? Whcih might leading to the forward bias? Pls refer to the Photo 3-5.
The best try of R83 is 10K from my testing. The front edge of AZ is not critical as the DCV channel turn off so fast and the gate of AZ JFET turn on slowly due to the slow slope of the guard U107 output.
All the timing is same for the positive and negative input , so why there has huge different from the bias current ? Anything missing?
Best Regards,
szszjdb
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I did a simulation of the amplifier and also the switching parts. Though with different JFETs and slightly simplified is does gives curves rather similar to the measurement. However quite a few configurations refuse to simulate all the way and stop.
In the simulation there is some current from a forward biased gate ("pin 20") and it takes about a 1 nF to make the transition slow enough and shift the voltage for which this leakage occurs to about -8 V. So this would suggest this behavior might be kind of normal and may not be due to a defect. The type of FET can also have an effect - so it might be the usually rather large parameter scattering with the JFETs that make some units work and some not so well.
As the curves look about the same, a would expect the extra input current due to the gated current due to forward bias during transition (Zero -> DCV with very negative input).
The weak point causing this is that the amplifier is relatively slow, especially the slew rate is limited by the OP07 (the one in the precision channel and the extra buffer for the guard). The limited slew rate and typical BJT input of the OP07 also makes the clamping diodes at the input less efficient: the OP reaches it's maximaum slew rate already at some 50 mV, well before the diodes come into action. This results in quite some overshoot when coming out of saturation, possibly even sustained oscillation (once triggered by a large step) in some cases of the simulation.
With this slow amplifier it would take something like C026 = 1 nF maybe even a bit more. This would reduce the overshoot for the gate voltage enough.
A possible alternative could be exchanging the OP07s (U107 and U104) with some faster OPs. These OPs don't need to be super precise like the OP07. U107 is just configured as a follower and should thus not cause problems with a somewhat faster type.
The simulation had no problem with a faster OP (LT1056 tested) for U104. So chances are, the real circuit could also work with a fast OP. Having a JFET OP for U104 would also result in the slew rate limit to be reached with a much higher input voltage and thus only after the diodes engage. At least in the simulations the amplifier worked much better with the LT1056 when coming out of saturation. I have not simulated the higher gain modes, but usually those should not be that critical.
I choose the LT1056 for the simulation because the models are included, but I would expect similar JFET based OP like TL071 to also work. The main point is to get a higher slew rate, not so much the higher GBW.
With the faster OP, the 100 pF value for C026 can be enough.
Attached are a picture of a simulation that corresponds to the file ADIN(Y)_PIN28(R)_AZON_BACK_1NF-2.jpg and the simulation model:
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Hi, Mr.Kleinstein,
Thanks for the picture and simulation!
I have not got LT1056/TL071 in hand ,so I just change the U107 to opa209, which has the SR about 4V/us , 10 times above the OP07. After checking the gate waveform, the strong ring is found on the back edge. Pls refer to the photo 1, it is still with the 1NF for C26 and have the chance to strongly forward bias the GATE to DRAIN for about 20us, where as the GATE to SOURCE is still zero bias. When changeing the C26 back to 100p, the gate start ringing and might leakage more to the DCV channel. Can we suppose that the reason for using the much slow OP07 is to prevent such ringing?
Best Regards,
szszjdb
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The OP209 is way faster than the OP07. Still it should be not problem for the follower (U107). However the input current might be a little high (especially in x 10 mode). Some ringing at the back end was seen before at ADin, when the voltage was so high that the output reached saturation. U107 is just a follower behind the main amplifier. The faster OP seems to contribute a little. This could be a little via capacitive coupling, and maybe by damping the feedback signal a little by the clamping diodes in the OP07 when it can't follow the slew rate.
However the main question if the amplifier itself will ring is more dependent on U104.
The ringing is not the normal type of ringing with a constant frequency, but is showing more like constant slew rate and thus higher frequency when the amplitude goes down. From what I see from the simulations, one problem with the amplifier is that the clamping with the diodes at the input of an BJT OP (U104) will activate too late. So C120 will charge up to far and cause ringing from a not well working anti-windup. This can cause a kind of nonlinear ringing. To a certain degree a large amplitude in ringing slows down the amplifier and too slow an amplifier can be a problem in that circuit too.
I don't know and don't understand why they choose the OP07 for U107. At first sight it is an odd choice for both places due to the very limited slew rate and also the input current. They use super low leakage CMOS switches for the gain and than a BJT based OP - that is odd, but OK since the differential input resistance is high enough for the OP07. The damping of the ringing with a slow U107 might be one reason, but I still think it is a poor choice, as it does not address the point that causes ringing in first place. It only adds some filtering, but less effective as a larger C026.
For the main amplifier the OP07 makes some sense, as it has high gain and is about suitable for a source impedance of 40 K. However the OP07 is slow and how the amplifier looks, the second OP will not increase the slew rate by much at gain 1. This OP sets the overall bandwidth, but I don't see a reason why it has to be so slow.
At least in the simulation a faster OP for the main amplifier even tends to reduce ringing. Here too much GBW could be a problem (e.g. due to capacitive coupling around the MUX), but the LT1056 simulated OK. This change in OP reduced ringing, despite of higher speed. Because of the high impedance, usually high slew rate and the clamping with the diodes a JFET OP is likely a good choice. For very good accuracy a high gain for that OP could be an advantage. The input stage gives a gain of around 20-40 - so a very high noise level (e.g. > 200 nV/sqrt(Hz) at 2 Hz) could be a problem. So the choice of JFET OPs may not be that easy. Maybe they preferred the higher gain of the OP07 over higher speed.
To really speed up the amplifier one has to speed up U104 and U107. One slow amplifier would still limit the speed.
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Hi, Mr.Kleinstein,
Thanks for so detail analysis. Very helpful!
I will try the TL071 tonight and get some LT1056 for testing later.
From the negative discharge testing , the larger the c26 is, the larger the Rin is. But I found something odd with the 1N for c26, that the ZERO point will have larger offset like 1-2uv after calibration , where as in 100p conditon it is just around 0.5uv. So maybe the 100p or 350p will be better for all.
Attached FYI.
Best Regards,
szszjdb
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A larger value for C026 will slow down the switching and this way make leakage due to a forward biased gate smaller or less likely. However with to much of a capacitor switching will get too slow at some point. So 1 nF might already be a little to slow and thus cause an offset error. With a larger C26 it might make sense to reduce R083 to keep the turn off phase fast enough.
As the range to increase C026 are limited it makes sense to speed up the amplifier instead of slowing down the switching.
The DCV input switching is slowed down with C026, but other inputs of the mux are still switching fast. This could be a problem when measuring higher resistance like 1 M if measured as 4 wire ohms. The current source is negative side and thus a voltage like -10 V might be present. I don't know if 4 wire ohms is still supported when the voltage goes higher than -5V - it's usually not really needed.
The TL071 is not that much different from an LT1056/LT1055 - so if it works with an TL071 there is no real need to test an LT1056.
Another possible good choice would be the OPA171 due to it's high open loop gain.
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Hi, Mr.Kleinstein,
Thanks for all.
I made a mistake that the photo I upload yestoday is PIN27 vs PIN20, not PIN28. The ringin from PIN28 is a little bit small, might due to the gate capacitance load.
Further odd things is that I found the PIN20 have the 100-200mv forward bias to PIN28/PIN7 either in AZOFF or AZON mode. I can confirm that the 2 channel of the scope have the same gain at that point. It might contribute more leakage from gate to the input channel. As the PIN20 is pull up by PIN27 by a 100k resistor and the voltage of the PIN27 is exactly the same with PIN28, where is the forward bias coming from ? Is there any posible the forward bias is design to reduce the Ron of the JFET in the MUX or some part defect?
I am trying the TL071, and report later.
EDIT:
After changing the U104 to TL071, the ringing mostly disappear . There still has some overshot on the PIN20 for the gate control when with 100p for C26 and more improvement with 350P. However the better performance with 350p in waveform testing, there have just a little change for the RIN in the negative discharge test.
The OPA171 is worth to try as the drift of the Vos is 0.3uV/C vs 18uV/C in TL071. I am just worry about the 3uv Vpp voltage noise, which might degrade the noise performance of the DMM. And further information about the ADCMT 7480 show that they use OP177 instead of U104 OP07, AD8034 for U105 LT1220 and ad8267 for U107 OP07. Are these the banlance of the noise figure with the speed?
Would like to have your further advice. Thanks!
Best Regards,
szszjdb
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There can be a little offset between Pin27 (guard) and the input to the amplifier (pin 28). The gate voltage should more or less follow pin 27 when on. The offset is mainly due to the offset of the JFETs (Q102) and it should be influenced by the R170 trimmer. I don't think one should have an intentional offset here and having zero offset could be a good target for adjusting R170. At least Zero offset should give the lowest leakage and it the usual operating point. It's more like a negative offset might be desirable to reduce the leakage due to gate forward bias during transients.
Having pin 20 more positive than pin 27 would be odd, as I don't see many paths to a more positive voltage, Gate leakage should be the other way around. In theory there could be some leakage in the LM339. This would show as a drop on R083.
The peak at pin 28 after switching looks odd. My guess would be capacitive coupling from the guard to the input. This might be a problem to a faster amplifier, but just the change of U107 should not have changed that much as this step did not give that much speed up.
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Hi, Mr.Kleinstein,
Thanks a lot!
Confirmed that the forward bias of the gate is due to the leakage of LM339 and about 1ua current flow to the R83 ,then to the 100K in the MUX . How to fix it ?
Best Regards,
szszjdb
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A quick and dirty fix could be a diode in series with R083. Changing the LM339 would be the natural way. Another point to look at might be if there is excessive flux residue around the LM339 (normally not that critical and 1 µA is quite a lot for leakage due to flux).
Looking at the newer ADCMT7480 is a good idea. The OP177 is not that much faster than the OP07 - it's main advantage it a higher open loop gain and thus possibly better linearity for the amplifier. The logical way to solve the switching problem would be to include a pre-charge phase, which is not that difficult and a patent on this should have expired by now. This would eliminate the critical step to towards DCV_in and also reduce the current contribution from just recharging the amplifier input. I would consider it worth the bit of extra effort.
The crazy way would be adding pre-charge to the 6581: On the rising slope of Pin20 gate add an extra phase that connects the output of U009 first and only than with a delay of a few 10 µs activate Pin20 in exchange to the extra channel.
The noise and drift of U104 should not be that critical: The JFET stage should give a gain of about 20-40 ( S = 1-2 mS for the FETs U401). So drift and noise Of U104 would be attenuated by about this factor. So even the TL071 should not contribute much to the noise and drift.
The way I understand the amplifier, there is little disadvantage, more like an advantage to a slightly faster amplifier for U104. Most JFET based OPs would have the additional advantage that there slew rate would not saturate before the diodes D103 kick in. This would make D103 more effective in limiting overshoot. The step from the U105=LT1220 to the AD8034 might be for a similar reason with D111.
The main downside I see for the TL071 is its lower open loop gain compared to the OP07. I would prefer the OPA171 over an TL071 mainly because of the higher loop gain.
One might have to check the gain of 10 and 100 modes too, if these are still stable. I would expect it, but one never knows.
Edit:
Adding a pre-charge phase might not be that complicated: It needs another JFET path from the output of U009 to the amplifiers input, that is controlled by a delay. A possible way would be an 74HC123 or similar monoflop triggered by the signal to the LM339 that controls pin20 of the MUX. This monoflop controls 2 out of phase drivers (LM393 comparators): one to control the new JFET for the pre-charge path and the other to form a kind of wired AND for pin20. So for the first around 20-40 µs the pre-charge channel is activated instead of pin20. So it would be a small added board and maybe a reduced value for C026 if the time gets too short.
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Hi, Mr.Kleinstein,
Thanks a lot!
The leakage of LM399 is max. 1ua in the datasheet as I measured, that it should be 0.1na in normal. The U017-1 also contributed to the same forward bias like U016-3 when in the negative reference test. That is to say all the JFET will be forward biased and the more negative it is , the stronger bias it is. That might be the bug ?
EDIT: The bias can be fixed by just add 1n4148 in serial with R83. It might be the large leakage of the 4148.
After checking the ADIN with the PIN20 in the 1v/100mv range , I found something different with the 10v range. It seems stronger ringing occured in that case. Attached FYI.
I am going to return the analog PCB back to my friend tomorrow and I should focus on the INL of the ADC and capture some data for future comparing. The adding precharge phase is worth trying following.
From the INL testing, I had tested the INL for DC AMP byinput a volatge from resistor string and record the reading from ADIN point at AZOFF mode. It show not so well INL of the DC AMP. I will test tit on the new analog PCB from my friend for comparing.
Would like to have your furhter advice!
Best Regards,
szszjdb
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The leakage from the LM339s could contribute to the leakage. However normally 100 mV more should not be that bad. There are also other parts than can show quite some variations: the JFETs in the mux can show quite some variability in threshold. This could have quite some effect on the point when the switching takes place. Another part with quite some range is the speed of the OP07. The DS I found showed slew rate of only 0.1 V/µs min with 0.3 V/µs typical. I doubt many real world parts would be that slow, but it's quite a range. They might also do some sample tests not to get a very slow batch.
Using LM339 to drive the JFETs is quite a common practice in DMMs - for some reasons they also fail sometimes, but so far I have not heard of leakage to be a problem with this chip. There are many sources for the LM339 and so there may be good and bad batches / manufacturers. That type of leakage towards positive side is also a quite unusual parameter, that may not be tested so well.
For the relative critical DCV input one could replace R083 with a diode and a smaller resistor (e.g. 1-2 K) in series. This would block positive side leakage from the LM339 here. The other input are likely less critical. A slightly positive voltage at the gate that is active might even compensate some of the usually negative current from the other (usually 6) fets that are off.
There is some visible ringing in the 1 V and 0.1 V range - not really good, but I would consider is still acceptable. The decay is rather slow, bt chances are there is enough waiting time before the measurements starts and the settling of the slow component takes about as long. At least there is a change to get it fixed. The critical point would be if there is a lot of ringing on pin 28 too. Normally this should be considerably smaller, due to the divider / gain.
For the INL test, there might be some noise / drift included. So it might need a few repeats and maybe a few more points to see how much of the error is real INL and what is due to drift / noise. The curve looks surprisingly symmetric (inversion) around 0 - no more big difference in positive an negative side. An important point for these curves could be where to take ground for the 3458. Quite some part of the error could be from input currents. The resistor string has quite some resistance in the middle (50 K) - so 100 pA could already cause a 5 µV error. The symmetric shape may be due to an error in the resistor string, if it is turned around.
For the same setup it would also be interesting to get the data from the ADC in the R6581. The comparison to the 3458 would be a good test for just the ADC. It would be without (digital) AZ, but there is an analog auto-zero for the ADC itself and the amplifier is outside only shifting the test-points. So these data should not suffer much from drift.
Probably the better and more direct test for the amplifier would be to measure the voltage between the input and ADIn testpoint (= com of the second meter).
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Hi, Mr.Kleinstein,
Thanks a lot!
I had tried the 1N4148 in series with 10k and just a little improvment to the forward bias. I will find some new LM339 for testing.
The INL from ADIN to INPUT HI seems better than before. Attached FYI.
Best Regards,
szszjdb
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The INL of the amplifier would be the deviation from a straight line of that last data. Just by eye (which is usually quite good in guessing a straight line fit) there still seem to be errors up to maybe 3 µV. So it is not that good. Normally I would expect something like less than 1 µV deviation, for much of the range even below 0.1 µV (if scattering and drift are removed).
However this test also includes amplifier drift. So it would need quite some repeats (e.g. going up / down 2 or 3 times, ideally more) to get some averaging in the drift / scattering and an idea on how reproducible the points are. So a really stringent linearity test of the amplifier would likely need an automated setup that could run many repeats at a constant rate so that drift and noise could be averaged out.
The amplifier (at gain 1) is the easier part compared to the ADC, when it comes to INL. The main uncertainty might be input current in combination with the 8.8 K resistor at the input.
What about is the level of input bias current reached by now ?
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Hi, Mr.Kleinstein,
Thanks a lot!
The bias reached around 1.4na and the RIN is about 5-6Gohm arround 8v voltage. Attached FYI.
Futher testing with the INL oF the DC AMP shows that the MAX. Err of the amplifier is below 1.5uv. It seems acceptable. I am using the 3458 in 200plc to get the reading ,which is stable enough.
I have assemblyed back the new analog PCB and will check the control gate with the scope.
EDIT:
The INL reading of the DC AMP is not so stable ,likely more noise coming in the new analog PCB, so drop it. It is hard to record the data from the DC AMP. duo to the drift and noise. Howere, the INL is not so bad from the data I had got. The main INL issue is duo to the ADC itself I think.
Would like to have your advice!
Best Regards,
szszjdb
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It is quite natural to see quite a lot of drift / low frequency noise when measuring the difference over the amplifier (input Hi to ADC_in). Most of this would be low frequency noise and drift from the amplifier, especially Q102 (U401). How much drift can depend of the unit, as not all FET pairs are the same. To get a good reading here it would take the average over many runs and thus normally some automation. High PLC setting on the meter could be even negative, as it makes the measurement slower and thus more drift.
I agree that most of the INL is very likely from the ADC itself. A comparison to the 3458 could be relatively easy with a comparison from reading at AD_in and the r6581 reading. Here there should be no extra drift despite of measuring without AZ, because there still is a kind of analog auto-zero for the ADC itself. So the reading should be quite reliable (if done at the same time). However it would not include effects due to switching for the AZ mode - here DA could have an effect though to a large part linear.
However there could be still some contribution from the input current: 1 nA and the 8.8 K at the input already gives 8.8 µV of error. The input current is not just described by a constant input resistance, but nonlinear (considerably higher current at 8 V than at 4 V). With the amplifier I see the problem more with input current than with nonlinearity of the amplifier (at gain 1) itself. However the input current is not a continuous current but in peaks. So the measured average current is not what is relevant to overall INL when doing a test with a low impedance source. The peaks during switching tend to be less relevant to the measurements on a low impedance source, a high impedance (and possibly capacitive) source will smear out the peaks.
Even the TL071 should lead to very good linearity for the amplifier: The loop gain would be about 20-40 for the FET stage and 33 for the final stage in addition to U104 (e.g. about 100 V/mV with 1 K load for the TL071). This would suggest INL in the 0.01 ppm region.
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Hi, Mr.Kleinstein,
Thanks a lot!
I had test the Vadin with 3458 vs the reading of 6581 in AZOFF mode at 100PLC. However it still has some drift/noise , the error of record by hand should be less than 1uv . Comparing to the INL result , there might have the same trend in the two curve. It is clear that the bad INL or the turn over error are due to the same reason , that some parts might degraded in the ADC.
What might be the reason?
Would like to have your further guide!
Best Regards,
szszjdb
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The general shape of the 6581 (ADin) vs 3458 curve looks kind of plausible. The really odd point however is the drop at around zero. Without the drop the main part is parabola as the lowest order of possible nonlinearity. I still don't know what could be the source. It kind of looks two types of error: one is the more or less smooth parabola and the other type an error rather localized around zero.
For that drop around zero it might be interesting to get a few more points, as to estimate on how large the range is that is effected.
For a wrong reading just for a very small range there could be a kind of coupling effect at a special PWM ratio for the feedback. So this would be a very narrow range (like may +- 1 mV) around zero that is effected. However older tests suggested the effected range is wider, more like 0-1 V.
The test with reading at ADin might be effected from 2 drift parts. One would be the amplifier in combination of not reading the 3458 and 6581 at the same time (especially by hand). If reading at the same time amplifier drift would be just like the test source slowly moving and thus not a problem. Another drift contribution would be from the resistors (e.g. R200) and -19/17 reference ratio.
Still I think this test would be the best way we have to check the ADC, especially if this could be run in a kind of automated way (read 3458 and 6581 via GPIB and maybe also control a source (no need to be stable/accurate, but low noise would help).
Much of the turn over error near zero points towards a problem with the zero reading maybe caused by that odd drop around zero. Still there is something going on between 3 and 4 V.
Somehow the turn over test and the test at ADIN don't really match up. In theory one could calculate turn over errors from the ADin test and those values don't seem to fit. So there might be an extra contribution in the turn over test, maybe due to input current. The other difference is using the non AZ mode versus the AZ mode.
Ground shift could also be a source of INL. I don't see a good star ground, but it looks a little like a partial ground plane - which is usually not such a good idea with a high precision circuit. With a sensitive meter one could check if and how much the different ground points move relative to each other, when the input voltage changes. This would likely be just a small change of a few µV, maybe 10s of µV, but the 3458 should be good enough for this.
One point that makes me slightly suspicious is that there are several points where the shield on the back / case is connected to the board. Are these point's on the board electrical connected or is there just one of the screws with a contact and the other isolated on the board ?
One type of INL I would expect is due to self heating of the input resistor inside R200 and this should be more like a 3rd power contribution. However this type of error is not visible. So it looks like R200 is really good quality. The heating due to input current and that way changing the 10 K or 20 K resistor value could give a contribution in parabola form. Though originally centered around -2 V and not around 0 V, the linear fit brings it to the center. so the shift would not be noticed. Still it would be odd to have a very good 20 K resistor (center part of R200) and than a bad 10 K or 20 K resistor in the same case.
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Hi, Mr.Kleinstein ,
Thanks a lot!
The analog PCB have just one point connected to the groud plane ,which is the red marked screw. The green screw marked is my test ground for connect to LO port of 3458. Attached FYI.
I will find a GPIB cable to connect the 2 DMM to read them in the same time. However, I am quite sure that I manually read them at once and the error should be but not so big.
For the R200, I have change them to 4 pcs 20k (2 in parallel and 2 in serial )VISHAY S102C metal foil type resistor before and find no obvious change on the INL or the turnover error in the short term view. Some my fiend have ordered the custom vhp type from VISHAY and will get on July. Maybe I can get one to try at that time.
For the resistor of using in -19/+17 generating, I have added some sponge around them to protect the air flow direct on them and the total drift of the reading will be 2-3uv for whole night in AZON mode when testing my LTZ7V reference.
I also noticed that the different of the reading between the AZON and AZOFF mode somtime would be more like 6-7uv and some would be 2-3uv. Is that normal?
Any further test should I make?
EDIT:
I remember that Mr.Mickle T. have found a way to fix the INL by shift the zero ponit by a resistor connecting to +27V.What might be the reason for it ? I will also try it.
Best Regards,
szszjdb
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Having only one ground connection is good - this is how it should be.
I would not change R200 again. The resistor seems to be quite good quality, as there is essentially no U³ part in the INL visible. So I would expect it to have a TC in the < 1 ppm/K range. So better handle it with care. It may not look like a very special part, but it seems to be of really high quality. If at all one could do a test if the TC matching of the outer two parts is good: In the non AZ mode the effect of a temperature change of R200 on the offset would reveal the TC matching. A slight temperature change could be from a flow of warm air (e.g. 50 C) or maybe a small heater near by. The 2 resistors effectively work like a divider 1:1 from +-15 V. So 1 ppm of change would result in about 15 µV for the reading in 10 V range. So the test could be reasonable sensitive to see even TC mismatch in the 0.1 ppm/K range. Because of this rather high sensitivity good resistors are required here to make the non AZ mode work well.
Ideally there should be essentially no offset between the AZ and non AZ mode, as the non AZ mode should use the last available AZ reading to get it's zero. Over time there might be some drift in the non AZ mode of cause. Due to DA there might be a kind of error, as the zero reading could (is expected to) depend on the applied voltage before. There is a chance the AZ mode will have a slightly lower gain. As this effect is expected, there might be some numerical correction for this - and in this case the difference could be both directions. The correction is difficult, as the DA effect can depend on temperature - not just a little but possibly a lot (e.g. up to doubling for 5-10 K more, as many DA effects are thermally activated and faster acting DA would have more effect).
Though not directly connected to INL one could test this, by comparing the AZ and non AZ mode readings at a few voltages (e.g. 0, +-4V, +-7V). As there can be some random / noise contribution it might need a few cycles (like 3 or 4 times switching between Az and non AZ for a few 30 seconds each). At can take some time (e.g. 10 seconds range) to adapt to the new mode / voltage. This very slow settling part could be seen as INL in some tests.
The AZ mode should not show a significant drift over time - so more like a few 100 nV, a 2-3µV drift in AZ mode is kind of odd and would indicate a problem, more like with the MUX/switching or maybe input current related, not the ADC itself. The wrong relay control could contribute to this - so if not done it would be time to fix that. Some drift over a few minutes just after measuring a higher voltage might be due DA effects described above. So the history before such tests might be important.
Shifting the ADC range could be worth a try. Though I would not use the +27 V, but more like the +17 V of -19 V.
I see 2 possible reasons why the shift could help: one would be that the +27 V is slightly changing and this way compensating the non-linearity.
The 2 nd way would be that the zero reading is just a bad spot for the ADC and thus using this bad spot causes trouble. There is a chance that some value near zero can be bad, as for a rather small range (e.g. something like 1-10 mV, maybe less) there can be capacitive coupling from a clock that has a transition just before the feedback-current switches during run-up. So a rather small range of values could give rather large errors and if these are just used for AZ this may not be so good. The shift could just move that tiny bad range away from zero, if it just happens to be at zero. The trimmer at the DC-amplifier could have a similar effect - so I would not expect too much of an effect.
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Hi, Mr.Kleinstein ,
Thanks a lot!
The big difference between the AZ and non AZ mode is mostly occured when switching from non AZ to AZ mode. I will make more test as your guide.
The long term drift (2-3uv/day)might causing by the sordering effect of the R200 or some other parts recently modified. That could be corrected by re-doing the internal calibration and seems have no effect on the INL or the turnover performance.
For the shift the zero point of the ADC , I noticed the current added by Mr.Mickle T is about 30uA, equivalent to 0.5V zero bias. That might have huge influence to ADC . But I am wondering how it can get the right reading without the ACAL.
I remembered that you have metion the +5v power supply for U208 might have issue. How about adding a second +5v regulator like 78l05 instead of just a zenar? That might reduce the nosie in the comparator.
EDIT:
Here is the drift between the NON AZ vs AZ mode. Normally the NON AZ mode will have larger number. When back from AZ to NON AZ mode , the reading will recover slowly.
Best Regards,
szszjdb
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The soldering on R200 should not effect zero drift in AZ mode. If would be only the non AZ mode drift that can be influenced, but this is usually not that critical and still good. For the drift in AZ mode I would more like suspect the input relay (especially if still running hot) and maybe still some effect from input current / switching. If for some reason the input current drifts this can add to input offset. However switching at zero input voltage should be about the best case and thus not problem with gate bias or similar.
For the offset added, it might not take that much to have in influence on the INL (e.g. if the poor range is small). So it might be possible to stay in the range accepted by the self test. Depending on where the offset is added, it should not have a significant effect on gain. So it might be still possible to do the self-test and maybe even ACAL without the offset and only than enable an offset. Anyway I would not consider this a solution, more like a hint that might help to find the problem.
The usual 5.6 V zener is lower noise than an 78L05. So I don'T think this would be an improvement.
I had expected a slightly larger difference between the AZ and non AZ mode. So the capacitor seems to be low DA. As the ACAL measurements are done in a kind of AZ mode, I would consider the AZ case more accurate - though it is only in the 1 ppm or less range.
DA could also cause a similar (maybe slightly smaller) size after effect on settling: When switching from something like 10 V reading for some time to a short, it might take some time to come back all the way to zero. The effect should be larger in the non AZ mode, and might be to small to notice with AZ.
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Hi, Mr.Kleinstein ,
Thanks a lot!
For the long term drift, I had bypass the front/rear relay and replaced the K006 to a low EMF reed relay. And I had opened the outer metal case for easy testing. All this might take effect to the drift.
The most concern is still the INL of the ADC. What might be the next step?
Would like to have your advice! Thanks !
Best Regards,
szszjdb
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Finding the sources for INL in the ppm range is a really difficult task. It starts with the problem of reliably measuring INL in this range.
In the AZ mode I am not that sure the amplifier switching is not contributing to INL. At least in the old state some of the INL measured was due to switching artifacts. It might be worth repeating the INL test (compare to 3458 and turn over) with the modified amplifier.
One possible source of INL that came to my mind would be excessive ringing at the integrator input. After switching the S1024 current source, there will be some ringing of the OPs of the integrator. If the voltage at the integrator input would rise to above about 40 mV it would leave the linear range of the OP177 OP. Ideally there would be very little voltage there (maybe 10 mV alternating spikes that decay over a few µs). It is hard to tell how parasitic capacitance, decoupling and charge injection of the switches would influence things. Also the distance to C210 is rater large. So the circuit around the integrator might not be that ideal.
There could be a reason for this distance: heating the capacitor could change the effect of DA.
Another point to check with the scope would be some of the ground points, e.g.:
Both sides of U504 GND buffer, the center of R201, the ground at Q205, GND at U301 (HC74 driving switches), GND side of C207, U211 Pin3.
There will be likely some ringing when Q204/Q205 switch - too much of this could be a problem.
The substrate voltage for switches could also be interesting (e.g. U204 pin 7).
Another possible test would be to see how much warming / cooling of R200 would change the offset: e.g. warm R200 with a local heat source (e.g. resistor as a heater at around 500 mW) a little and than watch the voltage change in non AZ mode measuring a short, when the heat source is removed. This give an indication on how sensitive R200 is to temperature.
Similar other thermal effects are possible: heat source that depend on the input voltage should be R200, Q200, U206, U207, R219, R220. Possible sensitive parts would be the ref. scaling (R232, R234) , R200 , R201 and also C206. For C206 a change in capacitance would not be a problem, but a speed up of the DA can likely have an effect in AZ mode. Still I doubt the heating would be enough to increase the temperature by some 5-10 K needed to get into the ppm range.
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Hi, Mr.Kleinstein ,
Thanks a lot!
I have checked the power supply and found 1-2mv noise in the -18V rail. Further checking with the scope ,found some swtching noise in it ,might coming from MUX gate switching. And there have a little more asymmetry for the +-27v ,which is about 0.6v.
I will check the other ponit tonight.
Best Regards,
szszjdb
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-18V source is zener based and don't have a linear regulator IC, like other rails.
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Hi, Mr.Kleinstein and Mr. Mickle T.,
Thanks a lot!
Further checked the INL, it is more like the old one and the 2 record for 6581 is tightly matched. So the drift is very small.
Checking the integrator with the scope both on the input and output side, nothing unusal found.
Also with the ZERO point of you mentioned above , it is just a noise background line and found nothing yet.
Will conduct the warming test tomorrow.
Would like to have your further advice!
Best Regards,
szszjdb
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The peaks at the integrator input are quite large. It looks like 50-75 mV peaks when the current source switches. This would be enough to leave the linear range of U205. So this might be in theory a point to possibly cause some linearity error, especially if these peaks change with input voltage.
One should treat the INL tests for both signs as a single data-set and thus get a single curve across zero. So just a single line fit. This should tell if for the positive side the error is more with the small voltages or the higher voltages.
It would be kind of expect the lower voltages to work and than increasing deviation from about +5 V on. I put a few point together and it looks like this.
Anyway what changes at around + 5 V ?
At around that voltage there was some oddity in the positive side input current. I have not found a positive side discharge test with the modified amplifier.
With the modified amplifier the negative side readings might have changes a little, as the bias is lower now. How is the 10 V-> 1 V transfer and the 1 M resistor test working now ?
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Hi, Mr.Kleinstein ,
Thanks a lot!
I reworked the INL data and did find the oddity arround +5v ,where the 3458 performed normally at that point. But I found nothing strange in the discharge curve arroud +5v. It seems that the error is coming from ADC itself. Further comparing the total INL with the ADC INL curve, there have similar shape but smaller error in scale. So how is your comments?
The transfer error are like the old one in DCV mode and are improved much from 200ppm to 20ppm in OHM mode. Might benefit from the modifying of the OPs.
Best Regards,
szszjdb
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The transfer error are like the old one in DCV mode and are improved much from 200ppm to 20ppm in OHM mode. Might benefit from the modifying of the OPs.
This is an excellent result! Could you list all the changes made?
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I second that request. Ohm error on my box is horrid. :-//
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Hi, Mr. Mickle T.,
Thanks a lot !
The only thing is the U107/U104 changing to TL071 in my case. But it seems that 20ppm transfer error is still not so good . Could you give some advice on how to do the TRANSFER CHECK in the diagnostic mode. I am wondering if it can help to fix the transfer error.
Best Regards,
szszjdb
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TRANSFER CHECK in the diag mode has nothing to do with ohms/volts transfer. This is more like a memory card test :(
U104 already have strong a BW-limiting network C120-R122/R123/R138. I don't fully understand how could a replacement for a faster TL071 be able to get such a result?
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Hi, Mr. Mickle T.,
Thanks for all!
Reason for the changing U104 is keeping the D103 effective in clamping ,resulting the reducing ringing in guard output ,thus reducing the input current charge for the AZON mode. All proved in my post before. But it is still not so good comparing to 3458 as lack of precharge circuit.
Best Regards,
szszjdb
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C120, R138, R122, R123 are more limiting the BW of the JFET+cascode stage, by loading the output in addition to the two 40 K resistors. The change to the faster TL071 should work in 2 aspects:
the first is the higher BW and slew rate. The problem with the OP07 is especially the limited slew rate.
The second difference with a JFET based OP for U104 is that the slew rate limit is reached at a higher input voltage. This allows D103 effectively limit the slew rate before the OP itself does it. This reduces overshoot due to charging C120 too far. Typical BJT based OP reach there slew rate limit with about 50 mV (or 100 mV for a Darlington or similar input).
The TL071 may not be the best choice, it is more like a first easy to get part. The gain of the TL071 is kind of limited - though I am not sure if gain at frequencies much below 5 Hz would really help. The JFETs and the LT1220 at the output add gain - so the overall loop gain might be still sufficient.
The JFET MUX (with gate supply from the output side) is problematic when switching from a high to a lower voltage. Despite of the C026 for the DCV input it just takes too long for the guard voltage that supplies the gate voltage to drop to the new level. C026 is mainly adding a delay before the new channel is turned on, but it is not very effective in turning on the JFET slow. This can cause the gate to get forward biased and this adds leakage current. This will also effect the 4 wire ohms mode, possibly even more as there is no capacitor to slow down switching. For a large resistor the disturbance from AZ (sense Hi / sense Lo) switching seems to be so large that it does not fully recover before the ADC conversion. The ohms current source is from the negative side, so the voltage at sense_Hi would actually be negative and thus the critical switching case with a large resistor.
The input current measured with the discharge curve still looks rather high. However some of this could be due to the missing pre-charge phase and only so high in 1 PLC mode. Chances are it would be considerably smaller in 10 PLC (or similar) mode (could be measured with a larger capacitor). The input current still looks like a nonlinear resistance and could thus contribute to the INL, though I don't think it will be much in the slower modes. The 1 PLC with AZ mode might be kind of limited to not so low input current - this looks like a principle limit and not a defect. Not sure if this is mentioned in the specs / instructions.
The INL test from looking at ADin (with the 3458) and the ADC reading is different in two aspects:
it does not include the input amplifier and because there is no AZ phase, the DA will have a much smaller effect. The ADC is converting essentially a constant value and this no carry over to the next (e.g. Zero) conversion.
Looking at the expected average charge in the integrator again, the DA might actually contribute to a square law type INL. The average voltage in the capacitor should be at about half the amplitude of the integrator signal, as the lower end is fixed at 0. So it would follow a kind of curve with it's maximum at 0 V input.
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Hi,Mr. Kleinstein and Mr. Mickle T.,
Thanks a lot!
I agree that there has some different condition for system INL under AZON mode and ADIN INL under AZOFF mode, but they are so similar both in the shape and the scale. Please refer to the attached picture. As proved before that the error introduced by the DC amplifier is around 1uv scale, it is most likely the INL coming from ADC.
What would be the next step? Would like to have your further advice。
Best Regards,
szszjdb
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I replaced U104 and U107 with the precision mid-speed AD8675. No luck :-[
x10 and x100 mode of the input amplifier gives about 8 V p-p sine wave at the output.
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The INL curves measured from the input in AZ mode and AD_in point without Az are in deed rather similar, even more than I have expected. This is because there are 2 INL contribution that I think I under-stand: One is self heating of R200 (center part) in combination with a TC. The other is DA to cause charge transfer between conversions and thus an error mainly in the AZ mode, but should have little influence on longer times with a fixed input.
The odd thing is that these two contributions should be different for the two cases: more self heating (e.g nearly twice as much) in the non AZ mode and the DA effect mainly in AZ mode. The voltage dependence is different ((U-2V)³ vs U² ) so it is not that one is exchanged for the other.
This makes it unlikely that these two contributions are causing most of the common curve.
One possible test could be looking at the S.out test-point again, and compare the curves for a few different input voltages (e.g. 0 V, 4 V, 6 V, 10 V) to see if something changes at around +5 V input. With higher input voltage the curve before the comparator triggers gets increasingly steeper. Its possible for the slope amplifier to just reach positive saturation at about 5 V input. A change in waveform at S.out could effect INL via capacitive coupling towards the current source S1024 (not very likely due to distance) and also through coupling via the supply. Another possibility could be an excursion of the integrator that goes too far at the beginning of run-up.
For the range -1V to +2 V it might be worth to get a few more points for the INL curve(s), to see how wide the dip around 0 really is. Some coupling effects might only effect very small ranges and thus look odd with just a few points.
Having a kind of automated INL test could allow for testing small modifications (like added bias, added decoupling) to see if the INL curve changes. With getting the curve manually this might not be very practical as is would need quite a few curves with preferably more points.
@Mickle T:
U104 needs to be in the right GBW range. The internal compensation of that OP is used for the whole loop too. This OP has to be considerably slower than the LT1220 used for the output and the JFET stage. One might get away with a faster OP when a small capacitor in local feedback (output to inverting input, a little like with the fast amplifier channel). I would more consider an LT1055 or OPA171 for U104, as there is an extra advantage in having a FET type.
My simulation still worked with the LT1056, but it did not include parasitic capacitance, e.g. of the switches. The version with TL071 already showed quite some ringing in real world - so anything faster might get tricky. The noise and drift of U104 should not be that critical as the JFETs in front should have a gain of around 20-40 at low frequencies. So the TL071, LF411, LF351, AD711 and similar could be acceptable. Noise wise the AD8675 is also not that good as the input side of U104 is in the 40 K Ohms range.
For U107 a faster OP should be not problem, but low input bias could be an advantage. The current noise of the AD8675 would already add to the amplifiers noise in the x 10 range. So again a FET based OP is likely a better choice.
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Hi,Mr. Kleinstein ,
Thanks a lot!
Checked the Sout with Cout with scope, seems normal in the curve. The odd is there has a decline both in the Sout and Cout at the positive period.
Would like to have your advice!
Best Regards,
szszjdb
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The curves look a little odd:
The very fast ringing on the S-out signal is likely jus coupling via ground to the scope. So I would consider this an artifact from the connection. It is likely not there if C-out is not probed.
Still it is odd that the S-out signal stops rising essentially immediately after the comparator has triggered. I would not expected this, as the control of the current source and response of the integrator should take some time and would need to by synchronized to the main clock (e.g. 12 MHz or slower). So I would expect some delay at least in the 50-100 ns range and a corresponding overshoot of some 100-200 mV. The flat top part looks a little like the slope amplifier would already be nearly at it's upper limit. So the hysteresis on the comparator seems to be a little on the high side and this might cause the switching to take place rather late, when the slope is already slower again. Together with a slight offset of the comparator this leads to relatively long integrator pulse at +10 V. Still I don't see a reason to cause significant INL by this. It is more like a point that might cause trouble the temperature gets much higher and thus a reduced amplitude at S-out, possibly up to the point of not triggering the comparator in time anymore. When at the edge it might cause some trouble during rundown. Though I would more expect increased noise right at the edge, not a large range with extra INL.
One might consider to reduce the value of R205 a little (e.g. 10 K instead of 12 K - a large change could have quite an influence on rundown timing) to get the switching more in the steeper part, and thus have a little more reserve for a possibly higher temperature. The offset due to R260, R261 seems to be a bit off center and thus much longer pulses only with a positive voltage. It is at about 5 V where the pulse length really gets longer, but I don't see a way how this should cause INL issues.
Another point worth looking at might be the I.out test-point at around the end of the run-up phase and the beginning of the rundown phase. Here things might change with voltage. The comparator switching right before the end of integration time could cause some INL issue at some rather fixed voltage, possibly at around 0 V.
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Hi,Mr. Kleinstein ,
Thanks a lot!
Attached the Iout and Cout waveform FYI. All test will under 10PLC, AZOFF mode.
Will find the 12K resistor for test tomorrow.
Would like to have your advice!
Best Regards,
szszjdb
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The I_out curves look normal at around +5 V. At least I can so no real change there. There seem to be smooth transition from 0 V up to 10 V. So I don't see a source of INL here. There seem to quite a long minimum time for switching before the short brake before rundown.
However the curves look a little unusual for the -4 V and -6 V: here the is change from negative so positive slope before the final cycle, that appears without the comparator to get activated. This might indicate that the feedback during run-up is not producing a stable patter as I would have expected. Still this is the range that is working better. So the ADC is still good for surprises.
As long as everything still works, there might be no real reason to modify R205. Rethinking the effect, it should only effect the very fast initial stage and thus not have a significant effect on INL. The slower slopes are likely less critical as there would be less delay from the comparator.
R205 might be more like a point to address if problems happen at a higher temperature.
I found a note (on a much older Keithley 19x) that the output cross over transition of the integrating OP might have an effect on linearity. This would be the point of the output current of U206 is low when switching. This might give a different type of settling during switching and this in cause influence the charge injection during switching. Looking at the currents, it is possible that at around 5 V input voltage this critical current range might be hit. It would be relatively easy to add some current load to U206 (e.g. a resistor (e.g. 10 K) from the output ( = Iout) to the -15 V supply of the OP). This extra load should shift the transition to a higher voltage, likely > 10 V.
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Hi,Mr. Kleinstein ,
Thanks a lot!
To shift the center of the integator is more like the experiment which Mr. Mickle T. have done. I will try it tonight!
Best Regards,
szszjdb
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I suggested adding current to the output of the integrator. So this does not change much with normal operation, so no problem with self test or cal. It only changes the current seen by the output stage of the OP and thus possibly the settling. the change Mickle suggested was adding current to the input side and this way possibly shift the INL to other voltages. This could be still interesting, but it could interfere with ACAL and self-test. So this test would have to be with a very small current or a switchable current enabled only after ACAL. This effect on INL might give a little more information on where it comes from.
Another possible way that might improve settling of the integrator could be adding something like a 100 pF + 50 Ohms series combination to GND (what GND point to use is a difficult questions) to the input of the integrator. This could dampen overshoot seen in some older curves as well. Quite a few other DMMs use such an RC combination at the integrator and the simulation also shows some, usually positive effect.
Even if these changes would not solve the INL problem, a significant effect on INL (in either direction) would indicate that those points are somewhat sensitive.
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Hi,Mr. Kleinstein ,
Thanks a lot!
By added a 10K resistor from U214 PIN11 to U206 PIN4 , it seems no improvement and even worse after a quick turnover and the transfer test. The turnover error reached -18uv at 10V input ,in where it used to be -8uv. More INL test will conduct tomorrow.
Best Regards,
szszjdb
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If I properly understand, 10k must be added to U206 pin 4-6, isn't it?
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Hi,Mr. Mickle T. ,
Thanks a lot!
As the switch of U214 were closed in 10plc mode, I just connected the U214 PIN11 to -15v yesterday. I will try as your suggestion tonight.
Best Regards,
szszjdb
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Having the 10 K at the other side of the switches could cause trouble when the switches are operated, e.g. during self-test. The switch resistance would also have some effect - in the final rundown it is about 10s of µV. So the likely better position would be like Mickle pointed out.
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Hi,Mr.Kleinstein and Mr. Mickle T. ,
Thanks a lot!
Had corrected the connection of 10K as your suggestion, I got nearlly the same result as yestorday. After removing the 10K, the error of turnover at 10V recover from 16uv to 10uv as before. It seems the resistor added make more INL at very positive range. Attached FYI.
I have to mention that I performed external ZERO and internal DCV calibration each time when change made.
EDIT: After the INL test , the one which added 10k clearly shows the worse INL than the original ,especially in the positive range. So the resistor should be removed.
Further modified with the 100ohm + 50p connected from U205 PIN2 to C207 ground PIN, the INL is also worse than the original. Attached FYI.
Would like to have your advice.
Best Regards,
szszjdb
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I checked my integrator simulation again, and from that it is no big surprise that the 50 pF +100 Ohms did not improve much. It would likely take considerably higher capacitance to have a significant effect on integrator settling. The extra current source makes is even more complicated.
The negative effect could be due to more coupling from the extra parts.
For the extra current via the 10 K resistor the simulation / model of the LT1056 is not that detailed to include loading effects. So it does not help here. It is interesting and kind of a surprise that the extra current essentially amplifies the existing INL. Normally the positive range is giving less current load to the LT1056 compared to more negative voltages. So I don't think the extra current would have such a bad influence the output stage of the LT1056.
So my guess would be more like more capacitive coupling from the extra parts (one might be able to check that with just dummy wires to get about as much, or a little more capacitive pickup as the resistor) or possibly a not so perfect decoupling of the +-15 V supply.
p.s.
Testing extra decoupling at U206, U207 would be my next try. I is really odd to have a fast OP like the LT1220 without local decoupling.
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Hi,Mr.Kleinstein ,
Thanks a lot!
I had used the SMD chip for 100ohm and 50p, directly sorldering on PIN2 of U205 ,then connecting to C207 ground pin with a short wire. So the coupling effect should be small introduced by the parts added.
I will check the decoupling of U205/206/207 as your advice.
EDIT:
After adding the decoupling cap 4.7uf on both PIN7 and PIN4 of U205/206/207 to ground PIN of C207 , found slightly improved in turnover and transfer error test. But INL become worse than before. Attached FYI.
Would like to have your advice.
Best Regards,
szszjdb
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EPROM content of my R6581T (2006 yr):
U103 (SIS004246) is the same as in other DMMs.
U102 (SIS007342B) differs only in 2 bytes :-\
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So decoupling did have an effect on the INL, though in the first try the extra caps did not reduce INL. So I would not give up on this option, it more looks like a hint that decoupling is important.
There are a few options on how decoupling can be done. Going from the positive to GND and the negative side to ground is one option. Another way of doing decoupling is have a capacitor directly from the +15 V to the -15 V and a separate capacitor from only one side (with most OP preferably the negative side) to ground. A big question here is which ground point to pick - this is especially important when going to GND only.
4.7 µF suggest electrolytic caps - these may help, but they may not really help with the highest frequencies. At least between pins 7 and 4 on U207 is would make sense to have a MLCC cap (e.g. 100 nF), as this OP is really fast and normally requires good decoupling.
There is quite a bit of current circulating between U206 and U207, through R219/R220.
So a relatively tight coupling between these OPs supply can be good.
U205 should not cause much high frequency noise, it is more like the OP that can be sensitive to ripple, especially on the negative supply.
The other mayor current flow would be between U206, thought the caps and Q204 alternating to Q205. So the critical path is from source of Q205 (= GND) through Q205-Q204 C210/ U206 and back to ground.
One could also try to look at the supplies with the scope to see how much "noise" ringing in on the supply. However I would not expect much signal there, despite of the not so perfect layout.
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Hi,Mr.Kleinstein ,
Thanks a lot!
I should make more description on the detail what I had modified yestoday. The decoupling cap 4.7uf is the MLCC type and I directly soldered then on both PIN7 and PIN4 of U205/206/207 and connected them to ground PIN of C207 by a wire. I also replaced all the electrolytic capacitor 10uf to the larger one 100uf . Also recovered the original 20nf SOSHIN cap . After burn in for a whole day, found slightly improved in turnover ,transfer error and INL test , especially in INL of negative range. Attached FYI.
But the shape of the curve is still nearlly the same with the original. I suppose that we still have not touch on the key parts, which leading to the bad INL of the positive range above +5v.
The noise on the power rail are difficult to view by the scope. It seems ok so far.
Would like to have your advice.
Best Regards,
szszjdb
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For decoupling the connection to ground is a difficult point. The point at C207 may not be the best choice, as this goes to one of the OPs inputs and can be thus a more sensitive point.
The main modulated current flow should be from U206, through the integration caps, Q204 and than as the alternative path through Q205 to ground. So the logical ground point would be at the source of Q205. However this point is quite far away. So it is really difficult to find a good ground.
Even without connection to ground, a capacitor just across the supply of the OPs could help, especially with U207. This at least helps with the supply current variations of the OPs and also the current flowing from U206 to U207 (slower, but it can be quite some current). So essentially the same caps, but without the connection to ground. I am not sure if it is good to couple U205 closer to U206/207 - U205 is not producing current peaks, but it can be sensitive. So a cap across U205 pins 4 and 7 is likely good, but an extra connection to the decoupling of U206/207 might not be that good.
The shape looks really reproducible and so far worse with the extra caps. However as the general shape stays the same, it points to something like poor ground or decoupling as a factor. From the pictures the decoupling of the OPs looks poor - up to the point of violating the usual design rule that fast OPs need local decoupling at there supply (I would consider the LT1220 with 45 MHz GBW fast). So I would consider a cap across U207 as a minimum - a capacitor to ground may not be needed, if there is not much current towards ground.
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Hi,Mr.Kleinstein ,
Thanks a lot!
I cut the connection between each decoupling cap of U205-207, left the 2.2uf cap connected between PIN4 and PIN7. The turnover error is like it used to be ,the 8-9uv, no more improvement.
I also buy a LCR meter and check the integration cap C206 and got the good D reading in the 0.0007 range .Three pcs SOSHIN cap were the same result. Likely the error is not coming from the cap.
Further more,some of my friend told that he changed the U205 to LTC1150 and U206 to OPA140 ,that make more improvement for the turnover error from 18uv to 4uv. The key is the lower IB comparing to the original OP177 said.
Would like to have your advice.
Best Regards,
szszjdb
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The sensitivity to decoupling and small changes around the OPs is in way related to the way the integrator ins settling on switching. My hope was that better decoupling could do the trick, as the decoupling on the original board is kind of poor. The problem however is that this a range the direct changes stay invisible to the scope. So these changes are kind of random/blind search. The capacitance directly at the OP might be worth keeping, even with other changes.
I also though a little about changing OPs. In theory other OPs could give faster/better settling and maybe slightly lower noise. However I would not expect that much less sensitivity to ground / supply problems.
The LT1056 is not that bad, it is reasonably fast and should be fast enough for the relatively slow modulation. A faster OP could reduce the input voltage at the integrator. The OPA140 is lower noise and faster, but this might also make it more sensitive to decoupling, supply problems. An OPA134 would be another candidate - slightly faster than the LT1056 and with a low distortion output stage.
The OP177 (U205) however might have three weak spots: it is rather slow and as a BJT OP might get nonlinear with high peak input voltages (e.g. > 50 mV). In addition the current noise (related to bias current) is relatively high - this contributes to the ADCs noise. The OP140 (or the cheaper OP141 with slightly less testing, but otherwise similar) is a good choice - it could also replace the OP177 (U205). The low frequency noise is even better than the the OP177/LTC1150 in much of the relevant frequency range. Another possible alternative for U205 would be the ADA4077 - though it might need an adapter board, as there is no DIP version.
The LTC1150 is relatively high noise and might thus not be a really good solution.
Depending on the OPs used, the optimum ratio R216/R217 might change. The tendency is that a faster OP for U205 (relative to U206) would like a lower value for R217. However the current 10K/1K ratio is already more suitable for a fast U205. Ideally the output of U205 might show an amplified signal to represent settling of the integrator, though superimposed with charging of C207. For testing settling one could short out C207.
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Hi,Mr.Kleinstein ,
Thanks a lot!
I will find some OPs to replace U205 in the ADC. By now the U205 is AD707K, which was OP177 in Mr.Michel's schmatics.
How about the possible leakage of U214?
Best Regards,
szszjdb
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I don't think leakage of U214 is a problem. If at all the effect would be mainly with the fast mode. The on resistance of U214 also plays a role - so a different resistance (higher of lower) switch could cause trouble.
The switches a behind the integrator and thus it is leakage fighting on resistance. U214/1 leakage might cause some effect in the fast mode, bit likely just an offset.
For the U205 replacement I would consider the OPA140/OPA141 or maybe OPA145 the best choice.
ADA4077 would be my second choice.
I am not sure the LTC1150 would really be a good choice, because of the relatively high voltage noise.Current spikes could also upset the LT1056. The DMMs that use an AZ OP in the ADC integrator usually add some extra filtering and use it for very long integration (e.g. > 100 PLC).
One could still think about a faster replacement for U206, as higher GBW would lower the step function that U205 has to compensate. For the fast reaction the on resistance of U214/4 is in series to C206. Thus initially only C210 is effective. This might explain the initially rather large peak after switching. So if U205 is BJT based it might require a faster OP with U206 to keep the initial peak at the integrator input below about 50 mV. Faster alternative to the LT1056 could be OPA140, OPA604, TLE2081, OPA134, AD744... - quite a few choices. A slightly larger value (e.g. 1 nF cap in parallel, directly at U206) for C210 could have a similar effect.
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Unfortunately, changing the U107 OP07D to a faster one makes some instability while the input amplifier is in fast mode (an occasional 57 kHz oscillations at cold start of DMM, selftest fail).
Attempt to replace U107/U104 with another opamps (TL071, OP177, OPA604, TL081) don't help at all with 1-10 MOhm transfer error (+200 ppm) :-[
But there is a good news :-DMM The main purpose of R170 isn't zero offset related (of course, because DMM have a close-case calibration). With only a two measurements of startup thermal drift in non-AZ mode (with end positions of the R170), you can adjust the R170 to minimize the input amplifier offset TC.
In my DMM the R170 can linearly adjust the TC in the -19 ... +4.5 uV/C range.
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Replacing U107 / U104 with faster OPs should mainly make sense if both OPs get somewhat faster. U107 should be relatively uncritical, as it is only configured as a follower. I am somewhat surprised that just changing U107 could cause oscillation. A faster OP might want local decoupling, e.g. a cap from the +15 to -15 V at the OP. If at all I would have expect much fast oscillation through capacitive coupling from the guard traces. I am not sure how the inductor at the OPs input effect a JFET OP.
U104 is much more critical, as the compensation of that OP is what mainly determines the loop gain of the whole slow DC amplifier - there is no local feedback. So the OPA604 would be definitely too fast here. The OP177 should not be a big advantage over the OP07, it is still slow and still BJT based. The TL071 worked with Szszjdb, but not all of them may be equal. It might be possible to add a bit of local FB (e.g. a small cap (e.g. 10-50 pF) from output to inverting input) - not sure if it helps. Reducing R138 a little could also help as it reduces the high frequency gain of the FET stage.
A small step would be using an TL031 - only 1.1 MHz GBW and thus only a little faster than an OP07. The higher slew rate than the OP07 and thus larger linear range (up to the point where the diodes limit) would still make the amplifier considerably faster, though not clear if fast enough to avoid forward gate current in all cases.
The main reason for the faster OPs was to allow the guard and gate drive to come down faster. This was to avoid leakage in AZ mode with negative input voltages, especially in 1 PLC mode. So this leakage current would be the first point so measure. Depending on the gate threshold some meters may show more or less of this problem.
The effect on the high Ohms turn over was more like an extra. Here it might take a little extra slow down for the gate for Ohms High (pin 26 of the MUX). Something like 100 pF, maybe in series with about 1K (to limit peak currents) towards ground should slow down the switch to about the level of the DCV input. Otherwise the amplifier could be still too slow to follow. The other inputs should not be that sensitive to small current peaks or should not have a highly negative voltage. So no slow down needed.
Having the trimmer R170 to adjust the TC in non AZ mode makes some sense. Though the adjustment procedure could be time consuming.
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Hi,Mr.Kleinstein and Mr.Mickle T. ,
Thanks a lot!
Yes I have just tried the TL071 and found no issues till now. Maybe the replacing of the decoupling cap of power supply help to stable working.
I will reconfirm the transfer error in 1M/10M range. But the latest record of the error is just 20ppm, I don not know if it still in normal range? I am using the foil resistor which should have small heating effect. So the error is likely unacceptable?
My OP140 is on the way, but I am still thinking about the the real reason for the bad INL in the positive range. What kind of aging could be the source of the INL? The integration cap have been tried and found no issue. The OPs and the U214 should have very small aging effect. The decoupling cap have been added and also the electrolytic capacitor in the power supply board. What might be missing? The leackage of the MOSfet switch of the current source in ADC?
EDIT:
What might be the main purpose of using AD707/OP177 in the 1st stage of all the compound OPs from the view of ADVANTEST? The lower drift of 0.1uv/C? How about to change all the 1st stage like U104/U105/U200/U202/U205 to OP140, in where the drift will be 0.35uv/C? Now I am using the TL071 for U104 which has 18uv/C drift and have not got the idea to detect the drift.
For the transfer error of 1M to 10M, I found out the same reading as last time but in the HI power mode. If tested in the LOW power mode, it is really around 200ppm. Attached FYI.
Would like to have your advice.
Best Regards,
szszjdb
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The purpose of the compound amplifiers is to have the high precision (low bias, low drift and low frequency noise) of the OP177 (or similar) and the high speed of the LT1056.
For the integrator, there is the additional purpose of the second OP to reduce the residual input voltage of the integrator. A single OP integrator would have a input voltage that is not that ideally close to zero, more like U_int_in= I / C_int / ( 2*Pi*GBW) - not that sure about the 2*Pi factor. This would result in a voltage of a few mV to maybe 10 mV. The 2 OP integrator helps with this, and there will be only a short peak in input voltage when switching. The additional OP (here AD707) is responsible for the low frequency part (about up to GBW / 10), while the JFET OP is responsible for the rest and the main integrator current. The power dissipation in the JFET part can depend on the input voltage, while the slow OP will see very little load and thus not suffer from much self heating. So the low frequency part can be more accurate.
The precision OPs in the ADC and the current sources need to have low LF range (e.g. 2-30 Hz) noise with not that much current noise as they are used with a effective impedance in the 10-20 K range. Low drift helps and can be relevant for the the non AZ mode for the current sources. Zero drift of the OP in the integrator is corrected even in the non AZ mode with the analog zero function around C208/C209. There is additional drift from R200 matching - so low drift of the OPs is good but not the prime parameter.
The OPA140 is a new part and was not available back than. It has low frequency noise (e.g. 1-10 Hz range) comparable to the AD707, but essentially no current noise. The higher speed could make the integrator settle faster (provided there is good decoupling etc.) - the low speed of the AD707/OP177 could be a reason for the relatively slow modulation during run-up and thus large capacitor. In the current source just an OPA140 could likely replace the two OPs.
Replacing the AD707s in the integrator and current sources could result in somewhat lower noise in the 1 PLC mode. Not so sure at 10 PLC, as at 2.5 Hz the noise level of AD707 and OPA140 is about equal. The noise without AZ might even get a little higher if the current sources are changed. The higher speed of the OPA140 can be an advantage in the integrator, but might need a change in R217 (smaller value, like 330 or 470 Ohms). Higher speed could also help when replacing the LT1056 - higher speed here means smaller step for U205. So I don't see a good reason to change the current sources too.
I still don't know the real source of INL. One part seems to be related with ringing or decoupling on U205-U207. If changing U205/U206 really does a significant improvement (or just a change) it points to settling of the integrator. Here maybe just normal scattering (maybe aging making them slower over time) in AD707 / LT1056 speed or ringing could be a reason. For aging the (electrolytic) caps at the +-15 V would be the prime candidates, but these seem to be already changed with no effect.
The switching MOSFETs seem to work - otherwise the self test should give an error. There might be some drift in switching level and this could effect the transients produced on switching. So one could try to adjust the substrate voltage a little (e.g. change R215/R214) to something like -4 V or -2 V. This should slightly change the timing on the switches (e.g. brake before make time) and this way could effect charge injection and ringing. A point to look at with the scope to see an immediate effect could be the drains of Q204,Q205, looking for something like a short small but distinct positive peak on switching. The output of U204/2 (= substrate voltage) should not show much switching spikes - if so one could consider adding some load (e.g. 1 K to GND) here.
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Hi,Mr.Kleinstein and Mr.Mickle T. ,
Thanks a lot!
Confirmed that oscillation occured when changing U104 to opa140, even with TL071 , there has some small oscillation when in X100 mode which I have not noticed before. Some of the resistor like R138 need to be changed.
I also changed the U205 to OPA140 , working but need more time to capture the reading, so report tomorrow.
Best Regards,
szszjdb
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The pictures already showed quite a lot of ringing when U104 was changes to the TL071 - so in this case it was close the the limit. Other samples / meters might oscillate with similar change. That the OPA140 would not work for U104 is no surprise - it is way to fast. For U104 one would ideally have a FET OP a little slower and/or with more phase reserve than the TL071.
With (small ?) adjustments to the compensation the TL071 could be OK. However this is not that simple: the slow DC amplifier uses a kind of 3 pole compensation that needs to be adjusted for each gain setting. There are BW limits for the LT1220 (might be relevant with high gain, but not that bad) and the JFET input part. So U104 can not be very fast, but a little more than the slow OP07 should likely work, though it is a little hard to tell how fast the JFET part actually is with the parasitic caps. Compensation adjustment for gain 100 would be R122, gain 10 with R123 and gain 1 with R138.
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Hi,Mr.Kleinstein,
Thanks a lot!
I will try to modify the resistor for compensation of U104 . But I am still worry about the candidate TL071 for its 18uv/C drift and 18nv/square root(hz) noise vs the 0.3uv/C drift and 8nv/square root(hz) for OPA140 or similar AD707. How could these contribute to the system drift and noise performance? I prefer to modify base on OPA140, should I?
For the fast test of the u205 OPA140 (with u104 TL071), the turnover error seem no big change. More detail test will be conducted tonight.
My friend have tried to add a LT1056 buffer between the U206 and U207, finding small improvement on the turnover test. How is the idea?
Would like to have your advice.
Best Regards,
szszjdb
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An extra buffer between U206 and U207 is odd. It would add some delay that could become a problem during rundown and the zero phase. The current from U206 driving the input to U207 should be covered by local decoupling around U206/U207. So I don't think it should be such a problem.
As one difference between positive and negative input voltage is seen in the length of the comparator pulse (much longer with the positive input), one could test reducing R205 to reduce the hysteresis of the comparator a little. This would shorten the pulses a little and might be enough to avoid U207 to reach it's positive limit, as it is done now with positive input. It's kind of a long shot, but only a small change.
I would consider to also replace U206 with an OPA140 or another slightly faster OP than the LT1056 (e.g. TLE2081, OPA134, maybe even OPA604). As there was quite some effect of loading U206, the output stage of U206 could have an influence. So a good quality socket for U205 and U206 might be an idea.
With just U205 replaced with the faster OPA140 one might have to reduce R217 to something like 220-470 Ohms. The divider after U205 kind of reduces the BW of the extra OP in the integrator. With both U205 and U206 replaced with OPA140 the original 1 K could be about OK. In principle could might be able to tweak the response of the integrator with R217, but the original relatively slow response seems to be good enough.
For the amplifier part U104 noise and drift are not that critical. The JFET input stage has a gain of around 30-80. So drift and noise of U104 would be attenuated by this factor - a little less at higher frequenices. From this the TL071 should be good enough. The bigger problem with the TL071 is the ringing / tendency to oscillate - this might be coped with with changes to the compensation. Another possible factor could be the open loop gain, that is much lower with the TL071, this could effect the linearity of the amplifier a little. However some of the higher gain of the OP07 is at very low frequencies and thus likely not in effect with the AZ mode. Still the TL071 was just a first guess / standard part. Ideally I would like to have something like 2-3 MHz GBW with good phase reserve and high loop gain.
OPA130: rather slow (1 MHz GBW), but still faster than the OP07 and higher slew rate and good open loop gain.
TL031: only slightly faster than OPA130, but less loop gain and higher noise / drift (still not too bad)
AD820: moderate speed (1.8 MHz) and higher loop gain than TL071 so possibly a good match.
LT1055: slightly faster than TL071, but seems to be good phase reserve.
OPA145 (slow brother to OPA140): slightly faster than TL071, but looks like good phase reserve (at least the higher frequency end) and good loop gain. Those faster OPs would likely need a change in compensation. The OPA140 is even faster and would definitely need a different compensation, maybe even with the LT1220 part.
The change in compensation would be slightly lower resistors for R122, R123, R138. For the fast ones with high loop gain (e.g. OPA145) a slightly higher R125 would also be an option. In principle slightly smaller caps C120 / C113 could be possible with a faster OP and changed resistors - this would be for faster response, not for less ringing.
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Hi,Mr.Kleinstein,
Thanks a lot!
I have performed the INL test for U205 OPA140 after burning for a whole day and the result is more like the old one. Attached FYI. There is still have a turning point above +5V, which leading to the bad INL. It seems the issue is not in the integration unit, might in the slope or the comparator. Agree with you to change the parts in the comparator. I will report later.
As just got OPA140 inhand for U104 , I will try to parallel some resistor on the compensation parts and check with the scope. If it is too difficult keeping stable, I will find the proper OPs you suggested.
Best Regards,
szszjdb
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The OPA140 is kind of overkill in the amplifier (U104). R122/R123/R138 would likely need to be reduced a lot (like 1/2-1/4 the original value).
The INL curve look somehow different from the curves shown before - not just the new data, but even more the old state ! Looks a little like the _ori curve swapped positive and negative range.
The most worrying part to me is the drop in the -1 /0 region. This could effect the ACAL a lot.
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Hi,Mr.Kleinstein,
Thanks a lot!
Having added 22k resistor parallel on R205 , found nearly no big change on the turnover test.
The different of the original curve to the new captured on May.4 might come from the way I get the V source. The newly is measured with negative range of 6581 and ohters is with the positive range , so there must have some more DNL than others.
Best Regards,
szszjdb
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I has restore the U104 to initial OP07D and changes the U107 to OPA604 and make it's connection like HP 3458A. No visible improvements in 1-10 MOhm transfer. The same 200 ppm |O
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If just using a slightly different test procedure changes the INL curve so much, this should need some extra tests to make sure the curve is really showing typical INL and not just random samples of DNL. So it would make sense to look at some area more detailed (e.g. -1 ... 1 V range). If DNL would be the reason, just a small shift (e.g. with the pot in the DCV amplifier) could have a significant effect. So I kind of doubt DNL would be the reason, as the early INL curves were pretty consistent, though split in positive and negative side.
I could imaging using the positive or negative sign for measuring the voltage steps could make a difference, especially if these are mixed like changing the sign, or using the same sign for all steps. An DC offset of the DMM would also make a big difference especially around zero. So the details on how the INL test is done could be important.
Still the -ORI curve looks kind off strange, like the x-axis mirrored. It's not just the curve but also the Err data in the table.
@Mickle T:
For the Ohms range error it might be interesting to use a scope to check if there are significant current spike on the Ohms_high input. I suspect a current spike similar to the DCvolts with negative input voltage - maybe even worse as there is no extra capacitance to slow down the switching. If the spike is causing the ohms error, chances are the error depends on capacitance / cable length. Besides the Ohms one could also check the input current in the volts range (e.g. capacitor discharge in 1 PLC mode). The change in input current is likely the more obvious effect of a faster amplifier.
For the amplifier, just changing U104 or U107 would not change very much. The slower of the two sets the speed. From the curves/test shown earlier by szszjdb, it would not need an OP as fast as the TL071 for U104, just a little higher (e.g. 3 times) slew rate might do the trick.
Even with the slightly faster amplifier this might not be enough to fully avoid the current spike on very fast switching. For the Ohms error is might be more effective to first slow down the switching. Amplifier speed-up would be more for reducing input current for negative volts if the slow down is not enough. Depending on the FETs there might be no need for much speed up - at least some of the DMMs should work a planed.
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I wish to draw attention to the fact that my new guard driver connected to input of the Input Amplifier, not to the output.
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Hi,Mr.Mickle T. ,
Have you selected the HI power for ohm transfer test? I found 20ppm error when in HI power mode and 200ppm in normal mode.
Best Regards,
szszjdb
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Yes, I selected a hi-power mode.
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Connecting the guard driver to the input side makes sense - no more fast main amplifier needed this way.
So if the input current is low enough this should solve the amplifier speed problem easier than changing U104 and adjusting compensation.
With problem also happening in normal mode and thus only 1 V at the resistors, there seems to be additional other problems with the high ohms, not just a switching speed problem.
Besides the Ohms measurement itself the problem could already be in the ACAL process to adjust the low current ranges and the small current sources. If possible (could be a bit tricky to find a suitable current source) one could also check the low current ranges (e.g. 10 µA, 1 µA, 100 nA) for transfer errors. Chances are if the external 1 M test shown an error the ACAL of these ranges might show a comparable error.
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Test #2. Adding a 5100p polypropylene capacitor to 1M shunt network, used in the 1-10 MOhm ACAL transfer.
Have no influence to the transfer error. The same 200-220 ppm :(
Got a precision RLC tweezers HB-14. Measured all of the timing-critical capacitors. Schematic diagrams updated: https://drive.google.com/open?id=1W_mHC8tUDo2giVsW7xclBpsvdcY52O6G (https://drive.google.com/open?id=1W_mHC8tUDo2giVsW7xclBpsvdcY52O6G)
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Thanks for the updated schematics.
For the higher Ohms range there are a few relatively simple tests possible to get a few more indication in where to look for the error.
One would be testing the low current ranges (e.g. 10 µA, 1 µA, 100 nA used for calibrating the ohms sources). Another DMM in ohms mode might be a possible test source for a stable low current to test the same current in adjacent ranges. It could be still tricky with noise, but a 200 ppm error is quite a lot to look for.
A second possible test would be checking the ranges with a different resistor (e.g. 500 K) so that a lower voltage is used during Ohms test.
A third possible check would be the output admittance of the current sources. So compare the current of the Ohms current source (e.g. 1 µA or 100 nA) with changing series resistor. Ideally the current should stay constant, but things like leakage of some of the FETs Q402-Q406 could cause a significant change in current.
Similar a variable input current of the DMM (e.g. MUX or main amplifier) could contribute. 200 ppm of 1 µA is just 200 pA - not impossible to find leakage in the order of magnitude either in the MUX, DC-amplifier or Q402-406. The input current of the amplifier is not necessary linear, like a constant resistance.
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Hi,Mr.Kleinstein,
Thanks a lot!
Having changed the U206 to OPA140 with the U205 OPA140 and R205 12K||22K, the turnover error curve shift to the negative side. But the shape is still like the old one and there also have a turning point around +6v. It seems the positive gain dropping so fast above +6v . So the issue is still hiding somewhere. Attached FYI.
Best Regards,
szszjdb
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The curve for the turn over error as a function of voltage looks quite different now. Having small errors a low voltage is kind of a good thing as the 1 V point is used quite a bit during ACAL. Having a low turn over error at low voltage is also kind different from the dip at -2 V to 0 V in the INL curve before (maybe shifted a little to 0, so that one would no notice it anymore in the turn over test).
There is quite a bit of up and down. So I am not sure one how much if the errors is due to noise / reference drift. A few more points could help.
How are the data taken ?
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Hi,Mr.Kleinstein,
Thanks a lot!
Using a ADVANTEST R6142 as a voltage source( LT1021-7 inside) , the nosie would be around 3-4uv in the 10V range. When setting to a voltage ,waiting for 10s and using the statistic function of 6581 to capture the average of 10 records. Then changing the polarity by exchanging the plug. Although could view some drift , the result is still repeatable. This is the way I got the turnover data.
And I have a fast method to detect the turnover error by LTZ10v and 7v. The reading is stable enough and have the same trend like above.
For INL test , I am using the resistor string powering by LTZ1000 for the lower noise and stability.
I havn't view the output waveform of the integrator and sloper and will check them tomorrow.
Best Regards,
szszjdb
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I did a view more thoughts on the INL caused by DA - not just for the 6581T but also in general.
As far as I understand it, there would be two effects:
One is a fast one, that can give an error in the rundown phase. Depending on the end of the run-up phase there may be some charge lost, especially if the time of the rundown phase changes. So if the run-down is done in a way to include a waiting time just before the end to make up for a variable length, the effect should be rather small. The error would be more like DNL or short scale variations in INL. So this would be not what we worry about here - at least not yet.
The second effect is more of the slow part of DA. This is the capacitor remembering the average charge over a seconds to minutes time scale. This would carry over charge from one conversion to the other and this way cause errors. This would be especially with the AZ mode as the effect would be doubling because the difference in calculated. In non AZ mode the effect should be much smaller, with sufficient waiting time. However precision measurements without AZ are also a challenge. So likely not possible, or at least very difficult.
An important factor would be the average voltage at the integrator output and this depends on the type of ADC, especially the run-up feedback. One could also directly measure this voltage directly from the integrator output. No high accuracy needed (+-1-10% would be OK), just take care of the superimposed AC part. A 10 V or similar range with an averaging meter should be OK. Doing the test in non AZ mode should give less scattering. This way one would at least know to a reasonable approximation the shape of the INL contribution caused by DA - the amount would still depends on the capacitor.
I kind of have a feeling (and some indication from some earlier scope results), that the average integrator voltage could be more like constant with some odd variations in the negative side and about a parabola for the positive side. This could be roughly the shape of the observed INL.
One point likely not very well known to the EE community, but kind of basic background to those looking at relaxation processes is that DA can be quite temperature dependent: a higher temperature speeds up the DA effect and this thus brings the time constant closer to critical 1/10 s range. So INL caused by DA can depend on temperature a lot - like doubling with 10 K higher temperature. This might be a reason why the caps are that far separated from the OPs.
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I kind of have a feeling (and some indication from some earlier scope results), that the average integrator voltage could be more like constant with some odd variations in the negative side and about a parabola for the positive side. This could be roughly the shape of the observed INL.
Exactly, that was my deduction too.
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Hi,Mr.Kleinstein and Mr.Mickle T.,
Thanks a lot!
For the DA effect detecting , what is the proper model name of the averaging meter ?
I agree with you that the shape of the INL is as your description and the MAX. error should around 0.2ppm. The unit which have bigger INL must have some defect.
I am still doubt that the bad INL is mainly caused by the aging of some part. There have 2 sample unit which have the perfect turnover performance
in the community . One is from EUROFOX and the other is from my friend XIAOMING. The error of 1v/7v/10v are both below 0.2ppm of 10V range. The same with these unit is that they are few used and the VFD is bright like the new one. Can we suppose that most of the used 6581 were meet the spec. when start using and became out spec after operating for many years. Aging might be the proper explain of the different performance of each used 6581. Based on what I had tried, the OPs seem have few aging effect. The INT cap still looks good. The left would be the network resistor and the JFET or MOSFET in the ADC part. My fiend have ordered the R200 from VISHAY and will get on July . How about the aging of the FET left? Ohters resistor and cap seems not so critical ,right?
Would like to have your advice.
EDIT: Some doubt the SD215DE, the leakage drift with temperature. This might explain the better turnover error when in cold state.
Viewed the Q204 drain with scope ,seem normal together with the U204 PIN7. Attached FYI.
Best Regards,
szszjdb
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Thank you for the curves.
The yellow scope traces looks odd, neither the substrate, not the drain voltage should show that much amplitude. Ideally both would be more or less flat with some switching artifacts.
The yellow trace looks more like the gate signal - though only 4 V and with a slight slope in the top part at the first case (+10V). That slope looks odd an could be enough to cause ppm range INL. However it could be some kind of ground problem or just a poorly compensated probe too. If the curve is the gate, it might be worth looking at the supply of U301 - this should be relatively clean with not that much variations. Some 10 mV of change there could cause ppm range errors.
If the curve is really Q204 drain, this would point to some kind of defect around Q205.
The ringing with the red curve looks about what is expected with again the problem that much of the ringing could come from the ground of the probe or the ground bounce in general.
I don't think the SD215 leakage would be a problem with the ADC. The voltage across the FETs is small (e.g. < 50 mV range worst case, and more like < 10 mV for those for the fine slopes).
FET leakage could be more of a problem in the Ohms current sources and could thus be a part of the high ohms problem.
Better turn over values could also be due to more DA effect at higher temperature. I have not measured DA as a function of temperature - maybe I should do that (I currently have a circuit on the breadboard, that might work for this purpose). Anyway the physical theory on DA and the old time dependent DA data I found strongly suggest that the error due to DA will be highly temperature dependent - about in the exponential way known for leakage currents. So the temperature dependence would not be a good way to distinguish DA from leakage.
For measuring the average integrator voltage (I.out=TP201) most voltmeters would be OK - just some of the Fluke / Phillips bench top one with a S&H stage might show excessive noise. So the 34401 or just a normal handheld one would be OK, just turn of autoscale and use a 10 V or higher range. It would be interesting to see the curve of integrator voltage (in non AZ mode, like 10 PLC) versus DC input (or DC reading), with enough point (e.g. 0.5 V steps) - no high resolution needed for this test. It would be nice to have INL curve for the same state (circuit changes) of the meter too.
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Hi,Mr.Kleinstein ,
Thanks a lot!
The yellow curve is the COUT , the comparator output. Re check with scope and attached Q204 gate and source waveform.
Also test the average DCV from the IOUT point.Attached FYI.
Best Regards,
szszjdb
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With c.out for the yellow trace this makes sense. Still the slightly odd slope, but I don'T think this would be an issue.
So the gate, drain and substrate signals look reasonable OK. There is still quite some noise - likely from not having a good ground point near the test-points.
The integrator average voltage is a little different from what I had expected, but not that much. Around 0 there is quite a large step. So it could make quite a difference if the amplifiers offset is so that the zero is on the left or right side of the step. The curve shape should not change with small changes (like change in OPs, decoupling etc.) and I don't expect it to change much from just a little drift. There is some similarity to the observed INL, but not that much to explain most of the INL with DA. In the observed INL the jump at near zero is not that bad compared to the slow drop for positive voltages. So there must be significant other sources. Still I consider it a step forward to know the shape of DA caused INL error.
I would consider the step from 0 to -0.5 V a possible problem for the ACAL procedure as quite some critical readings are at 0 V and -1 V. Some lucky (can depend on tolerance in amplifier offsest, R200,R201 and a few other resistors) meters might have the step between 0 and 0.5 V and thus are expected to be behaving better with ACAL - but I don't see a reason how this should effect INL.
The rather high average integrator voltage with negative input suggests that there are quite a few cases where the current sources S1024 is switching off without the comparator triggering, but from some time out. One could see some of these in the I.out curves shown earlier. This could lead to some error from capacitive coupling between the slope amplifier output and the S1024 current source. In this context it looks really odd that the switch U100/4 (switch at the input amplifier) is used at the slope amplifier. This requires rooting the high speed signal from U207 all the way to the switch at the other side of the FPGA and close to the current sources. That is one off many odd placement choices. For me the extra capacitance alone would be a big no-go for this :-//.
So the more I learn about this DMM, the more it surprises me that there seem to be well working ones.
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Hi,Mr.Kleinstein ,
Thanks a lot!
The jump from positive to negative might caused by the different runup waveform shape and there have more small slope in a single runup section. I don't know why ADV design to. So the DC portion of the IOUT might change more.
You means to cut the line to U100/4?
Best Regards,
szszjdb
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I don't think the design intentionally planed for the jump in average integrator voltage. I would more guess that the feedback system they came up with just worked this way. For the positive voltage side the simple system with comparator at zero and switching at a fixed time at the upper end works and is a simple stable feedback system. However for the negative inputs the system in unstable when you look at it from the point of linear theory. So they had to add something - like a kind of timeout. This changes the feedback loop to a different type and thus the different voltage, that happens to be considerably higher.
I would not consider the higher voltage cause by a defect or aging that is just the other way of operation. So it might depend on the firmware (FPGA) type - in theory there are other options to make the run-up control, that could reduce the voltage swing and thus DA errors. However I kind of doubt there is a very different (better version). The version I have in mind might need a larger FPGA - at least more functions than currently used.
I think we just have to accept that there is this type of DA error with very little to do about it - at best maybe measure the capacitor temperature and do a numerical correction if needed.
The use of U100/4 just looked really odd to me. I don't think it would be really worth cutting that line(s). The odd design choice might contribute to INL, but this would be a fixed part - so all units should be effected essentially the same. The error would be about proportional to number of comparator pulses seen. So if one has a suitable frequency counter at hand one could just measure the comparator pulses for a few voltages. This way one would have an approximate curve on how this INL contribution could be shaped - still no idea on how strong this effect is. It might be to small to be noticed, but it is hard to estimate capacitive coupling and its effect, so we don't even know the sign.
Possible point's worth checking might be more like the substrate voltage to the MOSFETs. The used -3.x V must not be the best value and a shift in MOSFET threshold is kind of possible due to aging.
Another point where one might try a small change would be adding a local decoupling cap for U301 (the HC74 driving the switches). The supply to U301 could be kind of important as it might effect the exact switch timing.
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Hi,Mr.Kleinstein ,
Thanks a lot!
Had an idea that adjust r170 to compensate the turnover error of 10V, but seems have no effect to.Every time it was changed, after a calibartion, it recovered. The error of MAX-MIN is still arround 15uv , just like the first time when I start investigating the error. That is to say the error is so stable and nearly no change after modification for 3 Month. What a strong ADC I never imaged.
I will try the last 2 method tonight.
Best Regards,
szszjdb
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The main use of R170 would likely be to adust the TC of the non AZ mode. Having a low TC here could also help to reduce noise (due to thermal fluctuations) a little. Small changes in the amplifier offset would not be enough to have a significant effect on the overall DMM performance, as there still is the digital offset compensation.
It would be only if the shift in offset is large enough to shift the zero point between the two cases for average integrator voltage and thus different levels of DA caused errors, that I would expect a significant change. The 10 V turnover error is still rather large and thus might not be that sensitive to such a small test. It would be more like an 1V (maybe 0.1 V) or similar turn over test that might show a difference. There could also be a change in the noise - especially if the zero point is just at the boarder from stable feedback (and thus 1.7 V DC level at the integrator output) to the unstable case (2.9 V DC level). So it could be interesting to see where this critical point is - it could be just outside the range covered with R170. For this test is might be important to keep mains hum low, as added hum might smooth out the transition. This also applies to the low voltage INL test described below.
The odd thing with the turn over tests is that there seem to be a more of less constant turn over error at low voltages - this is odd and would suggest something like a rather large localized error somewhere at low voltage ( < 1 V) or an zero offset that is way off. So it might be interesting to get turn over error data for much smaller voltages too, so to see where the transition from essentially 0 (must be 0 at 0 V) and the near 10 µV value.
An 10 µV error at those small voltages is much worse than the slow drop in gain at more than +5 V.
I have a slight suspicion this low voltage error might correlate with the change in integrator average voltage.
If the error is very localized at a low voltage (< about 100mV), one might be able to do a rather direct low voltage INL test with the calibrator: uses a resistive divider (e.g. 1:100) at the output of the calibrator to get good resolution 0...100 mV voltages. The calibrator (or 2nd meter to check) would only need to be accurate (linear) to divider ratio times about 1 µV - thus something in the 100 µV range.
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Hi,Mr.Kleinstein ,
Thanks a lot!
Checked the turnover error within the 1mv to 1V range ,found nothing odd. Attached FYI.
Also added the decoupling cap on U301 and change R215 to 4.7K, the result seems no change.
Would like to have your advice.
Best Regards,
szszjdb
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The turn over errors at 1 V looks quite a bit smaller than in the curve shown before. Is this due to some circuit changes, a lower temperature or some other effect ?
To understand why the curves are sometimes different, it might be worth to have a kind of thermometer at a few points in the meter. One point could be somewhere near the R200 (the TC of R200 might include higher order parts that can become relevant. Another point could be near the integration capacitor, as DA is likely temperature dependent. This might help to understand why curves sometimes look different. For the capacitors there might be the option to try local heating (e.g. by some 10-20 K?) to intentionally increase DA for a test.
Changing the substrate voltage (r215) it is a 2 sided thing. Too negative and the peak at the collector of Q204/q205 is expected to become larger. With too positive a voltage there can be cross conduction - however don't know if this would be much, as the voltage should be small. So it is not clear what to expect from such a change. The SPDT switches used in some other meters tend to have a much longer open phase. So I would more tend towards a more negative voltage.
Coming back to the negative effect of an extra load to U206 one might repeat the measurement of the effect of input voltage on some of the supply voltages. So use input voltages like -10 V, 0 and +10 V ( no need to be accurate or stable) and measure effect on a few point with a relatively good resolution, possibly with a few repeats to suppress noise from natural variations. The supply to U301 would be one such point to test. Other points could be a few ground points (e.g. C207, U211 pin 3, R236 (1 K used for analog zero). For some of these points (especially the ground) it would only take small changes to have a significant effect.
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Hi,Mr.Kleinstein ,
Thanks a lot!
The 1V point error would likely changed with the trimmer R170. It will shift the turnover error curve but can not suppress the P-P error of the 10V range in my case and it is still around 15-18uv which make the INL curve more parabola like, especially the deep jump above 5V. Maybe the R170 have another purpose to compensate the INL of ADC?
I have changed the original INT cap to the MLCC C0G one for the lower ESR detected by a LCR meter. Likely a little better performance.
The stable temperature in the housing would change as the room temperature had changed for about 10C since Feb. The DA would likely effect on all the 6581 and have not big change unit by unit. So maybe the DA would not be the main reason of the bad INL?
For the load test of U206, you means to use the scope or the DMM to measure the voltage change on these PIN?
Best Regards,
szszjdb
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DA can be different between caps of the same type. Pure PP would have very low DA - so it is likely something like impurities like water or solvents present in the caps that cause DA. Especially aging by ingress of water is very possible. The ESR of the integration cap is not an important factor. Sometimes there is even an intentional series resistor in the circuit to help speed up the comparator response. Here the on resistance of U214 to a certain degree will take that part. However ESR is also somewhat related with DA: a capacitor with high DA will usually not show very low ESR, as it would dampen the capacitor self resonance just like ESR would. However this should not be that relevant for low loss caps like C0G of MKP, maybe with X7R or similar.
Sill C0G caps could be about as good as the original PP type. However not all C0Gs are the same and DA is usually not specified. I see a slight chance they could show less ageing.
The INL curve does not fully follow the average voltage curve for the integrator - so there must be other contributions to INL, but it looks like DA is a significant part of it, as the curve has quite some similarity. So far I think I understand at least the slow part (the largest part of the DA) of the DA effect quite well. So if we could measure the DA of the used capacitor one could calculate the effect if the DA on the result. So maybe we could find a simple method to measure the DA of the capacitor in an external test circuit.
We had a test with a resistor from the output of U206 to the -15 V, and this change had a negative effect on the INL. This was kind of unexpected (I had a little hope for an improvement, but expected no real change as the likely result). A possible explanation for the negative effect was loading the -15 V (and +15 V as well) and this way make this voltage change a little with input voltage. Though I don't know how a change in the +-15 V would effect the ADC result, it does not take much to get ppms of change. I know we had that before, and the test at that time gave no result. But maybe the change was to small to be noticed - this can be tricky if there are large natural variation. The general idea behind measuring points like the supply is that there are quite a lot of possible 2 step processes that could contribute to INL: Input voltage changes the load currents to some supplies and GND points. This can change those voltages a little. For different reasons a change in supply could than cause a change in the result. Detecting those intermediate stages could help, as often both effects are weak and thus the change in the intermediate step can be detectable.
My current main suspect in this way would be the supply to U301 - due to charge injection I would expect something like a 1 mV change in the supply to cause 1 ppm of ADC result change, possibly even more.
So far I see a few INL contributions I kind of understand:
1) Self-heating on R200 input resistor. This should result in an contribution proportional to U³.
2) Heating in R200 with an effect from the input to the 10 K and 20 K resistors used for the reference. This would result in an contribution proportional to U²
3) DA: this should be proportional to the average voltage at the integrator output. The sign is know but not (yet) the strength. I would expect about doubling for 10 K higher temperature.
4) Capacitive coupling from something like the line from U207 (slope amplifier) to U100/4 (switch) towards the S1024 current source circuit (e.g. Q201). Other coupling, e.g. via ground, supply could be similar. This should give a contribution proportional to the number of comparator switching pulses. Thus about constant for positive input and changing with negative voltage.
It might be worth measuring the curve of comparator pulses versus input voltage to also get the shape of the 4th. INL contribution. Even the frequency counter function of the 34401 should be OK. Also some DSOs might work for this. The test would be with something like 10 or 100 PLC non AZ mode and counting at the C.out test point. Like with the average I.out voltage no high accuracy needed. A few more point around 0 might be good as there could be quite some jump in this area.
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R200 have a large thermal time constant (about 50-100 s at 10kOhm resistance and 1 mA current step, thermal resistance 130 C/W). So all heating/selfheatings effects would be visible as a slow drift. But there is no such a drift.
DA can be effectively compensated through RC feedback circuits, as it is done in the Datron 1281.
Also, I found a some nonstandart and not described in the user manual GPIB keywords: HOSEI, RAM, EEPROM.
HOSEI - is a well known private university based in Tokyo, Japan :)
EEPROM may content a XILINX FPGA configuration data.
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Compensating DA is tricky, as the time constant in DA will very likely change a lot with temperature. So it may work at one temperature or may require using suitable NTCs. The Datron compensation circuit actually used seem to be a little simpler (C528 not populated). It could still be an option to add a similar circuit (likely amplifier separate from slope amplifier) to at least compensate to a first approximation. The fast mode makes things more complicated though, as one would need a separate lower level of compensation here.
The thermal time constant for R200 is long, but INL test are also usually slow. The time constant should be independent of the power used. The self heating effect is coupled to drift. However offset drift is compensated by the AZ mode and thus would not show up. The cross coupling would be time dependent so the square contribution should be rather small due to the long time constant compared to 10 PLC integration.
Gain drift could be relatively small and might not be that obvious. Applying 10 V to 20 K gives 5 mW of heating and thus roughly 0.5 K temperature rise. The actual error depends on the TC / TC matching - so it can be low if the resistors are really good. Having TC matching much better than 1 ppm/C is nothing one can take for granted - so there still is some change of INL due to self heating. We still don't know how much and not all meters will be the same in that respect.
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Hi,Mr.Kleinstein ,
Thanks a lot!
The Freq. on the C_out can't be detected by 34401 as the period is too short to capture by it.
Re-checked the Cout vs Iout with DSO,found nothing odd. Attached FYI.
Re-checked the average voltage of the Iout and found no big error than captured last time.
I had changed the K006 to reed relay before and recovered it this time and found a shift of the turnover error curve.
The +5V of VCC for U301 have no change when switch the input from +10V to -10V.
Best Regards,
szszjdb
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The relay may add some offset, that could effect the HW zero adjustment. A reed relay (especially one without a magnetic shield and thus relatively high power) can have quite some thermal EMF. This would shift the turn over curve up or down. This is somewhat seen with data. Other than that not much change.
The DSO shows a frequency for the C.out signal. This frequency reading might be good enough to get an idea on the number of comparator pulses. It depends on how the frequency is calculated: could be 1/ pulse length - which would be bad, but it could be also pulses on screen - which would be sufficient.
The 1 PLC mode is nice for the scope pictures to see the change in pattern. For a frequency measurement it would be more a 10 PLC (no AZ) mode that would be of interest.
Looking at the old INL data published by ADVANTEST relative to the JJA: the curve looks quite a lot like the change in pulse frequency: a constant value for positive voltages. A jump at around 0 V and a slope with negative voltages to get back to the value for positive voltages at around -10 V. This would suggest the INL shown there could be to a large part the effect of changing comparator pulse number (e.g. capacitive, inductive and maybe supply coupling). So this could be seen as an approximate size for this effect - I would not expect capacitive coupling to change much with age unless there are compensating effects.
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Hi,Mr.Kleinstein ,
Thanks a lot!
The frequency is the 1/ pulse period. I had also viewed the pulse width ,but it has a large flicker and can not get precision reading. It is running on 1ms PLC of my case when capturing.
You means the ideal INL curve from ADV？
Any further test should I do?
EDIT:
Full test the turnover error, the curve shift down and there still have a drop above 7V input. Which is the bad egg?
Best Regards,
szszjdb
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There was another INL curve published by ADV in an other paper. It is linked and the picture shown somewhere earlier in this thread before. As the picture is small, I just repeat it. It is really odd they got an even better curve later.
It is quite normal to see quite some scattering in the frequency measurement, as the peaks don't come evenly spaced. Maybe someone else has a suitable counter/DSO and such a 6581 (or 6571). Like the integrator DC voltage this is kind of normal operation behavior and would not change between units.
One can about estimate the pulse number from the shown waveforms - maybe even just count on the DSO by hand for a few voltages. The positive side is easy, as the waveform reaches zero with every period. So a constant number. With a very negative voltage, the waveform will eventually again reach zero in most cases. For a small negative input only few comparator event happen. So the general shape is about clear: kind of a triangle shape in negative side, a jump at zero and constant for the positive side.
One reason why the comparator / slope amplifier pulses can effect the result is capacitive or similar coupling from the slope amplifier output or comparator to the S1024 current source. An important factor here is that the first pulse edge will be just before Q204/Q205 are switched. Normally capacitive coupling is rather symmetric and would not change much, but here only the first maybe 100-300 ns of the coupled signal are coming through. Beside the capacitive way coupling via supply or ground might have a similar effect. One point one could influence might be the delay between much of the pulse of the slope amplifier and comparator and thus Q204/Q206 switching. Here the offset to the comparator (R261/R260) can have an influence. Currently the comparator already switches rather late (150 mV / 50 mV).
I did a rough estimate on how much error due to DA is to be expected:
According to this paper (Bob Pease on DA) https://www.edn.com/ContentEETimes/Documents/EDN/Old%20PDFs/1982-10-13_EDN_Pease-capacitor-soakage.pdf (https://www.edn.com/ContentEETimes/Documents/EDN/Old%20PDFs/1982-10-13_EDN_Pease-capacitor-soakage.pdf) one can expect a DA of about 0.01-0.03% for a 100 ms time scale and a good quality capacitor (e.g. PP). With a 1 V change for the average integrator voltage and 20 nF this would be 20 nC * 0.01-0.03% = 2-6 pC of charge that could be carried over from measuring the input to the zero measurement. The 10 V nominal range corresponds to 500 µA *100 ms = 50 µC. So the error would be in the 0.04-0.12 ppm range. The error would not change much with integration time as the DA fraction would go up with longer time. I would not expect the capacitor to perform really poor - more like choosing a rather good one. So at least the good meters should be more at the low end.
Chances are the designers had a look at DA and choose the modulation frequency well. Unless there are problems with switching effects (e.g. capacitive coupling supply spikes etc.) there is no real incentive to use such a low modulation frequency. So chances are there are some of those switching related error sources (like the one related to pulse count) and DA is only responsible for a part (e.g half at most) of the INL.
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My measurement results is almost the same, as szszjdb :o
And I don't see any correlation with INL curve :-\
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It is not a surprise the Integrator voltage curve looks the same - it should, as it is not sensitive to details.
The measured frequency curve is nice to have and it should also be the same for other units. It's kind of coupled with the average voltage. However the visible correlation to the INL curve is really not there :(.
Different from the average voltage to represent the DA effect, the frequency is only an approximation for one possible coupling - the exact timing between the comparator and Q204/Q205 switching can change a little with voltage. Still I don't see a better approximation for this INL contribution.
I am kind of surprised to see a INL curve that is so different from the ones szszjdb observes.
The main point in common is the brake at around +5 V - it is also found in a curve from Pipelie. So there might be some common weak point at around +5 V. The whole positive sides are reasonable similar.
Negative sides and the jump at zero seems to be quite different however. For some reason the negative side is used for Ohms and ACAL (needs to be the same sign), so the negative sign is kind of a little more important.
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I forgot to mention, Q204/Q205 have a fixed number of switches during the a-d conversion.
I continue to investigate the cause of the big error on the 10 M range. INL of the 1uA and 10 uA current sources is almost perfect. But there is a big difference between normal measurement and ACAL procedure: during ACAL 1->10M transfer the 1 uA current switching is used (like in OCOMP mode).
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The test on the Ohms current source is clever, using the internal resistors. +-2.4 ppm error for measuring with and without OCOMP mode looks good at first sight. However the the difference is still not that small.
If we assume an error in the current source the 2.4 ppm of 10 µA are 24 pA.
It gets even worse when comparing the absolute values read with and without OCOMP. The 9.8 Ohms difference measured for 1 M corresponds to 98 µV of difference. I would not expect that much of thermal EMF from the resistors.
Aside from thermal EMF which is the reason OCOMP is made for, part of the difference could be the current source no going all the way down to 0, when it is supposed to be off. Are the relays also used for OCOMP switching ?
Using "OCOMP" mode for ACAL and than normal mode only for the 10M range can of cause make a difference. Ideally there would be different cal constants for OCOMP and non OCOMP mode for the small current sources.
Of cause the number of switching events of Q204/Q205 is constant for a AD conversion. What changes is the number of cases when there is the comparator switching (and a peak at the slope amplifier signal) just before (e.g. some 50-100 ns). Spikes caused by the comparator/slope amplifier (via supply or capacitive coupling or maybe inductive coupling) may cause ringing/or a relaxation at the current source. Normally such spikes tend to be rather symmetric and thus by them self don't cause much trouble. However here the rising slope of the comparator signal is when Q204 is on and the leading edge is when Q204 is off.
Edit:
One can estimate the size of the effect of capacitive coupling (slope amplifier signal to Q201 drain/source, Q204/Q205 drain): With a coupling capacitance of 1 pF, an amplitude of the slope amplifier signal of 500 mV and a change of 1 kHz in pulse frequency this would be an injected current of 500pA or 1 ppm of the 500 µA full scale input current to the integrator. The size of coupling capacitance is difficult to estimate and 1 pF
would already be a relatively large value. However besides the capacitive way there can also be other coupling paths (e.g. via supply of GND). So some coupling is possible, but it may still be a little too small to notice. The path to the integrator (Q204) is on during the rising slope of the slope amplifier. So an
additional positive current is flowing and thus the measured voltage is slightly to high.
So the signs of the DA and slope amplifier capacitive coupling should follow the curves that Mickle showed. So there is a chance the step at around 0 V caused by the two effects would partially compensate each other.
For some odd reason the slope amplifier signal is routed relatively close to Q204/Q205: The trace close to the 4 of the Q204 label should be the slope amplifier signal (through r137).
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Hi,Mr.Kleinstein and Mr.Mickle T.,
Thanks a lot!
Further investigation with the DC AMP in ACAL. Found oscilation on fast channel when change U102 from OP27 back to LT1220 , given that U107 replaced to TL071. That is why I could work with TL071 and Mickle could not. Further high voltage (22v peak)spike were detected on PIN6 of U102 when AZON,although there has some clamping circuit, I still doubt the interference to ZERO/GAIN calibration in pricision channel.
Attached are the LT1220 with OP07,FYI.
How to eliminate the spike?
Best Regards,
szszjdb
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It looks the spike happens when the slow amplifier is in phase with high positive slew rate, so that the input differential voltage is significant positive - enough to overcome the difference in offset. The deals likely depend on the setting of R170, as this also changes the amplifiers offset. The effect will likely happen anyway, as a large offset usually also means high drift. So setting R170 to one end is not an option. In theory there would be the option to intentionally add an offset to the fast amplifier, when it is turned off, so that the fast amplifier will be hard at one end and not respond to the fast small signals at the input, when the slow amplifier is slewing fast. The input voltage to an amplifier inside the FB loop is about proportional to the slew rate and may be even higher when the slew rate limit is reached. So this may not help in the shorter phases when the slew rate limit is reached.
The spike does not really look nice, but a don't think it would be a real problem, as it happens at a time when the ADC is not active. I don't think the spike at the output should result in much current at the input and thus contribute to input bias current.
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Hi,Mr.Kleinstein ,
Thanks a lot!
With such oscilation, I have to drop all the modification toward the DC AMP and back to OP07. The input bias will return to the original one(400Mohm).
The spike are in front of or at back of the AZ period and the ADC should work there?
Best Regards,
szszjdb
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The spike from the fast amplifier should be in the switching phase, so just between the time when input integration is active. The spike might overlap with the run-down phase however and this could cause some trouble. The ADC has to wait for the amplifier to stabilize before integration can begin. Even with the fast amplifier this should be at least 5 µs likely much more.
I would expect the same type of spike of the fast amplifier with the original (slow) precision amplifier as well - it is even likely that for one direction (which depends on the initial offset) the pulse will be considerably longer and also at lower voltages, as the amplifier is more likely to reach the slew rate limit.
Especially an even longer (positive) pulse for the fast amplifier could be a significant load (maybe 10 mA at positive output) and might effect the INL of the ADC. The ADC was rather sensitive to extra load (e.g. resistor at output of U206 to -15V). In this respect it could also make a difference wether the fast amplifier goes to the positive or negative limit, when the precision channel is used. Die direction can be different between units, depending on the offsets of Q102/Q104.
So a suitable way to disable the fast amplifier would be adding a negative current (e.g. 300 µA or 60 K towards GND) to Pin3 of U102 - kind of adding something like an 1V of offset and thus kind of forcing the output low.
One strange point with the fast amplifier is, that there seems to be no local decoupling at U102 - normally not a good idea with a fast OP.
Similar amplifiers usually have some additional capacitance (e.g. 10 pF... 100pF range) from pin 2 of U102 towards GND, possibly with some series resistance (e.g. 1 K range). However I have not simulated that amplifier yet. The switches in U103 might provide that capacitance.
R117 at the output to provide the output clamping is not helping with stability of the amplifier. One could reduce it's effect with an RC series circuit in parallel to R117.
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Hi,Mr.Kleinstein ,
Thanks a lot!
Adding a 68K resistor to PIN3 of U102 and GND, it will report zero error when powering on, as well as with a 680k. Without any modifying ,the AZ switch spike on ADIN might increase with the input voltage, especially the +10v.
Also trying to shift the substrate voltage of the switch in ADC to -5V ,found no visilble change. The turnover error is still like the former.
Would like to have your advice.
Best Regards,
szszjdb
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The time it takes for the amplifier to settle the supposed to be fast mode is kind of ridiculous. The step up takes more than 200 µs for the visible part and the settling to precision still to come. So maybe at least that last part is faster in fast mode. So I am wandering what cause this super slow rise time. I am not sure if this is really good enough to for the AZ mode to make much sense (either AZ is rather slow, or AZ is too fast to really work up to the limits).
The odd thing is that there is no drift trimmer (counterpart to R170) for the fast mode - I would assume that one would likely use the non AZ mode when fast. So drift would really matter here. :-// Resolution may not be that great at high speed and this could save the day :-DD.
It is kind of expected that an extra resistor at the fast amplifier would cause the self test to complain. The idea would be to check if that pulse at the output of U102 is still present with this modification. If the extra resistor would suppress the pulse, one could consider to add a MOSFET to switch the connection of the resistor to ground together with U100/1 and thus only when the precision amplifier is active. However I am still not sure this spike would really be a problem. Just in case one could test at which input voltages this pulse would happen. Chances are nothing would happen at low voltages (e.g. < +-2 V). If this limit happens to be at a round 5 V (where positive side INL sets in), it might be worth to investigate that pules a little deeper.
Just to make sure there is no problem with amplifier settling one could check the timing in AZ mode with the scope. Mickle likely has done this likely already. So the point would be the relative timing of ADIN (with some non zero signal) and the capture time (e.g. visible at I.out test-point) for different PLC settings, including one that uses the fast amplifier. If the delay from switching to conversion is too short this might cause errors. It would also give an idea on how much more capacitance for C026 to slow down the mux is possible. Normally there seem to be plenty of time as the zero phase is rather slow, but who knows how they actually use that time (switch during rundown ? or only during zero phase).
I am starting to run out of ideas what could cause the common break in the INL curves at around +5 V.
The only clue so far in this direction was that things got worse with some extra load to U206 or decoupling to ground of U206/U207. So maybe trying a direct connection for decoupling of U206 to GND at the source of Q205, which would be the logical point.
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I realized that adding a little offset to the fast amplifier to turn it off will not be practical. :-[ |O
It would need to much current - the offset I though was at the output of the amplifier and thus too little to have an effect. The pulse at the fast amplifier, when switching with the slow (precision) amplifier active is kind of normal. It will be at a time when the amplifier is in a transient phase anyway. So I see no real need to do anything about it. It should be just part of the normal operation and should not effect the ADC conversion.
The pulse of the fast amplifier would be at a time when the ADC is really active would only happen if the actual input signal measured shows fast slopes (e.g. more than 0.1 V/µs after amplification) so that the slow amplifier can hardly follow that. At what slew rate the extra pulse is triggered depends on the relative offset of the 2 amplifiers. So it would be kind of bad luck if the two amplifiers are too similar so that a reaction of the fast amplifier is possible even with a moderate input signal. In this case a small additional offset could be an option. Just a slightly different position of R170 could be enough for this.
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Hi,Mr.Kleinstein ,
Thanks a lot!
The added on resistor 68k could not help to suppress the spike in the fast channel. But this kind of spike is also in the slow channel and seems have enough interal to the last of the rundown cycle. Attached FYI. So might be the large spike which leading to the settling issue?
Adding the decoupling cap from U206 V+ and V- to the GND of Q205 D pin , seems no considerable change.
Yes everybody are starting to run out of ideas! What a strong DMM! :-DD
EDIT:
To capture the IOUT with spike is more reasonable than COUT as it can show the stop and start moment at once. Seems plenty of time reserved for spike immunity in the begainning of runup but less in the rundown period.
Also captured the U201 PIN6 with the spike, hope useful.
Attached the new turnover test result, slightly change ,might caused by some drift.
Best Regards,
szszjdb
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Yes, it's the strongest DMM which I've ever seen.
I'm also stuck, but in the firmware reversing :(
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The input switching seems to be some 50 to 120 µs after the rundown completes. This is a reasonable good solution. Shorter after rundown could be a little better - likely there is some delay for something like sending the data to ground based part. There is still quite a lot of time left in the zero / integrator reset phase. So that there is plenty of time for the amplifier to settle and as expected the extra pulse of the non active amplifier would not be a problem. Sending of data could also be a reason for the slightly different timing between 10 PLC and 100 PLC mode that is effectively averaging 10 PLC.
Currently I would expect the INL error to be caused mainly during the run-up phase, because it would need a large part of the rundown part to be wrong. Just to make sure, one could compare the reading in the 1 PLC and 100 PLC mode. The 1 PLC mode is more effected from rundown and also from input switching.
As the same input signal would be used one could be relatively sensitive to even small differences.
For the 1 PLC mode it would likely take some 100 samples to be averaged. So a suitable sequence could be something like 200 samples 1 PLC , 2 samples 100 PLC and that repeated 3-10 times for each voltage to test.
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Hi,Mr.Kleinstein ,
Thanks a lot!
Re do the turnover test under different substrate voltage of -5v and -3.3v, found some big error at the 1V reading comparing the 2 voltage , but the turnover error is likely the same.
Also perform the turnover test under 1plc and 100plc , the reading and error is nearlly equalled. Attached FYI.
Best Regards,
szszjdb
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The turn over errors seem to be moving all over and around - like there is quite some noise, random effect. The 10 PLC and 100 PLC values should be reasonable similar, but already there quite some difference. So to me the readings do look different with 1 PLC and 100 PLC/10 PLC, but it is hard to tell what could be the reason.
So for these readings I kind of have some doubt they are reliable. Especially the AZ off case should be with a few repeats, like pos - neg - pos - neg - pos, so that some drift could be seen / averaged out. The seen differences would be significant if real.
For the 1 PLC/100 PLC comparison it should be better to do the test alternating between the PLC setting a few times at a give voltage and than record the readings and especially the difference. This should give pretty stable and repeatable values. Just those 8 test-points from turn over and a short would be a reasonable set.
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Hi,Mr.Kleinstein ,
Thanks a lot!
After burning for a whole day and re-calibrating the external zero and ACAL DCV, re-done the 1-100plc turnover test as your suggestion, the reading just drift for 2-3uv comparing to record yestoday. Clearly the drop above +5v have no change. Attached FYI.
EDIT:
I was wondering if the 20Vp-p spike could lead to a settling issues that damage the INL above +5v? The negative spike reached -10V when +10V input and -3V when +5v input. Although there has enough timing reserved for switching , the surge of 20Vp-p might lead to some kind of protection or getting into the nonlinear zone for the OPs and FETs and it can not recover in 5-10ms. Can we suppress such negative spike by adding some RC network?
Further more, I doubt the FETs in the MUX has some issue that contributed to the high negative spike. This could explain why the more positive input ,the worse the INL.
Would like to have your suggestion.
Best Regards,
szszjdb
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The data from today look quite a bit different than from yesterday. It is only 2-3 µV, but that is quite a lot compared to INL error in the +-4 µV range. When comparing 1 PLC and 100 PLC mode the interesting part is directly the readings at the same voltage, not the turn over error.
The difference between 100 /10 PLC mode and 1 PLC mode should be from the more frequent rundown and input switching (e.g. amplifier settling, switching related input current puls) and possibly from more time between analog zero steps and thus possible drift in the zero caps. With the OPA140 I would not expect much drift here as the bias current is much lower than with the OP177/AD707. So the difference would be essentially 9 times the effect of input switching / rundown in 10 PLC mode. The difference are comparable to the INL error, but not near 9 times the INL error. So the input switching and rundown should not be a significant portion of the INL error in 100 PLC mode.
I had hoped for more consistent data and less scattering. It starts with the resolution for 1 PLC more: with an average of 200 readings there should be another digit available. Anyhow the data seem to be just good enough to exclude the rundown and input switching related effects as the major source of INL.
So it is back to looking at the run-up phase.
With the fast OPA140 instead of OP177 for U205, one could be able to see the settling of the integrator at the output of U205 in a kind of amplified way. For the faster OP a smaller value (e.g. 220-500 Ohms) for R217 could be better - this would also lead to a larger signal at the output of U205 - so it could be more visible in the noise. A good ground could be the GND side of C207. We had that tried before, but the signal was too noisy.
The expected signal would be some steps of maybe 20-200 mV with possibly ringing, followed by a decay over some 10 µs back to a much smaller Level. So it would be the maybe 20 µs around switching that are interesting under the aspect if something changes at around 4-7 V at the input. Excessive ringing would suggest a need to adjust R217 towards a smaller value - a slow approach would suggest too low a value for R217.
One possible variation in the integrator not tested so far would be a considerably larger integration cap (e.g. another 10 nF or 20 nF in parallel). It don't think this would really upset the self-test, maybe the zero phase if too much. It would increase the noise a little however, but this would be OK for a test. Still it would reduce the output voltage of U206 - so if the error is caused by reaching some critical levels here it would shift the brake to a higher voltage.
Another possible source of INL could be possible drops spikes at the +17/-19 V reference voltages especially the +17. They may be too small to be seen with the scope and could still effect the result. One try could be here to add a capacitor (e.g. 100 nF) at U209 from pins 6 to 2 to add some filter function to that OP. This could be a good idea anyway as it would reduce reference noise (5 kHz band) a little.
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Hi,Mr.Kleinstein and Mr. Mickle T.,
Thanks a lot!
The drift of the data might caused by the little different of the order and the slow part of DA effect. I had also performed the external cal and ACAL each time.
Other test you mentioned will be conducted tomorrow night.
Could Mr.Mickle T. help to check the waveform at ADIN point with AZON under +10v input?
EDIT: I still doubt the INL issue is causing by the MUX. The direct feeling is from that few improvement after work on the DC AMP and the ADC,even that my friend CF have changed all the OPs and FETs in the 2 part and found few effect to INL. The relative poor input bias also point to the switching of the MUX. Most important that we yet have not perform any part INL test under AZON mode. Altough the test of ADC under AZOFF show similar INL with system's ,it also could be due to the calibration error. The gain arround 10V have droped more and corrected by software ,so leading to relatively high reading on -10V input.
Important evidence is coming. My friend Pipeline sent his waveform on ADIN that much smaller negative spike(arround -1v) were detected vs -10v in my case. Attached FYI.
Would like to have your advice!
Best Regards,
szszjdb
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waveform at ADIN point with AZON under +10v input?
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Hi,Mr.Kleinstein and Mr. Mickle T.,
Thanks a lot!
I missed something yestoday that the ADIN curve by my friend Pipeline is just the moment AZ switch opening. I got the other side curve when AZ switch closing today. The spike is nearly same like mine and both are biger than Mickle's. That spike might do few effect to the runup of AZ period ,but reflect possible issues of some switch in the mux?
Attached FYI.
Best Regards,
szszjdb
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The spike on switching from 10 V (input) to 0 V (zero phase for AZ) can be different if the MUX FET's threshold is different. AFAIK Mikle has modified the guard amplifier to be faster which should reduce this spike. For the original circuit with the rather slow amplifier an even larger spike is expected - rather similar (and even more as there is no RC to slow down switching) to the -10 V input case that led to input current spikes. So I don't think there is an issue with the MUX. Anyway this is way before the actual conversion and thus should not have an effect on the ADC conversion.
The input bias could contribute to the measured INL. The error for the +10 V input is somewhere in the 5 µV range and this would correspond to an extra 500 pA of input current at high positive voltage. This would be higher than normal, but still a possibility, especially if this is extra current only for higher voltages (e.g. > 5 V). With a higher impedance test source for the INL test (e.g. resistor chain) less input current would be needed to cause trouble.
The input bias has 2 contributions: one more static and an additional from switching the mux. So it would be 2 tests (like non-AZ mode and 1 PLC AZ) to show the 2 contributions. As far as I remember from the older cap discharge tests, there was a slight nonlinear increase of the current to higher voltages, but AFAIR it was not that high. So maybe it could be worth to look again at the input current test in a way to get a curve for input current versus input voltage. For a few more point at higher voltages it may require to redo the test with a slightly larger cap and maybe start from a little more than +-10 V to also include the over-range.
Most of the INL tests shown so far were with AZ On - without AZ drift makes it difficult to get accurate results, though there was one curve measured from the ADin test-point. This test was not including amplifier and bias and because of non Az operation also without much of the DA effect.
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Hi,Mr.Kleinstein ,
Thanks a lot!
I was using the low impedance source , the LTZ10V and 6144, for the turnover test . So the data recorded should be trustable.
Re-checked the bias of the input both in +-12V input. The data from -12v input shows large bias than in the AZOFF mode.
I also think about the INL test I have made at ADIN to the display under AZOFF mode, comparing with 3458. The INL look similar to the system INL. So we concluded that the INL is mainly due to the ADC at that moment. But now I have to point out that we miss considering the AZON mode effect , the settling issue. Although the MUX+DC AMP work find in the AZOFF mode, they still have chance to perform worse in the AZON mode and contribute to the main INL. So I turn back to the MUX +DC AMP to find some hint.
Attached FYI.
Best Regards,
szszjdb
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The input current for the negative side with AZ on looks really bad. I though it was better before, with the modified (faster) precision DC amplifier. A last resort could be changing the guard amplifier for the MUX like Mikle did - taking the signal directly from the input instead of from the feedback.
It does not make much sense to calculate an input resistance from the observed current, as the current is not a linear function if voltage. So the right way to present the data would be a curve of I_in versus voltage. With the high current it might be better to use more like 5 or 10 nF to get a few more points, at least with AZ mode.
Going all the way to the 10 nA range would suggest an error caused by the 8.8 K protection resistor up to 100 µV. However this current is transient and depending on the signal source the disturbance from switching could decay to a large part before the actual measurement starts. Still this is not good, as with a high impedance source (even just a few K if there is additional capacitance) this would cause extra errors. The other point to note is that the decay curves are at 1 PLC while the INL curves are usually at 10 PLC or slower - so less frequent input spikes. Still 1 nA (for 10 PLC AZ mode) of input bias would be kind of poor.
Though not very good quality the comparison between 1 PLC and 10 PLC mode also suggested that the input switching transients are not a major part of the INL observed, at least not for the 10 PLC or slower modes. Still the input current is an issue that is not good. Due to the missing pre-charge phase, some higher current in the AZ mode is kind of normal, though this should be more like a linear part.
It might help to get a corresponding decay curve from Mikles meter too, to get an idea on how much could be normal. I would consider this a good check anyway, as the input current depends on voltage and the simple test with a resistor only checks at 0 V.
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Hi,Mr.Kleinstein ,
Thanks a lot!
If keeping the U102 as LT1220, I can not change U107 or U104 to fast one like TL071 ,as it will oscillate somewhere in the fast channel at powering on. So I just recover to the original one. Even with the slow op27 for U107, it will oscillate sometime as the temperature is getting higher than before. It is really hard to modify the DC AMP without the considering the interference of the fast and slow channel.
Best Regard,
szszjdb
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For the original circuit the high input current for the negative side is kind of normal. That is like the expected behavior.
I see 3 possible ways a round this:
1) make the precision amplifier faster (seems hard to get stable)
2) change U107 to a fast FET OP and change the input to use the signal input instead of feedback (that is the change Mikle used)
3) add a kind of pre-charge circuit. It sounds strange as it would need an extra switching step and is normally done under software control, but I think this might not be that complicated using an analog delay circuit. Something like a small extra board with an 74HC123 (or similar), LM393 and MMBF4117 (or similar) could do the trick: at the beginning of the DCV phase a short (e.g. 10-20 µs) phase with and extra input path from U009 output is added. This would divert the current spike to U009 instead of the input. Before that change one might have to check the timing in the fast mode (e.g. 10 µs integration) - not sure how much time to spare in this mode - though I doubt one would use this in combination with AZ mode.
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Datron 1271, Datron 1281, Fluke 8508A - all have a large capacitors and a DA compensation circuits in their ADCs.
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One problem I see with the DA compensation circuit is that DA can be rather temperature dependent. So far I have not found data for PP caps, but chances are high that there is a very strong temperature dependence. The overall DA strength likely stays the same, but the relaxation time will change like a thermally activated process - so like the need to use NTCs in the compensation circuit. So the fixed resistor DA compensation would be only a rough estimate for a fixed temperature. It might be still possible to use a kind of DA compensation, but for me it only makes sense if this is done at least with a rough temperature dependence - the usual NTCs might actually be OK for this.
The capacitor switching for fast and slow mode makes a compensation circuit even more tricky - though the fast mode may not need DA compensation as the feedback frequency has to be much higher and thus the DA effect would be smaller by a factor of about 10 (or more), if the small capacitor is used with a multi-slope mode at all.
As the time constant for DA relaxation should be considerably longer than the integration time, the effect of DA should more or less follow the change in average voltage of the integrator. So it would be kind of a known curve - this could help with adjusting the compensation. The effect of the fast DA part should be more like a short range scattering not seen much so far. So likely no need to compensate this. AFAIK one of the caps/trimmers in the Datron 1281 plan is not populated, so the actual circuit is a bit simpler - mainly one factor to adjust.
I understand the tendency to use a rather large capacitor and thus less frequent reference switching during run-up, as INL errors associated with switching and jitter will get worse with a higher modulation frequency. So the size of the capacitor is a kind of compromise between errors due to DA effects, errors due to switching effects (e.g. ringing, coupling) and noise of the rundown process that gets larger with larger caps.
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Datron 1271-like DA compensation have no effect in my R6581T |O
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The Datron 1271 circuit is a little odd, as the time constant is still rather low. The slower one is only 10 ms and thus way faster than the real DA and the integration. So it would only effect the fast part, that is already suppressed by the use of more slopes and thus some delay.
To get a suitable time constant of longer than a 10 PLC conversion (e.g. 1s) it would need a really large resistor, so more like 100 M and 10 nF. This would be more similar to the Datron 1281, where 18 M and 47 nF are used. I don't think it would need a second time constant - more like a temperature dependent strength. If the strength of the compensation is too large one should see the effect in the INL, especially the more or less sharp step close to zero, when the rundown pattern changes.
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Playing with a time constant gives some ambiguous results. It was possible to reduce the "+" INL (from 0.8 to 0.3 ppm), but at the expense of increasing "-" INL from 0.1 to 0.7 ppm :--
All additions dismantled.
P.S.
I found a some oddity in the slope amplifier: it have a very small input resistance (R219+R220) and easily can overload the integrator op-amp U206. Even a large 4.7 kOhm resistor, connected to I.OUT, can overload the U206 and makes it nonlinear.
So I suggests another DA-comp scheme.
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Hi, Mr. Mickle T.,
Thanks a lot!
Have you got any progress with the DA compensation modification?
My unit is still the same with the 0.5ppm error of INL at positive range after burn in for 10 days. It seems nothing could do now for me.
Best Regards,
szszjdb
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I did not continue experiments and completely disassembled the DMM.
After a zillion attempts to fix the unfixable bug with +1/+10 V and 1/10 MOhm transfers, I gave up.
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The shape of the INL curve does not really match the expected error due to DA. So the observed INL error is likely not due to DA - maybe a small contribution, but not that much. So I would not have much hope in DA compensation to give much of an improvement.
From all the experiments so far, most where kind of excluding some effects. For most of the part we can exclude:
1) DA (observed INL curve does not follow average integrator voltage)
2) capacitive coupling to Q204/Q205 drain (observed INL does not follow frequency for comparator pulses)
3) rundown related effects (the INL error is not much higher in 1 PLC mode)
4) Input switching related effects (e.g. settling of the amplifier) (the INL error is not much higher in 1 PLC mode)
5) input current to U205 (OP177 at input of integrator) (not much change when going to an OPA140 instead)
There was a slight indication that loading of U206 did have an effect - though it did make the error larger. Still it is not very clear how this small extra load should have an effect. My best guess here would be something like shifting the ground level at some points could be a factor here. In addition to a static ground level shift there might be small (e.g. 10s of µV) AC contributions involved - so it may not be so easy to see those. For finding the INL souce I would suggest something like a careful INL test with an without extra loading to U206 (e.g. 5 K from I.out to ground or -15 V) and maybe with a larger value for R220 (this would reduce the current flow between U206 and U207 at the cost of slightly higher noise).
Another part that may be worth testing is the error with large resistors. One point to check here is to test a few more resistors (e.g. 100K, 200 K, 500 K, 700 K) instead of just 1 MOhms in the 1 M and 10 M range. Another possible check here would be to see if the current source is really linear - this would need a second meter to measure the test current in the 1 M / 10 M range with and without a series resistor and thus with a different voltage at the source output. If leakage around the current source is causing this the error should be even larger in the 100 M range. So if a suitable instrument is available one could check those currents.
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Another part that may be worth testing is the error with large resistors. One point to check here is to test a few more resistors (e.g. 100K, 200 K, 500 K, 700 K) instead of just 1 MOhms in the 1 M and 10 M range.
I was already did it with all of the 1, 10, ... 1E6 Ohm range. Current source is extremely linear and don't have a measurable INL. Also I was check a currents settling problem with a 10 nF capacitor, added to the 900 k current shunt resistor (R500). After ACAL I was got the same 200 ppm shift. Changes of the U405 compensation string R*C405 also gives nothing. Decreasing by half of bootstrap resistors R406 gives nothing. Aforemention U107 mod gives nothing. Disabling of the D402 (overcurrent protection) also gives nothing, as well as variation of ambient temperature in large range.
I tend to believe that the problem is more firmware, than hardware. For example, due to a different Xilinx XC3042A configuration, loaded from XC1736E serial EPROM. XC3042A does in real time all low-level A/D signal processing, DMA and many other things. Why not?
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Hi,Mr.Kleinstein and Mr. Mickle T.,
Thanks a lot!
I found that some of the INL is coming from my voltage source for testing ,the DIY LTZ 7-10v source. The former might be not so stable and I reassembly a new one yestoday. The other contribution might be the 0.022uf cap parallel on the DMM when using with the resistor string, as I had took them to filter some noise. And also for the single voltage capturing, I using 20 point avarage instead of just 1 estimation. And also some modification before like adding the decoupling cap on each OPs, it likely helps to the final result. The update INL curve looks much better than before, which I had never imaged. But there still have 0.3-0.4ppm error in the middle of positive range and it is more like the performance of others 6581.
I will try to add some load to U206. I am also considering about the leakage of the MUX when in high positive voltage input , but can not prove it. This might lead to the INL error over the 0.1ppm limit, right? I suppose that the fresh MUX have few leakage and lead to the ideal INL curve as the datasheet. When suffered by the surge in some condition and the protection circuit malfunctioned at that moment, the leakage of the switch became extreme large and contributed to the INL of positive range finally.
Attached FYI.
Best Regards,
szszjdb
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The INL curve looks not that bad now. Over a large part it is following the curve for the 3458. So if we take the 3458 as a reference point (and not the divider chain) the difference in the INL curve would be the INL. Here values are more like in the 0.1 ppm range over a large part (except for +8 V and higher). With the resistor chain, the input impedance chances with the taps and this might explain parts of the curve seen - deviation is largest in the center, where the impedance is highest. It might also make a difference if the curves are measured with both meters in parallel of just one meter at a time.
I am not that much convinced the input current is due to damage from over-voltage. If could be some kind of aging shifting the JFETs threshold. Contamination could also be an issue. Some of the leakage could also be due to variations in the FETs used - making some meters better than other from the start. At least some of the input current due to not having a kind of precharge phase and the peak due to the forward biased gate below about -6 V are more like design faults - this is more like the expected behavior for the given circuit, with only small variations between units. Especially the switching related input current is likely not due to a damage, more like a problem by design.
It looks like calculating the effect of input current should be relatively easy. This is true for the quasi DC part for the non AZ mode. However this is not that case in the AZ mode with current in the form of short pulses on AZ switching. So the effect of input current may be even be a simple linear function of input impedance and input capacitance can also have an influence. So the 22 nF at the input can make a big difference - especially for the comparison the the 1 PLC and 10 PLC mode. It might be worth to check on how much effect the source impedance has. So maybe use a 7 V source and measure with a few different series resistors (e.g. 10 K, 50K, 100 K, 150 K, 200 K).
From the 604 INL curves it looks like mainly the small range of +8 V and higher is still a problem. This is not really good, but one might be able to avoid this range for most critical cases.
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Hi,Mr.Kleinstein ,
Thanks a lot!
By adding the 5K from U206 PIN6 to PIN4 , it is likely no more change observed . Attached FYI.
Best Regards,
szszjdb
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No change with an extra load is kind of a good sign: at least likely not much INL due to the OPs output stage and also no effect of loading the -15 V.
Having a rather similar curve for the measured INL for the 3458 and the 6581T kind of makes me suspicious that there might be common source in the test source, like the change in output impedance with voltage. So at least part of the observed curve could be from the input current and source impedance and not the ADC or amplifier. So it might be about improving on the test first. At least the quasi DC part of the input current (non AZ mode) could be measured (e.g. capacitor discharge) and corrected if the source impedance is known. The input current due to switching can be higher an average, but much of this might not have an effect as there is some delay before the measurement starts, so much of that current might be ignored. With the extra 22 nF at the input and a higher source impedance settling can take more than 1 ms and thus more of the switching current would effect the reading.
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Hi,Mr.Kleinstein ,
Thanks a lot!
The LTZ 7v will change with the different series resistor measured by 3458,attatched FYI. The cap parallel on input do harm to the INL test as your advised.
Best Regards,
szszjdb
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The effect of a series resistor on the 3458 is not that interesting, the 6581 would be the meter to check. The data give some 6 µV drop with 100 K and thus some 60 pA of input current - thus about the normal range. No need to check much below 10 K, as there are 8.8 K inside the meter. The interesting part would be the range (and maybe a factor 2-3 higher) of impedance that the resistor chain has, thus maybe 10 K -100 K.
However there was an alternative test to see the effect of input currents due to switching: this was the comparison of 1 PLC and 100 PLC mode. The old test was not very high resolution (the 1 PLC mode had limited resolution despite of averaging, normally the data should be good for one more digit). Still that test showed that there was not that much effect to to more frequent switching. If that old test was done with the same resistor chain and no extra cap - this old test would be good enough. The effect not caught in the 1 PLC / 100 PLC comparison is the non AZ mode bias current - this would be relatively easy to measure (there should be old data on this already) and the effect due to the input impedance can be calculated straight forward.
A slightly odd point is why the apparent INL of the 3458 is that high.
One point possibly worth checking would be the INL in the low voltage range, where the pattern and voltage during the run-up changes (e.g. 0-100 mV range). For the small range the calibrator with a good quality divider (e.g. 1 :50 ... 1:100, could be already inside the calibrator) could be good enough. Where the feedback pattern changes we expect some step like error in the 0.02 - 0.1 ppm (of the 10 V range) range due to DA.
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Hi,Mr.Kleinstein ,
Thanks a lot!
I had changed the resistor chain to total 10k to minimal the charge effect. Attached the reading with different series Rin ,FYI.
Re test the turnover error in 1 and 100plc mode, found significant different reading with them.
Best Regards,
szszjdb
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The series resistor test (essentially only the 0 / 10 K / 100 K numbers really matter) shows quite some input current. 9 µV over 100 K is an effective current of 90 pA. Not really bad, but also not really good. The odd thing is that the voltage reading goes up with 100 K in series - so the effect is opposite to the average current measured with the capacitor discharge !
The comparison of 1 PLC to 100 PLC mode is similar to the old data. There is quite some difference, but still not that much to have significant effect on the INL in the 100 PLC mode. way to look at the data is not the turn over error, but the difference from 1 PLC to 100 PLC mode at the individual voltages. The 1 PLC mode amplifies the effects of the rundown part and the mux switching effects (e.g. input current spikes) by a factor of 10. So 1/9 of the difference would be there contribution to the INL in 10 PLC or 100 PLC mode. So there is a few µV of difference, but divided by 9 this is not really much.
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Hi,Mr.Kleinstein ,
Many Thanks !
I re-checked the voltage with different series Rin and it do get larger reading when with 100k. It might be the changing positive bias current flow to the series Rin outside the meter with different vin.
It seems the MUX have the most contribution to the system INL(0.4ppm MAX) as others had been eliminated. Although not perfect as the 3458, it is still can take some work. So I stop expecting more from my 6581 now.
For my used 3458 , it might have some issue as it tend to have more noise reading when with the 10K resistor chain than 6581. And it will get unstable reading when measure the dirrect -7v of LTZ zener output, likely some oscilation occured. Also with the a little more turnover error as 2uv. Others looks good with the zero noise and the stable reading when measuring the LTZ +7V . The bias is also very good. The 3458 is too complex to modify and I have no idea to fix something.
Best Regards,
szszjdb
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For the input current at the 6581 mux, there is a possible chance to get some improvement, by adding a kind of pre-charge phase. It sounds a little crazy at first, but I think it would be possible. The point would be to add a kind of additional input to the MUX that is activated before the DCV input. The suitable signal it there from the input protection buffer. There usually is enough time from switching to DCV till the measurement starts. So an monoflop chip could be used to create this extra step in an analog way. The pre-charge phase would also prevent the current pulse seen due to the slow amplifier.
The early test with the capacitor discharging was showing the voltage to more towards a voltage in the 2 V range (I don't remember the sign). So at 7 V the DC input current sign should be so to reduce the voltage. So chances are hight the higher voltage with the series resistor is due to something like current spikes / setting from switching - still the average current is like an positive input resistance, but there is overshoot. So it is possible the with 100 K series resistance settling is a little to slow and coming from the positive side.
The 3458 input would be an different thread. It would likely start with measuring the input current to see if there is a problem. Even if no intend to fix / change something, it would be a good idea to know / check the input bias also for the negative input.
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Hi,Mr.Kleinstein ,
Many Thanks !
I will try the adding pre-charge circuit later after work out the detail connection.
For my 3458, I had checked the bias and it is very good arround 20G Rin and found nothing abnormal from the curve. Attached FYI.
Best Regards,
szszjdb
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I just have a question with respect to calibration since my knowledge of the Japanese language reading is not very good :palm:
Of course a basic calibration is done with External 10.0000000VDC and 10.0000000K ohm.
When temperature change do you guy's use the Internal calibration?
It always scares me a little been afraid of changing the basic calibration. :horse:
Internal temperature is always 33° C at least each time I check it.
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The internal calibration is there to reduce temperature an aging effects. So it is supposed to be done when the temperature changes significant (e.g. more than 1-2 K) and from time to time, like once a day, if critical measurements are done. The internal cal should be done after the meter is warmed up of cause.
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Is a GPIB driver available for NI or Excel or any other software?
Since there is a GPIB interface I suppose since this instrument was quite popular there should be a way to communicate with it.
I know it is possible to write a srcipt :blah: :blah: :blah: :wtf: :horse:
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http://www.adcmt.com/techinfo/product/catalog_ducument/pdf/CommandMatrix_6581_1.pdf (http://www.adcmt.com/techinfo/product/catalog_ducument/pdf/CommandMatrix_6581_1.pdf)
Hello. I do not have 6581, only 6871.
you can use this document.
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I've started week long run on my resistance references, and this time added my (broken/bad) R6581T into the mix.
Main standards: SR104 on 3458A-rusty, G9330 zombified with VHP resistor on 3458A-cracky, G9330 100 ohm in thermal chamber (18-40c very slow ramp) over 2002-6, PT1000 Honeywell HEL-705 in G9330-10KZ over 2002-4 and finally Fluke 5450A resistance calibrator 10Kohm output over Advantest.
It drifted +8ppm already over last 12 hours. :-//
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uploaded the A03 firmware. :popcorn:
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uploaded the A03 firmware. :popcorn:
Thanks. Is the smaller flash still the same (A02)?
It looks like one byte was changed (apart from stepping revision numbers).
It also looks like that there's no checksum.
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It looks like one byte was changed (apart from stepping revision numbers).
This byte is a part of 32-bit floating point number, used in calibration math procedures.
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It looks like one byte was changed (apart from stepping revision numbers).
This byte is a part of 32-bit floating point number, used in calibration math procedures.
Is this a "real" firmware upgrade with eventually bug fix? :palm:
Strange with only one byte change :bullshit:
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Replace binding post .
I will post here how to replace the binding posts on this instrument.
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What do you need:
Aluminium plate 1,5mm
6 spacers M3 and 8 mm long
3 red and 3 black microvolt bindings posts
On the last picture due to optical effect it look like the bindings posts are not centered but they are drilled with a precision of 0.01mm
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It looks like one byte was changed (apart from stepping revision numbers).
This byte is a part of 32-bit floating point number, used in calibration math procedures.
Just having one constant changed is odd. I would not expect any really serious floating point constants in the ROM that would effect the final reading. The main constants I would expect would be something like limits for the self tests and maybe a set of default cal values to get started, when the there is no valid calibration available. So I would guess the self test to get more or less stringent at one point - kind of a small bug fix.
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Just did another performance verification test with A03 firmware on my 6581T.
No difference in results. 6581T was calibrated to this same source 1 week ago, so all specs are relative 24 hour, not absolute.
DCV test
(https://xdevs.com/doc/Advantest/R6581T/cal/test_dcv_xdevs.png)
DCL 10V range test
(https://xdevs.com/doc/Advantest/R6581T/cal/test_dcl10v_xdevs.png)
4W-resistance test, everything over 1Kohm is too low, 19K-19Meg is -270ppm off.
(https://xdevs.com/doc/Advantest/R6581T/cal/test_res4w_xdevs.png)
DCI test. Good except 10uA and lower ranges.
(https://xdevs.com/doc/Advantest/R6581T/cal/test_dci_xdevs.png)
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Report of R6581T that pass all tests:
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I am not that surprised to see the -1000 V test fail: with the high impedance of the input divider the input current spike from AZ switching can easily cause trouble.
For the specs of the meter, I would expect slightly different values: there usually are parts relative to range and relative to measured value. It looks like the relative to range part is not included.
For the Ohms ranges, it is odd to see the large error for the step going from 10 K range to 100 K range. The earlier tests with just a resistor had trouble between higher ranges. The higher ranges still look like they are consistent. It could be a problem with the ACAL step from 10 K to 100 K. If it is an ACAL problem, it might be worth checking how repeatable the ACAL results are for an 10-50 K (in 100 K range) or similar resistor are: so measure the same resistor with a few (e.g. 5 ) ACAL calls in between. This would at least show random contributions and maybe drift type errors (e.g. ACAL getting worse at higher temperature). The problem with the Ohms also corresponds to the small current ranges to be off.
For the INL test it is rather difficult to look at the data in a table. A graph with INL deviation would be more practical. However the data still look good and well within the source specs numbers given in the table (not sure how much of this is scale factor and thus not relevant to INL though - so for the INL test the source might be better than shown).
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Actually, +1000V also failed, I just spotted error in my math, its false pass on table. :).
I did some test earlier multiple CALs and value of 100Kohm was about same off every time.
Also 10Kohm drifted a lot last week from last ACAL, over 14ppm.
(https://xdevs.com/doc/Advantest/R6581T/cal/test_10k_rstd_1.png) (https://xdevs.com/doc/Advantest/R6581T/cal/test_10k_rstd.png)
Purple is 6581T over 10K (5450A).
I have 3458 running same test suite over same source, will see data in few hours. That will allow direct unfair comparison between the two DMMs.
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Report of R6581T that pass all tests:
God, what a mess!
-100V (Short) Tolerance- is -0.300063V It's a joke?
All of DCV (and other) tolerances span are 10 times bigger, than DMM's spec. DMM fails almost all :palm:
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Report of R6581T that pass all tests:
God, what a mess!
-100V (Short) Tolerance- is -0.300063V It's a joke?
All of DCV (and other) tolerances span are 10 times bigger, than DMM's spec. DMM fails almost all :palm:
Don't get your instrument calibrated or checked by those guy's.
My bad, I did not check the data, just found it and supposed coming from a calibration company that it is correct and reliable. :palm:
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That test mainly showed the calibrator is by far not up to the task. Even if the test results are outside the meters specs, it is well possible that the calibrator that cases the error.
The large drift of the resistance readings of the 6581 could be due to the meter not been used for quite some time before. This can cause quite some drift for the initial phase. The ohms circuit is not build for low drift and may rely on regular ACAL cals.
I think TiNs cal check table has quite some odd points with the uncertainties. Somehow values relative to full scale and measured value are mixed / not combined.
Though not part of the official specs and test procedure, it might be a good idea to check the input current at different levels of input voltage. I kind of understand that they don't have that as part of the specs and cal procedure - this is expected to be one of the weak points of the meter. Still I would consider checking input bias an import point, as quite some faults (e.g. ESD damage, leakage at the LM339) and contamination might cause excess input current.
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That test mainly showed the calibrator is by far not up to the task. Even if the test results are outside the meters specs, it is well possible that the calibrator that cases the error.
That refer to eurofox data, I'd believe :).
The large drift of the resistance readings of the 6581 could be due to the meter not been used for quite some time before. This can cause quite some drift for the initial phase. The ohms circuit is not build for low drift and may rely on regular ACAL cals.
I agree on drift point, as 6581 indeed was collecting dust unpowered for months before. But I'd still expect ACAL to perform in 24hr-spec accuracy transfers for all functions/ranges.
Obviously my 6581T have ACAL broken/faulty as such transfers are impossible here. That was my only conclusion from data.
Here is promised data from 3458A on same source (https://xdevs.com/doc/HP_Agilent_Keysight/3458A/cal/CR_3458B_XDEVS_R6581T_TEST_MFC_JUN_25_2018.pdf)
I think TiNs cal check table has quite some odd points with the uncertainties. Somehow values relative to full scale and measured value are mixed / not combined.
I used worst-case sum value for all 24 hour specs, not RSS.
In case of DCV 10V range 10V value math is :
10.0 VDC (10.00 Range) = Source 10.0000000 V vs DUT result 10.000002 V,
MFC spec = 1.47 ppm + DUT 3458A 24h 0.55ppm = 2.02ppm.
Measured deviation is 0.219 ppm or 10.84 % of 2.02 ppm.
Since calibrator is adjusted to same meter (or other 3458A I have), only relative specs are used.
Here is absolute calibration report (https://xdevs.com/doc/HP_Agilent_Keysight/3458A/cal/Final_CR_3458B_R174_JAN_5_2017.pdf) from Jan 7, 2017.
Generated from same meter using actual in-cal 732B/SR104/SRL1 <1ppm absolute.
Though not part of the official specs and test procedure, it might be a good idea to check the input current at different levels of input voltage...
Noted, will do, but it's low in priority chain.
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Discharge a 5.6NF capacitor starting with 10V, 1 PLC and no AZERO
10V to 9V in 2353 sec
10V to 8V in 3067 sec
10V to 7V in 5325 sec
I would like to compare to a 3458A.
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The discharge is really very slow: around 1600 seconds for a 1 V drop and thus around 3.5 pA. This is well in the range of random leakage currents. This is an exceptional good value - nearly to the point of having some doubt in the capacitor value. Typical DMM specs are more like < 50 pA. The current does usually depend on the voltage and could be different with a negative voltage.
The more tricky range is the negative sign, especially negative voltage with AZ mode, as there likely is some extra current pulse from AZ switching.
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The discharge is really very slow: around 1600 seconds for a 1 V drop and thus around 3.5 pA. This is well in the range of random leakage currents. This is an exceptional good value - nearly to the point of having some doubt in the capacitor value. Typical DMM specs are more like < 50 pA. The current does usually depend on the voltage and could be different with a negative voltage.
The more tricky range is the negative sign, especially negative voltage with AZ mode, as there likely is some extra current pulse from AZ switching.
I agree, my DMM got a very high impedance.
I think that many R6581 sold on second hand have problems, I think I'm lucky to have one that spend probably most of he's life on a shelf.
The checked the capacitor, picture from my LCR meter in attachment.
It show as wel that isolation from my new bindings posts are good :-+
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I've finally found it >:D
Advantest R6581T, as well as ADCMT 7480T, are not true metrology instruments. They are part of Advantest T2000 system mainframe.
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Hi,Mr.Kleinstein and Mr. Mickle T.,
Thanks a lot for the help on the reparing of my R6581!
Really learning a lots from both of you!
Merry Christmas and Happy New Year
szszjdb
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After waiting for almost decades my R6581D received today. Bought it on 07.02.2019 on ebay (https://www.ebay.de/itm/Advantest-r6581d-Digital-Multimeter-/292936543553?nma=true&si=0EFfoOpZpXwq4HNqDEU1CO8RECA%253D&orig_cvip=true&nordt=true&rt=nc&_trksid=p2047675.l2557), it was shipped on 08.02.2019, arrived in Frankfurt on 09.02.2019 and made a long road trip through Germany, was lost meanwhile and arrived without any further announcement today. Luckily I had enough money in my pocket to pay the customs.
2019-02-26 22:35
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Bad enough I found the meter packaged very very poor, just put diagonal into a much to small cardboard box with some bubble wrap on top and bottom. The handles, rack mount adapters and screws were just put loose into the box without any plastic bag. I wondered that they were still there, but sure enough they are the reason for some additional scratches in the chassis coating. :--
Due to the bad package the meter was slightly damaged at one corner. Could have been prevented if the box was fitting the size of the meter and the bubble wrap put around the meter. :--
A very quick eye on the inside of the meter revealed nothing obvious, all caps were looking fine, everything seemed to be in place, so I changed the transformer taps from 100V to 240V and replaced the T500mA fuse with a T250mA as suggested by the marking on the back of the unit.
A check of the battery shows it's completely dead, so needs to be replaced. Comparing the pictures of R6581T on the web with the meter in front of me revealed a few differences, that I will present soon.
Time to power the unit up to see if we got a winner. :-//
Well, maybe... the meters powers up to a certain point, the fan is running, but the display, which is slightly dim but still readable, shows:
PANEL CHECK
+291,"Communication error (from main to panel)"
Time to contact the seller and ask for some refund as the meter was declared as used and not as defect.
Most likely a power rail issue or some connection problems? Any suggestions what to look for? Turns out to become a repair thing instead of get it, service it and use it.
-branadic-
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Because of the rough trip, I would check for loose connectors, including the optical fiber. There might have been quite some force to cause the damage at the corner - so even loose parts or other mechanical damage is possible.
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Well, checked for that already.
My japaneese is a little bit rusty, but the manuel reveals: "Communication from the main body to the panel at power up when there is an abnormality in the check"
Wow, that's a lot of new info :-DD
I think I need to check the boards for some indications of a crack and measure power rails.
-branadic-
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That packing is among the worst I've ever seen. I'd not rest until seller refunds at least half of the unit :-BROKE.
As for FP issue - I would try to release FPC cable from frontpanel/CPU boards and reseat it back again, to see if it's just the connector got loose.
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Tried that, but without any change in behaviour. Currious to note is, that cursor left and cursor right button are working. Will check the rails and solder joints tonight as all the connectors have been disconnected and reconnected.
-branadic-
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Poor meter :o
:--
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What I can say for now, it's not an issue of the flexible cable and their connectors, as I was able to check the connection from one board to the other. Next step is to identify the power rails and check if they are any good. Silly me, I forgot to pick up the ESR meter so I can't check the caps in the unit today. :(
-branadic-
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what a pity.
Good luck
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Yeah what a shame.. Hope you have luck with repairs..
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branadic, I wish you luck and a calm hand to repair this instrument successfully.
The packaging and the non - working state really are a disgrace caused by the seller.
Frank
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I made some progress today. Find the problem on the picture :-//
-branadic-
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:(
Bad photo.
Dead C3?
Cut off R111?...
Need a sharper photo. :-//
For sure. Near R10 imprint from something at impact.
-
There is a cut in pcb...
-
There is a cut in pcb...
Bingo :-+
Since I couldn't find something obvious I decided to disassemble the main board and what was hidden before showed up.
As expected before the poor packaged meter saw some shock during transport, thus also the transformer mounted on an aluminium chassis above the main board. This shock resulted in a permanent deformation of this chassis, but during this shock the screws that are fixing the transformer to this chassis must have touched the main board and cutted at least two traces on the board.
The worst to the seller and his inability to package such equipment appropriate.
Sorry for the bad quality picture, but I was pretty angry about this damage that could have simply be prevented.
-branadic-
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And that's still happiness in unhappiness. The damage could have been much worse. Hopefully no multilayer traces are affected.
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branadic, pay your attention to R111.
It seems crookedly worth it.
Успехов !
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So I was able to fix the broken traces locally instead of long bodge wires from one via to another. Two traces were broken and a third free of solder resist, however I thought it was good to put some solder on it to be sure in any case. A quick check showed a runnning meter. A drop of UHU endfest 300 is currently hardening and saves the bodge. A new battery is also already installed. All caps of the board are still very good (measured with ESR meter).
So we can put everything back together, mentally prepare ourselfs to calibrate it with artifact calibration (lost cal data as battery was fully empty) and I'm now supposed to be an official volt nut as I have a running 8.5 digit meter on my desk. :-+
-branadic-
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Congratulations on official volt nuttery!
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Welcome in the Club.
Looking forward to Metrology Meeting, an to see you again, and your 6581
Frank
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As long as you don't call yourselves "sculls and honests," go ahead with your club. :-DD
;)
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The first rule of VoltClub is: you do not talk about VoltClub.
The second rule of VoltClub is: you do not talk about VoltClub.
Third rule of VoltClub: someone yells stop, goes limp, taps out, the fight is over.
Fourth rule: only two guys to a fight. Voltmeter and reference voltage source.
:-DD
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What is with all the orange dots over all the IC's, never seen anything like that is equipment before?
Well done with the repair, I'm always put off Advantest and Yokogawa equipment due to lack of service documentation :rant:
Care to name and shame the ebay seller, I have bought stuff from Korea before and would like to be sure I avoid the idiot :rant: who packaged your meter.
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Now that we have a working unit we can focus on a few differences.
- there is some bodge on one of the relays that looks like an original factory hack
- we can also find a parallel arrangement of resistors, which also looks to be original
- the Connector for AC board is installed
- a bodge wire from one of the AE resistors to a pot (not sure if this is original)
Looks like the unit is from somewhere between 1999 and 2000.
-branadic-
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Congratulation to the repair. Hopefully no extra hidden damage.
The pot in combination with high precision resistors is odd but seems to be normal. Earlier in this thread Mickle identified it as TC adjustment for the slow input amplifier.
The parallel resistor look kind of normal as a way to get a higher power rating / lower resistance for the input protection.
The lower resistance could reduce the maximum allowable safe voltage - one the other side less resistance reduced the noise in the 200 mV range.
One possible point to check could be the default bug in the relay control for power reduction. So one of the relays at the input may get rather warm. Earlier in the thread there is a description of a possible fix with a few bodges.
There are a few reports of rather high input current - so it may be worth to check the input bias as part of the performance check.
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Thanks to all. After external calibration I will observe the meter to see if there is any strange behaviour.
Do we have picture or schematics of R19002 scanner card (photo mos relay) or R19003 scanner card (mechanical relay)?
-branadic-
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Since I'm still waiting for my Datron 4000A to arrive, ...
>>What the hell is currently the matter with shipping? My Fluke short that I bought on ebay got lost during shipping (delivered to a neighbor, but we don't have a neighbor in our building) and one is waiting for decades for other stuff to arrive... |O <<
I couldn't resist to perform a first quick and dirty calibration. The meter was running for a few days to acclimatize and I ordered an additional FLUKE 884X-SHORT that was going for only 31€ on RS, compared to 83€ on Farnell for a Fluke 8620 or 85€ for a Fluke 8610.
I used one of my LTZ1000 references to set a raw estimated 10V value (still havn't enough different measurement points yet to state it's "real" value) and a Vishay Z201 10k 0.005% resistor with a reading on my Prema 5017SC with 6 decimal places.
However, external calibration performed well and without any issues. The meter is fully functioning and by now there is no strange behavior. :-+
-branadic-
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From the earlier part of the thread I would do a quick test of the DMM input current in the 10 V range, with something like 10 PLC mode and a capacitor at the input. Not all the meters seem to be really that high in input impedance over the whole range. Even if one does not want or can do much about this, it is good to known the limitations of the meter.
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Do we have picture or schematics of R19002 scanner card (photo mos relay) or R19003 scanner card (mechanical relay)?
Noone?
Is someone willing to share GPIB script for the meter? I saw Illya controlling his meter via Raspberry Pi...
-branadic-
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Basic support for 6581T is public in my TEC-kit python app (https://www.eevblog.com/forum/metrology/tec-kit-datalogger-python-app-(with-tec-oven-controls)/msg2107438/#msg2107438).
Meter accepts most of SCPI commands so it's not hard to adopt the app for particular measurement log needs.
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Do we have picture or schematics of R19002 scanner card (photo mos relay) or R19003 scanner card (mechanical relay)?
Here you go. :)
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Thanks to a very kind member of this board I received some binding post's as an upgrade for my R6581D. For installation I need to design some adapter, similar to what another guy already designed for Pomona binding posts.
-branadic-
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While I'm waiting for the adapter to arrive to install the new binding posts, I performed an INL test with Datron 4000A and had calibrated K3458A in parallel to compare to. Here is the result.
Beside the known turn over issue I'm very happy with the INL result. The only thing that really concerns me is the gain error. I have no idea how to compensate for that. Maybe someone can give me a hint, if this can be improved by the relay mod MickleT. came up with or if there is something else to look for on the board.
-branadic-
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The relay mod that Mickle suggested / found would improve on the power consumption and local heating at the relay. This could reduce thermal EMF errors - so more like reduced offset error and maybe settling after range switching, especially for the 100 mV range. I would not expect better INL.
The INL error seems to consist of mainly 2 parts: the usual U³ part that could be caused be things like self heating in one of the resistors in the ADC. The other part is a kind of step near zero - not sure about the reasons here:
The way the feedback during run-up works changes near zero crossing. The integrator output patterns are quite different for the positive and negative side. One side is more like fine PWM like feedback tied to the ground side. The other sign is more like pattern based with a hard upper limit. This change can cause errors either directly from occurrence of short intervals (e.g not perfect integrator settling), maybe even from a change injection effects, maybe transient heating, supply settling or similar.
The second path for an error could be DA, as the change in FB mode also effects the average integrator output voltage (AFAIK Mickle did a measurement on this, earlier in this thread). The average voltage should approximate the DA caused error curve shape and this way the DA error can reflect the change in feedback mode. As the integration cap is quite large the 6581 may be quite sensitive to DA compared to other high resolution DMMs.
Another weak point may be the input MUX / amplifier. There can be quite some transient current when switching - for higher impedance sources this could also cause errors. At around zero the transients may changes to, though the larger problems come up at higher voltage.
There might be a way to numerically correct the step like error part. However this may not work well just in the transition region. The details on the very fine scale (e.g. -10 mV to 10 mV around the jump) could be more complicated than just a jump. The error would be especially bad if the jump is exactly at zero and thus effecting the zero reading of the AZ mode. worst case one might have to shift the input amplifiers offset just a little.
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Don't get me wrong Kleinstein, but beside the turn over issue there is no INL issue. It's more like there is a gain error present, that results in a negative slope over the entire 10V range, thus +10V /= -10V.
-branadic-
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Hi branadic,
haven't you calibrated the 4000As gain yet?
Frank
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Frank, it's not a gain issue of the Datron 4000A, but a gain issue of the R6581D, if gain is the correct word for it. You can clearly see that, as K3458A shows that Datron 4000A produces the correct output voltage. Both meters were in parallel to the Datron 4000A.
-branadic-
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The calibration of the 6581 seems to be off a little (e.g. some 5 ppm) compared to the other instruments.
For most of the part the linearity looks good. The range from 0 to about -2 V and especially the jump near zero is probably the worst part of it. For the U³ part it looks like that much of the error is due to the calibrator, as the curves look similar for both meters. Still there is a little difference.
However the curve does not look like there should be a lot of turn over error.
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Kleinstein, no calibration is not off, it was freshley calibrated at 0V and +10V comparing a 10V reference to the K3458A (artifact calibration), however -10V doesn't fit and therefor the slope in the deviation plot. To make it more clear, the plot of deviation [V] is meter reading - set voltage. The resulting slope from +10V to -10V is exactly my issue and I have no idea how to get rid of that.
-branadic-
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Is the zero offset OK ? The first curve for the 6581 looks like there may be quite some error at 0 V.
The deviation plot also has a slope for the positive side, so the error is no just for the negative side.
A turn over error suggests that the positive and negative behave different. However the curve does not look that asymmetric. Still it is hard to judge how much is from the calibrator and how much from the meter(s).
A possible problem could be from fast versus slow measurements. Thermal effects could take some time and thus behave different for just a zero reading and the zero reading as part of the AZ cycle. So there could be some settling effects, that might effect the calibration measurement. An error in the zero (e.g. thermal EMF from the relay) could also be a factor if rather large. This could improve with the relay fix, especially if the internal correction for the offset is somewhat handled the wrong way during calibration.
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I think I had a temperature issue and temperature changed over time, since the measurement was done with NPLC100, 10 values per voltage step and 20s delay time between each voltage step for the calibrator to stabelize and from +11V to -11V.
I will repeat this measurements with NPLC20, only 5 values per step, 10s of delay between each step and an alternating voltage step strategy, which means +0V, -0V, -100mV, +100mV and so on. This way I should get similar results for both, positive and negative values without temperature variations effecting the measurement to much and since the Datron 4000A switches output polarity only results will become better, hopefully.
-branadic-
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20s seems a bit short to me. My Fluke 5440B takes much longer to get very stable. For the first experiments I took measurements with the 3458A and I did that until three succeeding 3458A measurements are within a given range.
If you want to test transfer accuracy it might be better (or another experiment) to jump between 0, 1V and 10V with some random numbers on top. Such a meausrement is done in a couple of minutes and don't need ultra stable temperature enviroment. And the result is more meaningful than these nice looking, but not much saying INL curves. They are nice for comparisions, but for absolute numbers to calc with, I prefer the steps.
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To reduce the temperature effect and make is visible one should run the same points several (e.g. 5 x) times. This may require a shorter measurement (may not be that practical as the settling time can be significant) or less points. (e.g. 0.25 V steps and fine steps only for a smaller range, possibly as a separate run).
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Finalized my binding post mod. The adapter is 3D printed and designed to match the LowThermal binding posts. It looks like Advantest initially planed to install this higher quality posts, but decided for the brittle plastic solution instead. It's still no 3458A, but definitely higher grade now and I like it. :-+
-branadic-
EDIT: Attached are the CAD files for the adapter.
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And just for completeness I received two 3D printed adapters with a ceramic filled resin today, so I changed the front adapter and also installed the rear binding posts. There is no drilling or other modification needed, just simply install the binding posts to the adapter and screw it down to the chassis.
-branadic-
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A very nice update, it gives even a higher value look.
Could you reveal where to get this posts and their price?
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You can get the binding posts here: http://www.lowthermal.com/cables-and-connectors.php (http://www.lowthermal.com/cables-and-connectors.php)
Please contact them yourself for a quote.
-branadic-
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While measuring one of my LTZ references @25°C in a thermal chamber over a longer periode with my R6581D I noticed that there is quite some t.c. visible. Therefor the internal temperature was logged together with the voltage readings. It turned out this t.c. is due to the meter itself and about 0.8ppm/K. A measurement of the t.c. of the internal reference itself revealed, that this t.c. is not due to the reference, but something else. Time to upgrade R6581!
Several improvements are documented here:
http://bbs.1ppm.cn/topic/23/advantest-6581 (http://bbs.1ppm.cn/topic/23/advantest-6581)磨机-zy的得意杰作
http://bbs.38hot.net/forum.php?mod=viewthread&tid=28698&highlight=6581 (http://bbs.38hot.net/forum.php?mod=viewthread&tid=28698&highlight=6581)
It just so happened that pipelie organized a group buy to replace R234 which boosts the zener voltage to 10V and R200 as part of the voltage to current converter.
R234 original: Alpha Electroncis SLD (7k34 X F 10k0)
R234 replacement: Vishay VHD200, hermetically sealed
R200 original: Alpha Electronics SS103F20k00 XF
R200 replacement: Vishay 300193ZT
The resistors arrived on friday so the weekend was used to replace them. Unfortunately there is no drop in replacement for R200, so the leads of the 300193ZT needs to be bend slightly into the correct position, while the VHD200 fit perfectly.
Now that the replacement is done it‘s time to let the meter settle with the new components installed, which is said to be about a month and see how this modification turns out.
Not to hide anything, removing the networks is a real pita and needs careful work and a lot of solder to heat up all pins equally. The vias are also very small and hard to clean. So unless you are well experienced in such work I would not recommend it, as you can damage a lot.
I use drill needles to finally remove last solder pieces inside the vias while heating the pad.
Also note that after that modification the meter needs calibration. To be continued ...
-branadic-
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That change is a brave and somewhat risky change. These two resistor sets (especially R200) are really critical. R200 not only effects the overall gain, but can also have an effect on the INL.
I am not so sure the meter would really need a full calibration. Most of the changes should be compensated for by ACAL.
For longer term drift measurements one should consider a ACAL call from time to time anyway. This should remove much of the TC, at least the part caused by R200 and R234.
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It sucks, if the meters t.c. dominates a 24h measurement of a LTZ1000 reference, so that was at least the reason for me to change this dividers, hoping that overall t.c. improves. However, this modification were already proven by the chineese R6581 group (a Tencent QQ group) to improve the t.c. of the meter. It was the second run of a group buy on such resistor dividers and I had the chance to participate. Unfortunately the progress on the meter made by this group are barely visible to the rest of the world. The meter don't need a full calibration, but an artifact calibration (short, 10V, 10kohm).
This modification still doesn't improve reversal error (+10V, -10V), that is hopefully another story for the future.
-branadic-
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It sucks, if the meters t.c. dominates a 24h measurement of a LTZ1000 reference,
[..]
It does? Isn't the whole point of a voltage reference to be stable? More stable than the measurement tools available?
You know that you will need now a new, more stable voltage reference, don't you? And then ...
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Unfortunately, the TC of my 3458A is also not that great (but better than 0.8ppm/K). Therefore, I use the 3458A as a ratio machine only. I build a low thermal multiplexer and the 3458A just compares voltages. No matter if I compare resistance or voltages. And that is what the 3458A is best for.
During a single comparision point the temperature will not change significant. And it is much easier to put the reference you compare against in a stable enviroment than a big 19" DMM like the R6581 or 3458A.
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Incorrect scheme, from the manufacturer.
Expand the capacitor.
(http://img.radiokot.ru/files/98285/thumbnail/244lni4kc2.jpg) (http://img.radiokot.ru/files/98285/244lni4kc2.jpg)
Wrong.
(http://img.radiokot.ru/files/98285/thumbnail/244lng7f2k.jpg) (http://img.radiokot.ru/files/98285/244lng7f2k.jpg)
Circuit diagram.
(http://img.radiokot.ru/files/98285/thumbnail/244lnh4qd4.jpg) (http://img.radiokot.ru/files/98285/244lnh4qd4.jpg)
Right.
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Have you double checked that it's not only a wrong screen printing, but the component is installed right? I would expect a blown capacitor if installed in the wrong direction.
-branadic-
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Twice, three times ... :)
Measured voltage.
The result is the same.
Incorrectly installed. :palm:
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I just checked my R6581 and silkscreen and orientation of cap is matching.
Therefore this problem seems to be corrected.
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My 6581 is also wrong! |O
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Had to swap the capacitor in my unit too.
-branadic-
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I just checked my R6581 and silkscreen and orientation of cap is matching.
Therefore this problem seems to be corrected.
Well, you're in luck.
What year is your multimeter?
But TiN, Mickle_T, ramon, deadlylover, chihaxinh and I’m out of luck.
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/ (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/)
https://www.eevblog.com/forum/repair/pls-help-me-repair-advantest-r6581/ (https://www.eevblog.com/forum/repair/pls-help-me-repair-advantest-r6581/)
They need to fix their multimeters.
I wonder from what year, and from what serial number did the Advantest correct this error?
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I do not know the exact year of my R6581, but most IC datecodes are from 1995 and 1996, therefore it was most likely build in 1996
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there is a stamp "9640" on some of my boards
If your boards are newer, there must have been an change and the C215 Problem was not solved, but instead created/introduced with this change.
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Hopefully someone can help interpreting the following results...
I hade Datron4000A, K3458A and R6581D in our big climate chamber. I first set temperature to 23°C @ 45%rH and waited over 24h for everything to stabilize. I then performed internal cal on R6581D and ACAL on K3458A, then started my frist INL measurement.
Afterward I've set temperature to 20°C @ 45%rH and repeated the INL measurement without new internal CAL / ACAL. Finally I repeated the measurement at 26°C @ 45%rH. Attached are the results I got.
First row is K3458A deviation (blue) and R6581D deviation (cyan) vs. Datron 4000A. (K3458A - Datron4000A & R6581D - Datron4000A).
Second row is R6581D deviation vs. K3458A.
Third row is temperature vs. Datron4000A, simply to show that temperature was stable during measurement.
What is clearly visible is, that I was able to perform INL measurement at a given temperature without influence of temperature variation during that time (-11V up to +11V and from +11V down to -11V, so two full "ramps").
R6581D matches Datron4000A best at 20°C with a slight offset (flat INL curve), while K3458A says that both show a gain error. The shape of the error curve for R6581D looks to be constant, though influenced by a temperature dependent gain error.
What else can I extract? Unfortunately I didn't yet managed to perform temperature of K3458A and R6581D against a constant reference voltage, but maybe that isn't necessary as the information is already captured with the measurements I already performed?
-branadic-
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The 3458 vs Datron4000 seem to be off a little in the absolute value (e.g. calibrated from different sources). Some 3-4 ppm is not very much and there seem to be a slightly different TC too. One the good side the linearity seem to be quite good.
It looks like the R6581 has some gain TC relative to the 2 other instruments - still in the 1ppm/K range.
The INL error looks a little like some of the curves show a clear pattern, that does not change much with temperature.
There are 3 sections: -10 to -4 V, -4 to 0 V and the positive side.
The jump (some 0.6 ppm) near zero is nothing really new - chances are high it is related to DA as there is also a jump in the average integrator output voltage near zero. This part is probably the most troublesome part, as the internal AZ measurement uses a conversion near zero. If this just happens to be in the steep step part this can increase the errors quite a bit.
edit:
For the DA the averaged integrator voltage is a good indication of what to expect. User Mickle has measured and shown this here:
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1535345/#msg1535345 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1535345/#msg1535345)
So I would interpret the curvature for positive voltages and the jump as caused by DA. The break in the curve near -4 V may be due to another effect.
For the integration cap, there may be the possibility to get lower DA from good NP0 capacitors. For the TDK brand I found DA at about 1/5 of the PP ones I tested. It is still not sure how good or bad the installed original cap is. The actual DA can vary between brands / types (e.g. purity of the PP material). As they claim a much better INL, chances are they originally had really good caps. Possibly the caps just got worse with age or the later caps were just not as good and nobody noticed this. Due to the slow modulation during run-up the ADC design is definitely very sensitive to DA. When looking for good caps, keep in mind the usually DA value give is for some 10-900 seconds. The relevant time range here is more like 2-200 ms. So the loss factor at 1 kHz may be the better approximation. Anyway the numbers in the Data-sheets are usually limits, possibly just limits of there tests.
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What happens when you vary humidity e.g. 35 % RH and 55 % RH at 23 °C?
Dr. Frank recently emphasized how you have to watch ambient temperature of a 3458A DVM when it comes to the last ppm. Did anybody try to convert one of those cheap incubators to a temperature oven for a 19" DVM?
Regards, Dieter
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As time in the chamber is limited I've started measurements of a 10V source (temperature compensated LTZ1000) at constant temperature, while temperature with DMMs inside the chamber is varied. Therefore I again performed ACAL/internal Cal at 23°C and 45%rH, measured some hours and set temperature already to 20°C. Will go back to 23°C, afterwards 26°C and again 23°C.
I guess there is not much time left as I need to leave chamber tomorrow.
My hope was, that Frank leaves a comment, too, but maybe he is still thinking about his answer?
-branadic-
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Hello branadic,
That way, I can't extract no reasonable information.
these graphs show, that there is a gain (adjustment) error between the 3458A and the 4000A, as well between all three instruments.
So for an INL graph, you would need to normalize these gain (and offset) errors first, to get the INL over U.
What was your intention, in the end?
To determine the INLs of the 4000A and the R6581, assuming very low INL for the 3458A?
For the extraction of T.C.s that's also not so good, as all three T.C.s interfere, so your running T.C. measurement on the 3458A probably will let you solve for the other T.C.s
A wider temperature span like +/- 5 ..10 °C would have been better, I guess.
So a nice experiment, when you calculate the INLs correctly.
Frank
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Thanks for the answers, that I will answer later, as I'm still busy in analyzing them.
@ Kleinstein
The capacitors used are 1.5nF for fast sampling and 20nF for slow sampling polypropylene by Soshin.
Compared to other capacitors of different brands they are specified for low dissipation and tolerance:
Film capacitors for general use NQP
Low loss (about 0.02%, 1kHz) capacitor.
A small tolerance of ± 1% has been realized.
Small and high precision capacitors with good space factor
Suitable for filter circuits.
By now I couldn't find a proper replacement for testing, as 20nF is somewhat unusual and has to be made by paralleling two 10nF capacitors. I couldn't find proper NP0/C0G capacitors from TDK, as suggested by you. Maybe you can name a capacitor series number?
-branadic-
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Ran quick INL sweep on R6581T have here. Results for -10.9 to +10.9 run in 0.1V steps, NPLC30, soak time 10s between points:
(https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_ac_advr6581t_hulk1_11rng_resl8_nplc30_soak10_1.png)
3458A meeting promised 0.1ppm INL. GPIB3 is one of my reference units, GPIB11 is standard unmodified instrument. My broken R6581T shows INL error +0.28 to -0.20 ppm in this run, rather poor as for 8.5D DMM, but aligns with other owners.
As always, RAW-data available (https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_ac_advr6581t_hulk1_11rng_resl8_nplc30_soak10.dsv), no secrets here. Column source - programmed value, duta = 3458A GPIB3, dutb = 3458A GPIB11, dutc = R6581T.
Plot generated by python via matplotlib and numpy (https://xdevs.com/doc/Advantest/R6581T/cal/linearity_plot.py) against polyfit for each instrument row. Config file (https://xdevs.com/doc/Advantest/R6581T/cal/linkit.conf) for app.
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The capacitors I got the best DA with were TDK C2012C0G1H222J085AA (mouser 810-c2012c0g...).
These are 2.2 nF, but I would expect slightly larger capacitance values to be similar. From the DA test I would expect a loss at 1 kHz on the order of 0.005%. The data-sheet does not give much information - so it was just found by a more random search and there may well be even better types, especially for small capacitance (special low loss cap series). With low loss factors the DS numbers seem to be upper limits only - hardly any typical curves. This may be in part that there could be a limit to the measurement with normal instruments.
In a note from Kermet I found the hint that they have lowest DA with CH dielectric - so it may be worth checking one of those types too. C0G is tuned to have a low TC (which is not needed here) so chances are that some other dielectric can be a more clean high isolation ceramic. From the TC CH would still be as good as the film caps.
The absolute capacitance value is not critical so no need for low tolerance.
I would suggest testing something like
C3216CH2E103J115AA and C3216C0G2E103J115AE
There is still a crazy large number of capacitor type to choose from.
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Thanks Kleinstein.
I analysed the pictures posted by MickleT. and pictures I made of my unit. Looks like Advantest used different caps in my unit, maybe cheaper and worse ones? The ones in my unit are potted from the top. Need to disassemble the unit again and check, if I can find a brand or something.
Wouldn't surprise me, if they used cheaper caps in R6581D, while yours TiN is model T.
-branadic-
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Here is a quick estimate on how much error to expect from the DA. The effect of the slower part (e.g. more than some 2-5 ms time constant) of the DA should about follow the average integrator voltage (MickleT has measured this). The worst point there is the jump of some 1.2 V near zero. With some 20 nF this corresponds 24 nC in the capacitor. The full scale charge is 10 V/20 K *200 ms = 100 µC.
For a really good PP cap one can expect a hidden charge fraction of some 0.01%, maybe a little more for the 1-200ms time scale.
0.01%*24nC/100 µC = 0.024 ppm. There may be another factor of 2 as the charge is transferred to the zero reading and thus entering twice in the difference. This would be about the size of the jump expected for a really good capacitor. With a not so perfect one, possibly after aging the DA may be higher by up to about a factor of 10.
The observed jump for Brandic's unit looks like about 5 µV or 0.5 ppm of the FS. So this would be the DA error for a more average to more poor PP cap.
The different caps could be just a different brand - could be the price or just availability of really good caps.
With the slow modulation the design is definitely relatively sensitive to DA, and should know at Advantest. I doubt the would skimp on the cap - at least if they can still get good ones. At the time NP0 MLCCs may not have been available in good capacity and quality.
The INL error of TIN's unit looks like trouble. With quite some error at +-1 V the ACAL scale factors between the ranges may be off quite a bit. From the plot script it looks like the curve is upside down from the other curves showing straight line - measured value.
For some odd reason the jump is near +1 V and not near zero. This is way to much offset for the amplifier (would no longer work in 1 V range), so it would be something with the ADC.
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Multiple capacitor solutions come into mind:
1. better polypropylene foil capacitors
2. C0G/NP0 capacitors
3. Mica capacitors
Meanwhile I analyzed the first of multiple measurements I made and found a correction equation for R6581D, to improve its INL, as it is not limited by resolution.
-branadic-
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With quite some error at +-1 V the ACAL scale factors between the ranges may be off quite a bit.
1V scale does not matter, since all meters in my tests are in manual 10V ranges.
:palm: Lame 6581 does not force range when set manually by GPIB command. Retesting now, my bad.
Same with source, which is locked on 11V range.
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Multiple capacitor solutions come into mind:
1. better polypropylene foil capacitors
2. C0G/NP0 capacitors
3. Mica capacitors
Mica caps are good for long time stability and very high frequency, but they have rather poor DA in the lower frequency range.
An alternative material would be more like a PTFE cap and also PS (similar quality to PP).
For the ceramics I would also consider CH type dielectric - these are also available as 10 nF.
Instead of testing the capacitors in the meter, one could also do a test outside. Such a setup is not so complicated. In a parallel thread there is an example:
https://www.eevblog.com/forum/metrology/project-micro-voltmeter-design/msg2992348/#msg2992348 (https://www.eevblog.com/forum/metrology/project-micro-voltmeter-design/msg2992348/#msg2992348)
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It was Conrad Hoffman who tested several capacitors and gave a brief overview of his results:
http://conradhoffman.com/cap_measurements_100606.html (http://conradhoffman.com/cap_measurements_100606.html)
So I searched, found and ordered some comparable cheap NOS PTFE capacitors, that I will give a try to see if I can measure any difference in INL. No, not one of those audiophoolery capacitors, but good old Ukraine work instead:
https://www.ebay.de/itm/560pF-0-1uF-500V-K72P-6-PTFE-Capacitors-fits-brand-name-Teflon-USSR-NOS/193107860442 (https://www.ebay.de/itm/560pF-0-1uF-500V-K72P-6-PTFE-Capacitors-fits-brand-name-Teflon-USSR-NOS/193107860442)
I also had a look on several different foil and ceramic caps, but they can be even more expensive compared to those NOS PTFE, so I rejected those for the moment.
-branadic-
Edit: Found this on http://www.audio-consequent.eu/info/inf_baue.htm (http://www.audio-consequent.eu/info/inf_baue.htm)
Die verlustärmsten Kondensatoren sind mit Glimmer, Teflon, Polystyrol oder Polypropylen aufgebaut. Der s.g. Verlustfaktor D wird auch Dissipation Faktor DF, oder Winkel tangens delta genannt. Er wird angegeben bei 1kHz und 20°C und liegt bei Folienkondensatoren im Bereich von 0.005-0.00001 bei Elkos: >0.3-0.02 bei 120Hz (je kleiner desto besser !). Der Verlustfaktor steigt mit der Frequenz. Der Kehrwert dieser Kenngröße wird als Güte oder Qualitätsfaktor bezeichnet. Manchmal wird der DF auch in Prozent angegeben z.B.: 0.1% = 0.001.
Die Ursachen der Verluste sind neben den Dielektrikumverlusten die aufbaubedingten Fehler: Die gering vorhandene Induktivität (Wickeltechnik), der Widerstand der Anschlußdrähte und deren Kontaktierung (Lötstellen bzw. ferromagnetische Materialien). Die Widerstandsverluste, insbesondere bei Elkos, werden als serieller Verlustwiderstand zu dem Wert ESR (Equivalent Series Resistor) zusammengefasst. Dieser liegt in der Größenordnung von 5-30mOhm. Die Induktivität (Größenordnung 10-200nH) bewirkt, daß ein Kondensator ab einer oberen Grenzfrequenz (Resonanzfrequenz) nicht mehr als solcher arbeitet, sondern als Spule. Die obere Grenzfrequenz kann bei Elkos schon bei 10kHz liegen ! Bei Folienkondensatoren liegt der Wert bei einigen MHz.
Eine weitere, selten im Datenblatt (nur bei MIL) angegebene Verlust-Kenngröße, ist die Dielektrische Absorption DA (in %) (>> Kabel). Sie beschreibt eine Art Gedächtniserscheinung bei Kondensatoren (recovery voltage, memory-effect). Ein geringer DA scheint immer dann vorhanden zu sein, wenn der Tangens-Delta auch gering ist. Geringste Werte liefern PS, PP, Glimmer und Teflon Kondensatoren. Die Größenordnung reicht von ca. 0.01% bei hochwertigen PP-Kondensatoren bis >10% bei Elkos und MPs. Ungepolte Elkos sind etwas besser. Erstaunlicherweise besitzen oft ältere hochgeschätzte Ölpapierkondensatoren einen recht hohen DA-Wert von 2 bis zu 20% ! Tolerierbar ist eigentlich nur ein Wert bis 1%. Glücklicherweise läßt sich der Einfluß eines hohen DA-Wertes durch eine niederohmige Beschaltung stark verringern (z.B. beim Einsatz in Frequenzweichen).
Ein hochwertiger Kondensator wird mit einer Kapazitätstoleranz von 0.5-5% geliefert (Elkos 10-20%).
Dielektrikum | Konstante ( etar ) | Verlustfaktor (tangens delta)
Keramik >50 0.001
PP 2.3 0.001- 0.00005
PS 2.5 0.0001-0.0003
Glimmer 4-8 0.0001-0.0002
Ölpapier 3-4 0.0001-0.0002
Luft 1 < 0.00001
(https://elektroniktutor.de/bauteilkunde/bt_pict/c_tan.png)
(https://www.darc.de/fileadmin/filemounts/referate/ajw/Onlinelehrgang/a03/bild3-09.gif)
Possible PP caps are http://lcrcapacitors.co.uk/wp-content/uploads/mkp-hr.pdf (http://lcrcapacitors.co.uk/wp-content/uploads/mkp-hr.pdf) available at Farnell: 10nF: 9520830
Possible PS caps are http://lcrcapacitors.co.uk/wp-content/uploads/fsr-vm-fsr-ax.pdf (http://lcrcapacitors.co.uk/wp-content/uploads/fsr-vm-fsr-ax.pdf) available at RS Components: 10nF: 426-3110 1n5F: 116-278
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Reran test with more points, longer time, NPLC20 and more meters :) Vertical scale is +0.25 to -0.25 ppm.
Also used average 3458A as reference, instead of source. So plot data shows deviation of each unit from the (3458-3 + 3458-11 + 3458-2) / 3 value.
(https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_11rng_resl8_nplc20_soak3_1.png) (https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_11rng_resl8_nplc20_soak3.png)
Still something is off around zero with fake-8.5d-meter. :)
RAW data (https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_hulk1_11rng_resl8_nplc20_soak3.dsv)
Python app to plot data (https://xdevs.com/doc/Advantest/R6581T/cal/linearity_plot.py), conf-file for it (https://xdevs.com/doc/Advantest/R6581T/cal/linkit.conf)
Python app used to capture data (https://xdevs.com/datashort/lin_adv_10v_log.py)
Columns in DSV:
source - programmed voltage in source, source locked in 11V range.
duta - 3458-3
dutb - 3458-11
dutc - 6581T
dutd - 3458-2
dutx - 1281
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We all know how you love your 3458A's.
Somebody else might say: Ah, the maximum nonlinearity of the 3458A in the diagram seems to be about 0,11 ppm. Add 50 % (since that value entered the average used as reference) gives 0,165 ppm. What is the maximum nonlinearity of the Advantest and the Datron units?
Yes, the Advantest curve looks very strange, but that may be some kind of adjustment/calibration problem. Your DATRON unit exhibits a very regular and easy to correct nonlinearity behavior (gain difference between positive and negative input).
Considering the temperature coefficients of 0,34 ppm/K (3458A typical as of Dr. Frank) all these errors are small, aren't they?
Regards, Dieter
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The jump at around 0 is the main feature expected from the capacitors DA.
The INL curves that were shown in early publications (comparison to JJA) also has such a jump, though smaller.
The difference could be due to different DA levels of the caps, maybe due to aging or just random variations in quality.
The size of the jump also makes sense for the expected DA level for PP caps.
I don't think the Advantest DMM has a correction for the jump at 0 as part of the calibration. MickleT has looked at the software in detail and never mentioned this. it would kind of make sense to add such a correction in software though.
It would be more like the different gains for the positive and negative side for the DA1281 could be a calibration issue. However I don't know if it uses different scale factors.
For the local peaks at high voltage there can be noise (especially from the references) involved.
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With the remaining time on the last day in the climate chamber I tried to get a raw idea of the t.c. of our 3458A and my R6581D, thus only a ±3K change (ACAL/internal cal @ 23°C --> 20°C --> 23°C --> 26°C --> 23°C).
Note, the t.c. prior to the resistor upgrade was around 1ppm/K, measured against my LTZ1000 reference in a thermal chamber at home, while watching the change in voltage readings due to changing ambient temperature.
So t.c. has significantly improved, though is still twice the value of our 3458A, but infact not to bad.
-branadic-
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Branadic, thank you for your good work with the thermal chamber. That's the way to go!
Althoug T.C. for R6581 is twice than 3458A, avid observers looking that graph with lupe will note that R6581 provides a flat line two times faster than 3458A.
In fact 3458A is not able to provide a flat line when we step down from 23°C to 20°C and up again to 23°C and 26°C.
This can be a trap for young players (and for metrology experts as well, that calls R6581 a fake 8.5 digit dmm ;-)
(this reminded me this topic ...
https://www.eevblog.com/forum/metrology/t-c-measurements-on-precision-resistors/msg1169432/#msg1169432 (https://www.eevblog.com/forum/metrology/t-c-measurements-on-precision-resistors/msg1169432/#msg1169432)
"try a test where you hold temp for a dwell time to find out the thermal time constant of your test setup.
In other words, change temp 5 degrees, then hold temp steady until you see resistor stabilize, then
change again and wait until you see the resistors really stabilize, etc.
Until you do that test you won't know how fast your test setup can respond to temp changes.
You might find out your temp. ramp rate has to be much slower.
We don't use a constant temp ramp, we've found that a dwell time at each temp level is a little safer.
That will show you if you're outpacing the resistor's ability to stabilize to the new temperature.
https://www.eevblog.com/forum/metrology/t-c-measurements-on-precision-resistors/msg1170432/#msg1170432 (https://www.eevblog.com/forum/metrology/t-c-measurements-on-precision-resistors/msg1170432/#msg1170432)
https://www.eevblog.com/forum/metrology/t-c-measurements-on-precision-resistors/msg1170456/#msg1170456 (https://www.eevblog.com/forum/metrology/t-c-measurements-on-precision-resistors/msg1170456/#msg1170456)
https://www.eevblog.com/forum/metrology/t-c-measurements-on-precision-resistors/msg1170462/#msg1170462 (https://www.eevblog.com/forum/metrology/t-c-measurements-on-precision-resistors/msg1170462/#msg1170462)
"In other words: Change temp, and don't change temp again until your resistance measure line gets flat again. It can take a while." )
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Somebody else might say: Ah, the maximum nonlinearity of the 3458A in the diagram seems to be about 0,11 ppm. Add 50 % (since that value entered the average used as reference) gives 0,165 ppm.
I do love my 3458s. I didn't quote understand where you get 50% from and why we need to add it? Care to elaborate a bit more?
Completed run on 5720-2 with exactly same setup/meters/settings.
RAW plot as is from instruments. Interesting to note absence of 0V shift we seen before from 5720-1. Otherwise dataplot looks very similar and difference between each DMM is same.
(https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_h2_11rng_resl8_nplc20_soak3_1.png) (https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_h2_11rng_resl8_nplc20_soak3.png)
Same plot against 5720-1 for reference, captured earlier with same settings/app:
(https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_h1_11rng_resl8_nplc20_soak3_1.png) (https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_h1_11rng_resl8_nplc20_soak3.png)
Also here is RAW data from second 5720A (https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_hulk2_11rng_resl8_nplc20_soak3.dsv).
Obviously source INL error is removed when I've used 3458A as a "reference INL" value. Here is it seen as flat bright cyan line. So next plot shows deviation of each individual meter against average of three 3458A:
Yes, far from ideal method to test INL, but I don't have better idea how to get source with better than 0.1ppm INL, other than JVS system.
(https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_hulk2_11rng_resl8_nplc20_soak3_1.png) (https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_hulk2_11rng_resl8_nplc20_soak3.png)
Same data for 5720-1 source (same plot posted earlier):
(https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_11rng_resl8_nplc20_soak3_1.png) (https://xdevs.com/doc/Advantest/R6581T/cal/dcl_10vdc_rndz_3458abc_advr6581t_dtr_11rng_resl8_nplc20_soak3.png)
P.S. Uncertainty is the reason why all these graphs called "system linearity" and not the "DMM linearity". There is no way to figure out what is individual INL error of either particular DMM or source, without making whole range of assumptions like "we guess that INL of three 3458A's is still inside 0.1ppm spec" or "<0.5C temperature deviations in lab don't impact data much". So at best we have approximated maximum error of the whole tandem.
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The factor 1.5 is needed as the 3458 under test is also used in the reference. So for one of the 3458 the difference is meter A - (meter A + meter B + meter C) / 3 = 2/3 A - 1/3(B+C). So one could argue if the right factor is 1.5 or maybe 1/sqrt( (2/3)²+(1/3)²).
The other problem in judging the 3458 from just comparing similar meters is that the INL error can also be correlated. The comparison of same type meters can hide some systematic errors. If done with 2 of the 6581, the just near zero may appear much smaller, because it seem to be a common feature.
It looks like the average of the three 3458 is about the best one can do as a reference. One could still combine the runs with both sources. This would reduce the noise and some drift effects.
The calibrators both seem to show some periodic linearity error. In addition there seem to be some offset causing the jump around zero.
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In the end you can't define a linear reference by democracy, whether you take the votes of all or only the elite or what you think is the elite. Just imagine someone had three Advantest DVMs and used them to test a 3458a. So that approach isn't very reliable.
As far as i understand a stable divider combined with some mathematics can give you a valid answer, independent of what other equipment you have around. For example:
https://www.eevblog.com/forum/testgear/dmm-linearity/?action=dlattach;attach=157863 (https://www.eevblog.com/forum/testgear/dmm-linearity/?action=dlattach;attach=157863)
Regards, Dieter
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Those concepts with a divider or chain of reference source can give a few tests of self consistency. Usually the number of points to test is limited to a relatively small number. The more steps are in involved to larger the certainties from noise, thermal EMF, EMI and input currents. So it may need relatively low value resistors or extra buffers. Sufficiently stable dividers is not an easy task.
The two methods are kind of complementary. A few points from stacking voltages and the comparison with other instruments in between. The 3458 meters are known to be usually good for better than 0.1 ppm, so they are Ok have a look at errors in the 0.2 ppm range for the 6581T. To get more confidence in the comparison one can use a kind of dithering, adding some offsets (e.g. 1 V range) between the meters.
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It's not just a democracy, but also relying on the design of the reference instrument. Excellent 3458A's linearity over +/-12V is proven by industry and independent researchers many times. So at least that gives us confidence that design itself is up to task, only open question is actual performance of particular 3458A used in setup. So adding more 3458A works as statistical array. Other methods also rely on same approach - linearity by design + total error budget factors, even with resistive passive devices like 720A. And bad ADC (those drifty ones) in faulty DMM easily show horrible INL errors because multislope ADC also rely on stability of the ratios for each phase.
So anything below 0.1 ppm should be taken with healthy sceptical amount, as data points approach noise floor and practical issues of either instrument. So 0.1-0.2ppm results are about best possible practical limits without big dollar budgets. I have few data sets captured on various DMMs against quantum voltage source from -10V to +10V. That can at least help to verify the analysis approach and visualization for this and similar cases.
3458A, NPLC20, opposition to JVS output, 10V range:
(https://xdevs.com/doc/_Metrology/BCJVS/dcl_11v_cjvs_HP3458_2823A14857_1.png) (https://xdevs.com/doc/_Metrology/BCJVS/dcl_11v_cjvs_HP3458_2823A14857.png)
8508A, RESL8 (NPLC1024), opposition to JVS output, 19V range:
(https://xdevs.com/doc/_Metrology/BCJVS/dcl_11v_cjvs_Fluke 8508A_926153578_poly_1.png) (https://xdevs.com/doc/_Metrology/BCJVS/dcl_11v_cjvs_Fluke 8508A_926153578_poly.png)
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Great data, Tin!!
Is it possible to make both graphs looking more equal? Seems that both meters are looking quite good on a JVS. It is a pitty, that you didn't had a 8588A in your bag ;)
btw: -10V to 10V is nice and the 3458A is most of the time much better in that range against other meters, but looking at 0 to 10V cancel out problems with different gains for positive/negative (like in your 1281 plots). It depends on the application, but I think in most of the comparisions (like LTZ1000 against a 10V source for example) the polarity swap isn't that important. And the INL looks much better than it seems over the whole range (-10 to +10V)
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The interesting part will be, if INL of R6581 will change shape with a different integrator capacitor. I again had a look inside the R6581 and even though the caps are potted from the top, they are Soshin branded.
I also had a look into AoE3 page 301 and x-chaters page 42/43 with a few diagrams concerning caps and their DA and Kleinstein is absolutely right on this. The diagrams show superior behavior for teflon, followed by a C0G ceramic cap that is named "brand Y", followed by polystyrene, followed by polypropylene.
So chances are, that INL picture will be somewhat different once the hermetically sealed PTFE caps are installed, if this is due to properties of the cap itself.
-branadic-
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Checked capacity and tan delta on that 20nF, 50V, 2% Soshin integrator cap. At least the PS caps I had at hand were worse with respect to tan delta.
-branadic-
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The measured tan delta reaches about 50 ppm level. That is a really good value. However I am afraid in the relevant frequency range (e.g. some 5-100 Hz) the measurement system may be the limiting factor. The normal expectation is that tan delta will go up again towards very low frequencies - at least the DA values usually go up.
Different PP caps may be slightly different and the caps used are likely chosen for good performance.
There is no direct fixed factor between the tan delta and DA values. It depends on how the time constants are distributed and also the time range used for the DA. Tan delta and DA over one decade should be roughly comparable (a factor of up to 2 likely less). For the PP caps I get some 200 ppm for a decade in time. So likely higher loss than the Soshin cap. For my best C0G the loss is at 30 ppm per decade - so quite likely less (maybe a factor of 2).
The graph for DA from Bob Pease also shows quite some difference for both PS and PP caps. I saw a factor of up to 8 difference between different C0G caps.
Edit: I just rechecked the simulation numbers: the DA number (for 1 decade) is usually smaller by a factor 2 - 5 than the tan delta.
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Here is a first result with that 20nF PP cap replaced by two 10nF PS caps. Can't see any difference between both measurements.
I do have some 1.5nF and 10nF PTFE caps on their way, but should receive some TDK C3216C0G2W103J160AA, C3216C0G2J103J160AA but also C3216C0G2J152J115AA today. Unfortunately I missed ordering some 33nF caps, such as C3225C0G2E333J230AA, C3225C0G2W333J250AA or C3225C0G2J333J250AA, but nothing that can't be changed.
So I will replace each capacitor within the integrator one by one and perform an INL measurement after each single replacement, so that we can see if anything changes at all. Hopefully we can at some point see a difference in INL behavior.
-branadic-
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Looking at the datasheet of OP177 page 9, figure24 I wonder if I am looking at the wrong place for the INL error and the opamp is the culprit. The shown gain linearity for "a typical precision operational amplifier" looks somewhat familiar to me and my INL error. Maybe I should replace the AD707K in my unit by a OP177?
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=671874;image (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=671874;image)
-branadic-
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The loss measurement is at higher frequencies than actually relevant in the ADC. So it is still not sure the PS caps are really much different in the DA than the original PP cap. One could try a test with an intentional worse capacitor (e.g. 10 nF PS + 10 nF MKS or 1 nF mica / polyester in parallel to the 20 nF low loss).
The OP177 OPs (in the integrator, current sources, reference scaling) see a relatively constant signal. So the gain linearity curve is not relevant. The OP in the integrator still sees some transients, but these should be all relatively similar with mainly the number changing a little.
The other INL mechanism I would consider is the frequency of the zero crossings during run-up. The zero crossings could cause an interference, as the slope amplifier signal is send right across the sensitive area. That layout choice is really odd. Near zero the integrator output signal changes: With positive input the integrator goes to just to zero and than up again. With negative voltages there are less zero crossings, but also cases of hitting the upper limit.
This change is also part of the reason the DA can cause the jump near zero.
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I received some 10nF NP0/C0G TDK ceramic caps today and from the tan delta perspective they look at least a factor of two better. Will give them a try tonight.
@ Kleinstein
I have the AD707s installed, not the OP177. For some reason I believe, that AD707 in either the integrator or the voltage to current converter, could be the culprit and that the figure shown in OP177 datasheet could be the behavior of AD707 and that OP177 is an improved version. It's just a gut feeling. So if tonight nothing changes on the INL figure, I will replace that opamps, to see if it makes any difference.
-branadic-
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If you want to try other parts: I find the switch U214/4 pins 14 and 15 somewhat suspicious. A mosfet switch of 50 Ohms will cause an error voltage of up to 1.35 mA * 50 ohms = 70 mV, which is enormous. As far as i understand it will be closed all the time except during "fast mode", so it could be a relay instead.
I noticed the "zero discontinuity" in your case is about 0.5 ppm, while Tin reported about 0.17 ppm. Is that correct?
Regards, Dieter
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The switch U214/4 is in series to the 20 nF cap. A resistor there would requite some extra jump at the OPs output and thus add a little to the transients on the integrator input. However there is the OP internal open loop output resistance anyway so the increase would be more like less than twice the normal transient. With current sources the transients should not matter that much unless they reach some 50 mV so that the OP177 input current changes. I still had a spice simulation of the integrator around - adding the resistance increases the transient spike by some 5 mV, so not really much.
The INL seem to be different between units, some are better than others. TiN's unit seem to be one of the better ones, though not all the way as good as the original specs / curves shown.
@branadic: I would expect the not so good OP curve to be from something like the LM308 or OP07, as at that time standard precision OPs. Chances are the OP177 is still a PMI design, before it came to Analog. Even than the AD707s don't see much of a variable input voltage or have a large output swing.
The AD707 and OP177 look like pretty similar, with maybe more detailed specs (e.g. current noise) for the AD707. AFAIR there were already test with exchanged OPs at the integrator.
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No, as far as i understand in slow mode there is a good 20 nF capacitor and parallel there will be a series circuit of 1.5 nF with 50 Ohms, which is basically the equivalent circuit of a bad DA capacitor. And in addition that 50 Ohms is no real resistor but something nonlinear.
Regards, Dieter
PS: Those three switches near the integrator output are trying to separate the 70 mV error voltage from the integrator output. But to do it correctly one needs four switches.
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50 Ohms and 20nF would be a time constant of only 1 µs. So this would be a very fast effect. It may effect the last rundown step a little, with the 1.5 nF being a little ahead. This would result in some very fine scale DNL error (possibly to small to see in 10 PLC mode - maybe visible at 200 µs integration time), not long range INL.
The tricky DA effects are those with a time constant of more than some 500µs (longer than the rundown phase) or so, probably dominated with those of > 200 ms.
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And we are searching for 0.5 ppm so that are about 14 to 15 time constants. By the way: My considerations were meant for Branadic and i don't see any reason to explain this any further. He wrote he was willing to search the reason doing some real work.
Regards, Dieter
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Did a run with C0G caps and nothing has changed, so I come to the conclusion, it's not the cap and it's not due to DA. If this were the case, I should have observed at least a fration of a change in the shape of the curve, but I don't.
The slight tilt of the curves around zero is due to slightely different ambient temperatures, as already shown in a previous post.
-branadic-
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Leakage across the capacitor (e.g. on the board) can have an effect that looks like DA of the capacitor: also an error proportional to the average voltage in the capacitor (= leakage path).
The observed jump near zero is about 5 µV = 0.5 ppm. This would be an average current to the integrator of 250 pA. Near zero the voltage changes by some 1.25 V so that a leakage resistance of some 5 Gohms could explain the jump. This sounds like a lot of leakage for a board with guard traces, though a relatively spread out integrator input.
I don't think leakage from the output of the slope amplifier could be an issue, as this output should be negative most of the time. In theory there might be capacitive coupling from here - but there is still some distance to the sensitive parts like Q200, Q201. It should take quite some strength to interfere with the digital signal at U301 - though the signal gets quite close there. Another possible indirect coupling could be towards U204 to generate the substrate voltage. Anyway capacitive coupling should not vary much between units - so this alone should not be the issue. It would need another variable (e.g. output impedance of U204).
To check if leakage (e.g. at U213/1) or bias current (variations in input current to the AD707 from signal spikes) to the auto zero cap could be an issue, one could for a test increase the value of C208 (e.g. +22 nF). This would reduce a leakage effect there, and should not yet interfere to much with the zero phase.
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@ dieter
If I get your message right, you suggest replacing U214, the switch. Currently there is a DG442DY installed, with the following feature:
• Low On-Resistance: 50 Ω
• Low Leakage: 80 pA
• Low Power Consumption: 0.2 mW
• Fast Switching Action-tON: 150 ns
• Low Charge Injection-Q: - 1 pC
Replacing it with DG442LE with
• On-resistance RDS(on): 16 Ω
• Fast switching tON: 18 ns,typ.
• Low parasitic capacitance:
CD(ON): 15 pF
CS(OFF): 5 pF
• Less than 8 pC charge injection over the full signal swing range
• Low leakage: < 10 pA, typ.
won't work, as the switch is most likely powered by ±15V, have to check on that.
DG442DY+ won't improve things either.
DG444B looks like it has a little lower on resistor on the table, but diagram then shows a different picture, not sure which one to trust.
DG412 might be an option, but have to compare both datasheets a bit more:
• 35Ω (max) RON with ±15V Supplies
• ±4.5V to ±20V Dual Supplies
• 5 pC
-branadic-
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A little lower on resistance for U214 might help, though I am not 100% convinced. Charge injection should not be important as it is switched only when changing the PLC setting and this will cause more upset anyway. Leakage should also not be so critical - at least not for the slow mode. It can be a problem for the fast mode (< 200 µs).
However a much lower R_on could upset the zero phase: the resistance of U214/1 at the zero storing capacitor is part of the compensation. So there could be a problem with an DG412 or max312L because of too little resistance.
If at all the resistance of U214/4 would be the one that is a problem. For the 20 nF cap it would act a little like additional (open loop) output resistance for the OP 206 ( = LT1056). I don't see a problem there. There is no need for settling to the ppm level there, it is about a charge error of some 100 pC, so something like 5 mV for the 20 nF cap or maybe 0.1 %. This would also be mainly an effect on the rundown part.
A test one could repeat (was done earlier in this thread by a chinese user, but with not so good instruments) could be checking the difference between the 1PLC and 100 PLC modes. So compare the average of some 100 readings at 1 PLC with 100 PLC at a few voltages. The 1 PLC mode would be about 10 time more sensitive to errors effecting the rundown.
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To check if leakage (e.g. at U213/1) or bias current (variations in input current to the AD707 from signal spikes) to the auto zero cap could be an issue, one could for a test increase the value of C208 (e.g. +22 nF). This would reduce a leakage effect there, and should not yet interfere to much with the zero phase.
You mean decrease C208 to 22nF, as it is already 33nF Polyester type or parallel it with additional 22nF?
I already had C208 in mind and though, replacing it by some different material cap might change something.
-branadic-
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Before even thinking about a permanent mod i would try and check whether the mistake they made could cause the observed effect. For example: Put a short over pins 14 and 15 of U214 to make the 21.5 nF lossy capacitor into a good one. You can't destroy anything except by soldering to hot. And then check in "slow mode" to see what happens. This would be a change that is easy to undo.
The big difference between your and TiNs instrument may indicate that the effect you are looking for is much bigger than 0.5 ppm, with an "on average" correction in software. So i would not be surprised if you get some really bad nonlinearity diagram with that test. But then you would know you are on the right track.
Regards, Dieter
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To check if leakage (e.g. at U213/1) or bias current (variations in input current to the AD707 from signal spikes) to the auto zero cap could be an issue, one could for a test increase the value of C208 (e.g. +22 nF). This would reduce a leakage effect there, and should not yet interfere to much with the zero phase.
You mean decrease C208 to 22nF, as it is already 33nF Polyester type or parallel it with additional 22nF?
I already had C208 in mind and though, replacing it by some different material cap might change something.
-branadic-
I suggest adding some more capacitance. The idea is to reduce the voltage cause by leakage currents without disturbing the zero phase too much - thus not too much extra capacitance, but just enough so that an effect would be well visible. The capacitor type should not be so critical, as the voltage should be pretty stable and low (equal to the offset voltage). The Zero phase likely starts with some offset from the comparator and than settles to the lower offset of U205. The R_on of U213 and U214 may effect the settling speed, but I would expect plenty of time (at least in 1 and 10 PLC mode) and no dependence on the input signal. The 10 Ohms from R222 are misleading with a switch resistance of some 1.5 K in series.
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For example: Put a short over pins 14 and 15 of U214 to make the 21.5 nF lossy capacitor into a good one.
Unfortunately this results in "230, Internal zero error" during startup self test, that I can't quit. So can't test it that way.
-branadic-
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You can use a hand switch to fool the self test during instrument boot.
Regards, Dieter
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Did something similar right after I wrote this post. Installed two teflon wires and a jumper, that I've set after the unit booted. INL measurement running.
Replacing C208 33nF MKT by some 30nF ceramic caps didn't change something though.
-branadic-
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How has nothing changed?
The slope has changed from -7V to -11V!
You have to try with another capacitor.
Good luck!
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The slope is due to slightly different ambient temperatures, as already stated and shown in previous charts. Remember, the current measurements are not performed under equal temperature conditions and the meter is no longer within a temperature chamber but at my home. It's about the shape of the curve only, that hasn't changed yet at all.
-branadic-
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Shorting pins 14 and 15 of U214 didn't change anything on the shape of the INL curve. Picture coming later, as I always have to perform two runs, while the instruments thermally stabilizes during the first run and shows large errors at the higher voltages as I run alternating INL measurement, which means +11V --> -11V --> +10.9V --> -10.9V ... So the pictures you see is always the second run.
So we can conclute, it's not due to bad virtual DA, right?
-branadic-
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What are your multimeter settings?
AZero?
Guard?
Protect?
PLC?
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Good question. As the instrument is currently running its programm I can answer at least only a few of those:
Azero: tested both, on and off, see attachement, unless otherwise noted Azero is turned on in all measurements
Guard: Float and connected with guard of Datron4000A in all former measurements
Protect: On in all former measurements
PLC: 20NPLC in all former measurements
-branadic-
Edit: added the missing information
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The change in capacitance for C208 is quite small from 33 nF to 30 nF. 10 % change is well within the tolerance of the caps. To have a visible effect a considerable larger or smaller cap (like 50 nF or 15 nF would be needed). Chances are good that the zero phase would be still OK with this as the R_on on U213/1 can also vary quite a bit (1.5 K typ , 3.5 K max).
A test with a different size cap should tell if current towards C208 is causing the error. Half the capacitance would double the error. It would not tell the direct reason, but it could narrow things down.
It would need quite some leakage: 1 ppm = 10 µV corresponds to some -5 mV at the integrator output after 200 ms. So it would need some 800 pA of leakage to cause such a voltage in C208.
Besides leakage through U213/1 (should be much lower leakage, especially with only some 0.5 V across the switch and not much change). At least the sign seems to fit: with negative input the output of the slope amplifier is positive less often.The fast transients might also cause some effect.
There may be another, slightly odd path: the other parts of U213 are connected to the input mux and there could be transients where the voltage could exceed the +-15 V supply of the switch and this way cause leakage through the substrate.
The protect setting may have an effect, as there can be transients from switching the main mux.
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Added the missing information in previous post.
Kleinstein, I simply wanted to see, if it makes any difference if I change the cap material, it's not the test that you intended. But first, let me check what happens if I set the Guard manually to low. I want to do it step by step only, so that I can see what causes what change.
-branadic-
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My INL sweeps were with protection on Advantest off. Didn't test with on.
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When looking at the linearity diagram it seems to exhibit four sections. So i would check the second most significant current source (-375 uA). That is the only one not using the resistor arrays but a separate resistor (R212). The most significant current source (1.5 mA) is based on R200 (common with integrator resistor) and the lower "digits" are all based on R213. So R212 is something like an outsider. Also it uses the 10 V reference instead of the 17 V.
Maybe tuning that resistor by a ppm will change the linearity diagram. One needs a 10 or 20 GOhm resistor though. One could also check the relationship of the 10V and the 17V reference.
Regards, Dieter
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The slow rundown part would cause a more local error. The rundown is only responsible for a rather small part of the result. With 10 PLC integration the first 3 digits (1000 counts) are from the run-up. So a run-down related linearity error would repeat some 1000 times over the range (includes some overrange to +-15V). The main part from the run-up switches only 1 current source for feedback. This does not depend on the balance between the +17 and -19 V reference levels. An error in the -10 V would also only effect the rundown part.
For the slow 10 PLC mode the fine slopes in the run-down are not very critical (e.g. some 1% would be good enough as about the first 6 digits come from the large current source, with a little from the +17 /-19V ratio). The small current sources are more important when is comes to short integration like 100 µs.
The INL curve (measured by brandic) has 3 distinct features: the change in slope / gain at about -4 V. The jump near zero and the parabola like curvature for the positive side. TiNs curve looks similar, though considerably smaller error.
It is still not absolute clear if the error is from the ADC itself, the input amplifier or maybe due to the current spikes when the main MUX switches for the AZ mode.
The test with difference caps pretty much excludes the DA in the integration cap as the reason, though at least the jump and curvature would be the expected shape.
The input current spike could be sensitive to the input impedance and thus see a difference between the protect on/off setting. With a low impedance source the settling should be still fast enough (330 pF*8.8 K = 2.9 µs).
A known contribution is the self heating and TC of the resistor at the integrator input. This gives an u³ contribution - this does not seem to be a major part here.
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Switching protection from on to off and guard from floating to low changed nothing at all.
-branadic-
Edit: Just for academic completeness guard floating, protection off added.
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Adding additional 20nF NP0/C0G to the 33nF MKT cap results in an "A/D chech5 error" with error code +224 during startup self test. However, after a while the meter proceeded its operation, so we can test how that turns out, though I'm not sure if we will run into an issue during that test.
I'm starting to wonder, how do we know it's a problem of the A/D converter and not the input stage? Maybe feeding a signal from the calibrator as close as possible into the converter directly could help to seperate the effects.
-branadic-
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To separate between an effect of the input and the ADC itself one could add some constant current to the ADC input. Something like 330 K from the center of R200 to the -19 V should shift ADC related errors by some 1 V, while input related effects should stay at the same voltage.
If more capacitance at C208 causes trouble there should be the option to use less (e.g. 15-22 nF instead of 33 nF).
If the still moderate increase in capacitance already causes an error message, this could indicate that the compensation for the zero phase is already close to the edge (e.g. a relatively high resistance for U213/1). However it could also be just a limited time during start up and thus no problem.
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Measurement is running, let's see how that turns out. If there is still no difference visible I go one step ahead and try feeding the calibrator signal into TP200, this way we can exclude the DC input amplifier, just to make sure we are not hunting the white rabbit at the wrong place.
-branadic-
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Adding 20nF in parallel to C208 changed nothing on the shape. Next step is, feeding the calibrator signal to TP200.
-branadic-
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Feeding the signal toTP200 would operate the ADC in non AZ mode and thus with some additional noise. It is better than through the input amplifier and than non AZ mode at least, but there are still a few sources for 1/f noise: U200, U202, U211 and some resistors.
The analog AZ phase together with the reset of the integrator mainly corrects the 1/f noise and drift of U205 and U207.
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The other possibility would be to probe the signal on TP200 with another meter. Unfortunately I have 7.5digit meter only, but could put that into auto range, as we are looking for differences between positive and negative part of the INL curve only.
On the other hand it is also possible to probe the difference between input and TP200.
-branadic-
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AFAIR probing the difference from input to TP200 was already done earlier in this thread. However this only checks the average, not for dynamic effects in the AZ mode. Not sure one can really see the INL problem in non AZ mode. The extra meter would also add capacitance to TP200, which could be a problem.
The same would be true for the 2 nd meter on TP200 in 1 V range - here the extra question is how good is the 1 V range on the 2nd meter.
I really don't think the input amplifier has a problem in the static case - there may be some hidden settling issues through. So the test looks very simple but would not give a definitive answer.
I think adding an extra current to the ADC input is more promising: it shifts the curve side ways for errors caused by the ADC and keeps the errors from the input part at the same place. I don't remember if this measurement was already done with sufficient resolution - AFAIR I did suggest it way back.
Another possible class of errors to check would be ground shifting of some kind: so are the different grounds the same when the input changes.
Edit:
Reading TP200 (with an 3458) in parallel was done before, with still a similar INL curve
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1487640/#msg1487640 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1487640/#msg1487640)
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Did the measurement just for sanity check. Measured INL with Azero off and probed input to TP200 with Prema 5017 SC. There is of course a slight jump visible at around 3.5V in both diagrams.
-branadic-
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The curve suggests that the amplifier is OK and the INL error also happens in the non AZ more - at least the jump near zero and as it looks like also the curvature for positive voltages.
The jump visible in both curve would be an effect of the amplifier, but this is very likely more like amplifier drift or popcorn noise, not a true nonlinearity of the amplifier.
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Had some time to read more in this thread, but did not find whether anybody tried to treat the voltage spikes at the integrator input. The HP 3456A uses a 470 pF capacitor to ground (C402). Something like that is missing in the schematic shown some posts above.
Regards, Dieter
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There are now three steps to perform:
1. Add some 470pF from Pin2 of U205 to ground. https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3024690/#msg3024690 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3024690/#msg3024690)
2. "A test one could repeat (was done earlier in this thread by a chinese user, but with not so good instruments) could be checking the difference between the 1PLC and 100 PLC modes." https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3019844/#msg3019844 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3019844/#msg3019844)
3. "adding the 5K from U206 PIN6 to PIN4 , it is likely no more change observed" https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1586638/#msg1586638 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1586638/#msg1586638)
Will go through it the next days.
-branadic-
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Adding capacitance to the integrator input is a 2 sided thing. It can dampen the very fast spikes, but it can also cause more ringing type response. It can be better if there is some series resistance (e.g. 50 Ohms range) with the capacitor. The additional capacitance would definitely be a possible point to check. Before a full INL run one could check the response with the scope: so is there a change in the spike and maybe ringing. Ideally also with a few input voltages like 0, -10 V and + 10 V to see if there is some dependence on the input voltage.
With current source for the integrator input, the input voltage should be a little less critical than with just resistors to the input.
The SD215 seem to be a little faster turning on than turning off. This could also be a problem as it could give some cross conduction and thus additional spikes to the integrator input. Here the exact input offset of U205 could matter and one could consider adding an offset trim for this OP.
The switching sequence is essentially fixed and not that much change there, essentially only the timing changes. So while there can be some not so simple things going on, I see little dependence on the input signal.
A possible point for interference could be the substrate pin of the SD215 switches. There is a slight chance that there is capacitive coupling from the slope amplifier output to the TL072 that drives the substrate voltage.
For the slope amplifier output there is a variable number of pulses and thus a possible dependence on the input signal. So one could check if the substrate voltage is clean.
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Corrected some of the measurements to fit to the second INL run, which makes it even more obvious that up to now nothing has changed at all. Tested also a few other things, such as 470pF directly connected without additional resistor, as I didn't wanted to cut traces by now.
I also tried changing the integration time, with respect to the two papers "Precise Measurement of the Accuracy of 24 bit ADC by AC Josephson effect" and "Application of the AC Josephson-Effect for Precise Measurement" 50NPLC and 10 samples are mentioned: "... the offset error of the ADC is measured as a difference between the reading value of the ADC (average of 10 data obtained with each SO PLC (1 sec.) integrating time and same auto zero adjusting time) ...".
But that didn't change anything either. I have now installed a 5.6k resistor to U206 PIN6 to PIN4 and have the measurement running back on 20NPLC. Unfortunately it needs the full run, as during the first run the meter warms up, while the second run is used for analysis or at least, it needs the time for everything to thermally stabilize anyway.
What we can conclude by now is, the design is fairly stable, even with this INL issue. :-DD
But I'm not yet about to give up.
-branadic-
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I don't think changing the integration time should change much. The longer times us 10 PLC anyway and errors from the rundown would be shorter range.
The additional 470 pF at the integrator likely effects the settling of the input after reference switching. With no effect of the capacitor, chances are the settling is not really critical. This would be effects like the occurrence of relatively short pulses, so that the time is not sufficient for settling. This would also point away from effects on U206.
One possible point to try could be changing the substrate voltage for the switch FETs, especially a little more negative (e.g. another 10-20K in parallel to R214). As far as I can see from the data-sheet to the BSS83 (similar FET) a more negative substrate voltage would shift the threshold up, so that less cross conduction would happen.
Spikes on the substrate voltage could be an issue too.
A point worth checking may be the voltage at U203 Pins 6 (LT1056 in the +1024 current source). If this is more negative than some -4 V, there could be a problem with Q201.
An odd point is that I can't find local decoupling for U206 and U207. Normally this is a kind of no go for such a fast OP. The caps for there supply are quite a bit away.
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When i recommended looking at the most significant rundown current source (R212), Kleinstein answered that is not possible since errors in the rundown current sources make local effects. But those effects are repetitive and we may be looking at them through aliasing. I mean Branadic is using a precision calibrator, probably with a very regular test pattern (steps of 20 mV or so). Maybe he should repeat his measurement for an interval from 1.00 to 1.01 V with the same number of steps so that we can see the fine structure of the nonlinearity curve.
Maybe the instrument is perfectly linear on the large scale and the whole confusion stems from aliasing.
Regards, Dieter
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Adding a 5k6 resistor to U206 changed at least something, even though not much and in the wrong direction.
-branadic-
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And if you proceed from the opposite? Connect 5.6 kOhm not to -15 V, but to + 15V?
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With the extra resistor at the output of the integrator I see 3 possible effects:
The first is a nonlinear effect of U206, similar to what I have seen with the OPA172. The bandwidth / phase reserve can depend on the output current.
As 2nd point the output-cross over distortion of U206 would shift to a different point in the curve. Output cross over would usually change the ringing when the output current changes sign. A 3rd effect is that the extra load resistance would give more coupling to the supply, so one would expect more "ripple" on the supply and maybe ground.
For the 3 rd effect one could try some local decoupling for U206/U207, so that AC currents between those two OPs would not flow so much via the global decoupling and through ground. This may need also high capacitance like 100 µF, not just a few 100 nF.
For the first point having the resistor to +15 V instead could in deed help. One could also consider a different OP for U206 (e.g. OPA604, OPA134, TLE2071, OPA140). There where some earlier tests with different OPs, but with not so much visible effect (could be due to not so good tests).
Another relatively simple try could be increasing R220 and thus less current towards the slope amplifier. Even some 5 K would not add that much noise (mainly for short conversions) and should not add too much delay.
@Dietert:
Aliasing between the test points and periodic errors is possible in theory, but unlikely to cause the odd shape. A similar form for the INL error were also found by others.
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One possible point to try could be changing the substrate voltage for the switch FETs, especially a little more negative (e.g. another 10-20K in parallel to R214). As far as I can see from the data-sheet to the BSS83 (similar FET) a more negative substrate voltage would shift the threshold up, so that less cross conduction would happen.
Spikes on the substrate voltage could be an issue too.
On my check list.
A point worth checking may be the voltage at U203 Pins 6 (LT1056 in the +1024 current source). If this is more negative than some -4 V, there could be a problem with Q201.
Measures -2.248V here.
An odd point is that I can't find local decoupling for U206 and U207. Normally this is a kind of no go for such a fast OP. The caps for there supply are quite a bit away.
Need to check this thread, if decouling was added before and if that improved something.
Maybe he should repeat his measurement for an interval from 1.00 to 1.01 V with the same number of steps so that we can see the fine structure of the nonlinearity curve.
Maybe the instrument is perfectly linear on the large scale and the whole confusion stems from aliasing.
Measurements against 3458A was performed and showed none of that, see here:
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3007818/#msg3007818 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3007818/#msg3007818)
And if you proceed from the opposite? Connect 5.6 kOhm not to -15 V, but to + 15V?
Already in progress.
-branadic-
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The -2.2 V for Q201 is perfectly OK , so 4.2 V gate to source and not yet fully turned on and still some control.
For the added decoupling reports were confusing: initially no effect seen, but later some change, but still unclear.
The point is also how much and how ( +15 V to -15 V or +-15 V to ground). It can be both the very fast part that leads to ringing / spikes at the integrator input and it can be the slow part (e.g. 1-10 kHz range) from high drive current and current between U206+U207, leading to ground current.
The added current to the -15 V would be enough to avoid the output cross for U206 over all together. So not worry about this - this was also the original intention behind 5.6 K to the negative side.
The maximum current is still not so high: maybe some 4 mA towards U207 (6 V / 1.5 K, 1.5 K from R219+R220+switches) + up to 1.3 mA from the input. So a total current of maybe 10 mA max. After some more thought my suspicion goes towards trouble with ripple on the +-15 v supply. The 10 µF decoupling caps correspond to some 3 Ohms. The resistance of the inductors may not be much lower. So a current of some 3 mA could cause ripple in the 10 mV range for the supply. At 1 kHz the PSRR for the AD707 is only supposed to be on the order of 60 dB so thus could cause a modulation of the reference voltage in the 10 µV range. So it may just need more capacitance for the decoupling. Much of the current is between U206/U207 and and thus flowing from +15 V to the -15 V supply. So just 1 capacitor from -15 to +15 V could help.
Ground current from the supply decoupling could also cause trouble, though it takes a few mOhms in the shared ground path.
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Let's wait for the current results. I will then add 100nF/50V X7R capacitors across U206 and U207, maybe U205 too, but one after the other.
-branadic-
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Having the 5k6 from output (pin 6) to +15V (pin7) changed things pretty obviously. We now found something, that influences the shape and can be optimized further.
-branadic-
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The quite different result with the 5.6 K to +15 V does not support the supply ripple idea, as it does not make much difference wether the current comes from the OP or through the resistor right at the OP. It more points towards a nonlinear behavior of the OP (LT1056), in the sense that the current effects the GBW / Phase reserve. This can than effect the settling at the integrator input.
A current dependent performance is not such a surprise for the LT1056 as the output stage is quite asymmetric
In this context it is however odd we did not see a change with the 470 pF - there could be a change, but one would not note a constant effect.
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The million dollar question is, what to replace it with for a test? I found OPA604 and OPA132, but no internal construction shown.
-branadic-
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Build a test setup, and check the linearity. :-+
(http://www.img.radiokot.ru/files/98285/thumbnail/26kgfrllne.png) (http://www.img.radiokot.ru/files/98285/26kgfrllne.png)
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For the OPs, one would likely have a socket for the OP. So the replacement decision is not final.
For the OPs there is a report on OP linearity (Samuel Groner 2009) that include the OPA2604 and OPA2132, to the dual versions of the 2 OPs. The OPA604 is fast, but seem to be not very linear with load. The phase/gain VS frequency curve from the DS looks a little suspicious in the 1-10 MHz range. So not sure about the actual response.
The OPA132 (seems to be the better version of the OPA134) is slower (still a little faster than the LT1056) but more linear, though still not very good.
So no clear favorite here.
The effect in question here: the change in GBW with output current is usually not tested, kind of a hidden spot with rarely a hint.
The LT1056 data-sheet shows slightly different settling times to positive and negative steps. Still not sure if this applies as this seems to be with low load.
An external test setup is a good idea: This could be something like an inverting x -1 amplifier for a square wave and check the ringing with an external load to + and - supply. To get more ringing to compare maybe with an intentional capacitive load of some 100 pF.
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For the OPs there is a report on OP linearity (Samuel Groner 2009) that include the OPA2604 and OPA2132
Let's link it in here for completeness: www.nanovolt.ch/resources/ic_opamps/pdf/opamp_distortion.pdf (http://www.nanovolt.ch/resources/ic_opamps/pdf/opamp_distortion.pdf)
-branadic-
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@ Kleinstein
Would it make sense to use an OP177F (good linearity) together with a JFET input stage such as MMBF5103 (both at hand) as a replacement for LT1056?
-branadic-
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Isn't there typically some kind of bootstrap scheme in place for op-amps at the input stage, particularly in order to minimize its non-linearity? So the effective error isn't quite as bad as stated in the specification of the op-amp.
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One still needs a really fast amplifier for the integrator. One could use a JFET + fast BJT based OP (e.g. AD817). The 34410 and 3458 use this technique. If one accepts a small circuit instead of the LT1056 one could as well use an SMD OP, even with reduced supply, as the needed output range should be about -1 V to +7 V (maybe 10V). So even an AD8033 with a -6 V (zener in series) and +15 V supply would be an option (though tricky with the capacitive load from the switches.
The linearity for the OP177 is not really needed. The problem we seem to have here is that the output current of the LT1056 seems to change it's performance. This is different from the plot for the OP177, which is output voltage (with no load ?) under DC conditions. Any DC problem of the faster OP would be corrected by the precision OP anyway.
The AD707 / OP177 may actually be a weakness of the integrator for 2 reasons:
a) it is relatively slow and thus limits the speed the compound integrator can react. This is not so bad jet. it looks like the other OP in teh compound amplifier needs to be about 10-20 times faster to really make use of a faster precision OP. Otherwise the divider between the OPs is needed to effectively slow down the precision OP.
b) the BJT input stage gets slightly nonlinear beyond some 30-50 mV (depends on possible emitter degeneration) at the input.
There starts to be additional input current and the slew rate is nonlinear. I am not not sure how bad this really is.
The switching spike at the input can exceed the 50 mV level.
@guethert: the input stage uses bootstrappung and discrete JFETs. The point in question is the fast fet based OP in the integrator, not the input amplifier. Linearity is here also a question of loading the OP.
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I checked what I have at hand and found: OP27, LF356, LF357, OP177, OP1177, LT1006
-branadic-
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Maybe modern OPA140 is worth to give a try?
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One could try the LF356 as a replacement for the LT1056, but generally the LT1056 should be better. The output stage is pretty similar - so I would not expect an improvement. The LT1056 is more like an improved replacement for the LF356.
The OP27 might be an option with an JFET in front. However it is not much faster then the LT1056. The output stage also looks pretty asymmetric though possible a large class A range.
The OPA140 could be worth a try. At least it is available in DIP. Otherwise the cheaper OPA141 would also do for the fast part.
The OPA140 could also replace the AD707 with a slightly adjusted divider behind.
There is also a chance that just having local decoupling could improve the settling enough, that there is may be no more need for a different OP. Once the settling is good enough there should be little change if the GBW changes with current.
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There is also a chance that just having local decoupling could improve the settling enough, that there is may be no more need for a different OP. Once the settling is good enough there should be little change if the GBW changes with current.
That sounds reasonable with the smallest effort, let's do this measurement first, before removing the opamp to solder in a socket.
Added 100nF to U206 pin4 and7 (+/-15V), meter now warms up, so we have new results tomorrow. Afterwards we can still add another 100nF to U207 and maybe U205 after that. Step by step to see what changes. Anyhow, I agree that local decoupling is for some reason homoeopathic.
-branadic-
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The conclusion that the difference between the 5.6 towards +15 and -15 V tells us the problem is with the LT1056 reacts to a different output current is not 100% sure. There still is the possibility that the problem is supply ripple: there are 2 supplies and thus a combination of 2 effects that can be superimposed possibly compensating each other. The supply ripply would be at relatively low frequency (e.g. 2-5 kHz) so that the 10 µF caps present at the supplies are on the low side.
The OP that can be sensitive is U202. Here the local 100 nF caps don't help much at 5 kHz.
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today I had a look at the INL graphs and wonder why expect the DMM INL to dominate the result.
I am not sure if I overlooked anything, but if the voltage source is just not linear enough, you can not get good DMM results. At least that could explain, why all suggested improvement did not give better results.
Except from Illyas data against JVS it is most likely that you can not get close to "real INL" of the DMM.
When I checked my DMM INLs I used 4808 and at least this gave better than expected 0.1ppm with 3458A/8508A from 1-10VDC for the combined calibrator/DMM linearity.
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I am not sure if I overlooked anything, but if the voltage source is just not linear enough, you can not get good DMM results. At least that could explain, why all suggested improvement did not give better results.
If you had read carefully you would have seen, that I made this measurement with Datron 4000A, R6581 and 3458A in a thermal chamber and plotting INL of R6581 against voltage setting of Datron 4000A but also against 3458A readings showed the same result. Since other reported a similar shape of INL curve, we have pretty much confidence that this INL curve is not limited by the measurement capabilities, but a real effect on R6581.
Back to the topic:
I added 100nF to U206 +/-15V, but nothing changed. Now that I look at the latest measurement I noticed, that flattening the range from -5V to 0V by the 5k6 resistor on U206 /pin 6 to 7) came on the cost of the INL range +5 to +11V where it seems to be added.
-branadic-
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The calibration should not effect the INL curve. If at all ACAL could change the small slope factors a little. The information there is a little confusing. There is a measurement mode for the slow slopes, but the nominal slope rations are also close to integers. So the measurement could be just a self test to check if still in the valid range. The other possibility would be a numerical correction to the result, so essentially allowing a non integer slope ratio. Anyway this would be a more DNL type problem with some 1000 ups / downs and can not explain the curve.
The normal artifact calibration should only set the global scale factors for voltage and current/resistance. So no effect on linearity at all. I am not sure of there is a different factor for the positive and negative side. I kind of doubt it, but this could be possible. Some meters (e.g. 34401) seen to use some such corrections to improve the INL.
For the positive side error getting larger with the 5.6 K to the positive side the graph may be slightly misleading, as there is always still an uncertainty about a linear term. This would more the errors to other areas. This is a general tricky part with the INL curves: one does not know which range is correct. It still looks like the curvature is slightly increasing and also changing from a more smooth parabola to more like a break at +8V.
Currently my suspicion goes towards low frequency supply ripple effecting U202.
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branadic, the next more complicated circuit over a resistor is a constant current source made of a JFET and a resistor. It should be dimensioned such as to yield about 2 mA. Since the integrator input current is at most 1.5 mA in either direction, 2 mA will be enough to keep the integrator output loaded in one direction and to avoid unnecessary extra currents when the integrator goes negative. Maybe that helps with the curvature above 5 V input.
Regards, Dieter
PS: Concerning calibration: We have seen that TiN first proposed his three 3458A as a linearity reference and that he later backed up to saying that he had done comparisons to a Josephson array. In that sense his 3458As are secondary linearity standards, yet he did not apply a calibration when using them as reference. So the term reference is being used more like "reference amplifier" or "reference speaker". I also think that zero dent in the R6581 is real and typical for that instrument and it is nice to have some idea what may be the reason. After that it gets a lot more difficult.
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Besides the current going into the integrator there is also some load resistance. This are some 1.2 K + 220 Ohms + 2 x R_switch, so some 1.5 K. For the positive input voltages the integrator should go up to some positive 3 V with less amplitude at a high input voltage. The voltage should not go much below zero (just to trigger the comparator). For the negative input side I would expect up to some 6 V, as the average voltage reaches to about 3 V and with a triangle shaped waveform the peak should be about twice that, maybe a little more, as not all "periods" are the same.
It is still odd to see a relatively good performance for negative input - this side has a more variable voltage at the integrator.
I would consider the positive side run_up the better version, with a steady waveform with no obvious weak points up to the very end, when there may be quite short pulses.
For may ADC version I saw an effect of the current to the integrator on the scope: the output current seems to change the GBW/phase reserve for the OPA172 I used. At least the waveform tested at the equivalent point to the output of U205 changes. However I only saw an effect on the scope - essentially none for the INL. Not sure if one could see the effect at the output of U205 here, as the AD707 is relatively slow and the capacitor C207 complicates the waveform. The compensation I tried was with a current mirror, to essentially compensate the variable input current. This would be the next step up from a constant current.
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yesterday I had measured the Input of 6581 to TP200 via Keithley 155 at 30uV range and logged the output of K155 by 34401A, Signal source is from F5700. The voltage of input to TP200 is calculated by this equation: (reading of 34401 - Average of all reading) * 30/1.
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The difference from input to TP200 would be mainly the offset of the input amplifier in non AZ mode. For this, only some 0.5 µV_pp over quite some time is remarkably stable for a JFET amplifier. This kind of confirms that the INL error is likely due to the ADC itself, not the input amplifier.
Is the 2nd curve just a second run ?
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Checked all the power rails and ESR of the caps of the analog power supply. The caps read fine, though I found at least something weird. The -18V rail reads -19.38V. This rail uses a discrete voltage regulator based on A1015 PNP transistor plus a diode and is derived from the rail that also feeds 7924 regulator for -23V rail. So there is at least something wrong here. Need to find out what.
-branadic-
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Maybe Toshiba? Legendary low noise, excellent hfe linearity 2SA1015
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Well, I don't expect the transistor to be broken, as the zener used is marked 20, so -19.38V would make sense. I wonder if this is normal or if they were running out of 18V zeners?
-branadic-
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yes, the 2nd curve just a second run, each run takes about 2 hours and 20 minutes.
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The higher voltage is odd. However there may be different versions. Depending on the FETs used, -18 V may be on the low side to turn off the FETs in the input MUX, if there is a -13 V signal.
A problem with ripple can also happen if the caps have too low an ESR or just variations in the regulators. Usually the output impedance of the voltage regulator is pretty (actually not so nice) close to a low loss inductor. So add a capacitor of the right size and low ESR and one will see a peak in the power supply impedance. With some bad luck this may just be in the 1-10 kHz range.
It can be pretty hard to filter the ripple current from the integrator + slope amplifier (some 2 mA) at the low impedance supply. It may be simpler to filter at the sensitive part (U202) as there is already some 10 Ohms in the supply, but only 100 nF for filtering, which does not help much for 5 kHz. The critical supply should be the -15 V, as usually the negative side PSRR is worse.
The reference amplification around U209 and U211 already used a different supply, so no problem there. However the LTZ1000 uses the +15 V. At least the OPs have GND as negative supply - so should be less sensitive.
If one has a sensitive scope with good averaging mode (box car averaging type) one may be able to see if there is 5 kHz ripple (e.g. 1 PLC non AZ mode and trigger from the start of integration). At 5 kHz the PSRR of the AD707 /OP177 is pretty poor (some 45 dB), so ripple in the 0.5 mV range could already be a problem. The low PSRR for the negative supply seems to be normal for slow OPs, as the internal compensation is usually relative to the negative supply - so it is not a poor quality OP, but just a slow OP.
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TiN already confirmed, that the -18V rail measures about -19,4V on his unit too and the zener is marked 20 in his unit as well. So no issue here.
The slow opamp theory is somewhat doubtful, as TiNs unit is almost identical, though different date of fabrication with small differences, no extra local filtering, but better INL performance compared to my unit. So the question is, what is actually different, what has maybe aged and is now running out of limits or is it simply component variation and he is lucky to have "this" component, what ever it is, that results in overall better INL?
-branadic-
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There could be a difference in the voltage regulators and capacitors. The speed of the OP177 can also vary - at least the data-sheet allows for quite some range. A low PSRR in slow OPs is a general tendency and compensation towards the negative side explains this. So the PSRR value is not just a test limit with a large margin, but more like a typical value with not much variance.
The different performance between units is indeed puzzling. Bad luck with impedance peaking could be an issue.
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Some small correction, the unit I have and that is also with TiN, have AD707 installed. It was replaced by OP177F in later versions.
Next step is, even if they still read fine, replacing the caps on the analog power supply board as a maintenance service for longer reliability, since they are still original after all this years. Not sure if that changes something.
-branadic-
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Replaced the caps by good quality Rubycons and measured again, INL hasn't changed, though I haven't expected anything else. Time to swap some opamps.
-branadic-
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So here's a small update.
I have replaced all AD707 by OP177F and also changed all LT1056CN8, this slightly improved the overall INL, still it's not as linear as S7081 or K3458A.
-branadic-
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That is quite some change from just changing the OPs. The difference from AD707 to OP177 should not be very large.
The curve looks different, but only a small improvement.
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Thanks to pipelie I received a brand new VFD for my unit yesterday. Manufactured in 2017 :-+
In case someone needs one, please contact pipelie.
-branadic-
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Replaced the VFD last weekend. It's a pita, but pretty straight forward though. Remove the front panel (6 screws), release the front panel board (5 screws), cut all pins of the old worn out VFD, clean all vias, rescue the rubber from the back of the old VFD that is fixed with double sided adhesive tape, put it on the new VFD, assembly VFD to the front board, get all the flimsy pins in place, solder all the pins, give everything a good clean and install everything back in reverse direction.
It took quite some time and I forgot to make pictures during the process, but the result is nice. Everything is bright and even.
Also attached a picture of the back, beautiful structures (chrome) and an interesting construction. Maybe I will take some detailed pictures of the old one, showing the grid and plate wires.
-branadic-
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Hello. Excuse my random hijacking of this thread, but can anyone tell me what a typical "INTERNAL-TEMP" value would be? I am reading between 32 and 36 °C since I turned ON this 2005 variation R6581T. Seems to be off by quite a bit. I would say my apartment is well below 30 degrees.
Anyone know about the temperature monitor? Maybe I will attempt to calibrate it or at the very least, replace it. :-BROKE
Other than the odd temperature reading, the instrument seems to be working fine with a calibration sticker from 2005/08/01 to 2015/07/01. I inspected the unit and it is clean. The instrument measures a Caddock USF370-10.0M-0.01%-5ppm precision 1 MΩ resistor (4-wire) within specifications and measures voltage from a calibrated Keithley 2200-32-3 reasonably well too.
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The LM35 temperature sensor is located near the input muxю
During the last 3.5 years I was reading between 36 and 43°C.
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The LM35 temperature sensor is located near the input muxю
During the last 3.5 years I was reading between 36 and 43°C.
Thank you, Mickle, for this quick and informative response. I am surprised how hot the shielded enclosure gets, but I suppose the airflow is minor. Out of curiosity, what do you do with your temperature measurements?
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Out of curiosity, what do you do with your temperature measurements?
These temperature measurements simply accompany long-term drift measurements :)
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Master Reference Module Capacitors
I also change the R2 and R3 to metal foil type and add the C4 47UF for the power rail. It might be useful to the long-term stability.
I also tried the C5 with 22nf but found some oscillation occurred, so removed it.
Hi SZSZJDB,
I noticed that you have populated C4 and C5 on the Master Reference Module of the R6581. :-/O
So did HLDIY: http://bbs.38hot.net/forum.php?mod=viewthread&tid=28698&highlight=6581 (http://bbs.38hot.net/forum.php?mod=viewthread&tid=28698&highlight=6581)
Your capacitors are switched compared with HLDIY. Why is that? I am also curious about what capacitor models you tried. I may consider upgrading too.
Thanks.
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Another feature I want to understand is why the trace between C1 and the OpAmp has been severed on my R6581T. Someone else (EDIT: TiN) on this thread also has this manufacturing edit, so I know it was intentional.
(https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_refz_1.jpg) (https://doc.xdevs.com/doc/Advantest/R6581T/img/adv_refz.jpg)
Few more photos on article WIP. (https://xdevs.com/fix/r6581t/#ltzpcba).
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Most likely they mistakingly connected opamp ground (V-) to the zener signal ground instead of the power ground.
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+1 to TiN: it looks like a change to the OPs ground.
I don't think the capacitor models are very critical on the reference model. If at all leakage of C1 may be an issue. With only some 22 nF this could be a low leakage type like PP or PS or in moden times maybe COG MLCC.
Changing the capacitors at the LTZ1000 circuit can be tricky - it a slightly delicate loop with additional gain. C4 at the supply should be not as critical.
The reference noise in the 5 kHz range (modulation frequency for the ADC) could contribute quite a bit to the ADC noise - a point that they seem to have ignored in the design. So some additional filtering may make sense. However this should be more done after the normal ref. circuit. A first test could be for example at U209 (a cap at pins 2 and 6). If this gives a significant noise reduction (e.g. like 10%) one may consider more filtering to get some 1.7 times the effect.
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While examining Mickle's simplified diagram of the R6581, I came across the R201. Has anyone replaced this resistor network before? I understand that Kleinstein has mentioned it a few times. :-/O
Unlike most of the other resistors, these do not have printed values.
Anyone have details about these epoxy-dipped creatures?
[attach=1] R100
[attach=2] R201
[attach=3] R230 45k/45k/500
I am guessing that the resistance values of R201 are 15k/2k/2k/17k EDIT: 13k7/1k83/1k93/16k4. Can anyone confirm this? ;)
[attach=4][attach=5]
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R201 is a custom resistor network. If the gain stability is OK I see no reason to change or touch it.
So far in most cases it looked like it performed quite well - so no real need to change it. This network is not super critical for performance.
Mickles schematics has slightly lower values, but the ration seems to be close to 15/2/2/17. Only the ratio should be relevant.
R200 is the critical resistor network I would better leave it untouched, unless there is a real problem with it. It can effect the gain drift and linearity.
For custom resistor networks with different resistors there usually is not much info - maybe a cryptic part number and date code.
R230 is only for the auxiliary voltages for ACAL - so nothing really critical. It maybe a more standard divider - though still not common.
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Shematics R6581 v.5
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Shematics R6581 v.5
Great. Even though I had Mickle's zipped folder, I didn't know this existed. Thank you for pointing this out.
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Great. Even though I had Mickle's zipped folder, I didn't know this existed. Thank you for pointing this out.
Not the last one. There are also minor bugs. And far from everything has been tested and drawn.
Together with Mickle we are working on this. Thanks a lot to him ;)
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Since there are no translations from Japanese that I am aware of for the Advantest R6581, attached is my own drafted translation for the Calibration section (with the exception of the 'ADC Commands'). I plan on translating the rest of the manual in steps, based on my own needs. I hope this helps our community. Let me know if there are corrections to be made when you find them. The file is zipped (7Z) because this website does not accept DOCX for whatever reason.
Interestingly enough, I discovered that the instrument has three internal temperature probes for the DCV, OHM, and AC regions (see 13.6.1 SCPI Commands). It is a nice feature of the remote commands.
どうもありがとうございました ^-^
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I have a R6581 on the way to me with damaged front banana jacks and no display, I haven't read the full thread yet but a few questions regarding these meters.
Are the front and rear banana jacks interchangeable ?
Does anyone know what the model number of VFD is so I can research if it's still available, I'm guessing it will most likely be Noritake Itron VFD though I'm hoping the blank display is just power supply trouble.
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Someone here (https://www.ebay.com/itm/154251750602) has the original new display for sale but at a high price.
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I have a R6581 on the way to me with damaged front banana jacks and no display, I haven't read the full thread yet but a few questions regarding these meters.
Are the front and rear banana jacks interchangeable ?
Does anyone know what the model number of VFD is so I can research if it's still available, I'm guessing it will most likely be Noritake Itron VFD though I'm hoping the blank display is just power supply trouble.
Do not buy from the eBay seller; it is triple the price. Talk to Pipelie about a new screen. He charges a reasonable price and still has a few spares. I just received one from him and it is identical to the original.
[attach=1]
Talk to Branadic about the binding post adaptors. There are some posts about it on the EEVBlog if you search for them.
Good luck!
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Are the front and rear banana jacks interchangeable ?
Yes they are, but you can't score the original banana jacks anywhere. As some of mine were broken too, I replaced them with low thermal binding posts. Therefore an adapter was needed, that is the same for front and rear, read here for more and to find the CAD files:
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg2663463/#msg2663463 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg2663463/#msg2663463)
I also bought a display from pipelie, the replacement was an easy task.
-branadic-
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Talk to Pipelie about a new screen. He charges a reasonable price and still has a few spares. I just received one from him and it is identical to the original.
Attached are some photos of the replacement screen I installed tonight. Pretty decent if you ask me.
Replacement suggestions:
1] Heat a thin metal blade with a hot gun and carefully insert it between the VFD and the adhesive tape to loosen the bond.
2] Pour isopropyl alcohol into the crack with a Q-tip or cloth and wait until the adhesive dissolves.
3] Continue this process until the display is separated from the board. [attachimg=1]
4] Completely desolder the VFD leads. Check that each lead is desoldered before removing the display. You do not want to damage the board through-hole contacts.
5] Clean the board with isopropyl alcohol.
6] Use a sewing needle of the same size as the VFD through-holes to ensure that the new VFD leads are free to be inserted. If you find a hole that is too small, heat the needle while inserting it into the hole with a soldering iron. Never force the VFD pins into the holes or you will damage them and possibly the display.
7] Lay the VFD on the side with the pins and roll them slightly so that all the pins are evenly bent by the table's surface. Never over bend the pins or you could break them off. Check that each pin is evenly spaced and perpendicular to the VFD. To seat the pins, start on one side and wiggle them gently into place. This requires a lot of care and attention. Use tweezers to guide any stray pins.
8] Once the display pins have been seated properly, solder the pins on the sides so that the VFD cannot be removed again. Lift the VFD slightly to add an adhesive between the VFD and the cushion. I used an epoxy with a syringe.
9] Solder the remaining pins. Let the adhesive dry enough to continue working.
10] Check for shorting with a handheld DMM before reconnecting the display and turning on the instrument. I checked for shorting three times, just to be certain. You might also want to check to ensure all soldering has been done well too at this time.
11] Hold the HOME key and power ON the Advantest R6581. Select the DISPLAY option to check that the display has been properly installed.
12] If the display is working correctly, have a beer. Otherwise, diagnose the VFD problem. :popcorn:
[attachimg=2]
Thank you Ian J. for your video tips. https://youtu.be/wXQdo42C6pE?t=351 (https://youtu.be/wXQdo42C6pE?t=351) They came in handy, but I had to improvise because the R6581 is much more difficult to install.
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And just for completeness I received two 3D printed adapters with a ceramic filled resin today, so I changed the front adapter and also installed the rear binding posts. There is no drilling or other modification needed, just simply install the binding posts to the adapter and screw it down to the chassis.
-branadic-
Hi Branadic,
Would you please explain how to connect the binding posts to the mainboard? I intend to perform this modification also.
Is it reasonable to replace the original crimp connectors with quality copper spade connectors or is soldering involved?
Thanks.
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@ leighcorrigall
Congrats to your new display. As far as I can tell it is much brighter than the VFD on 3458A.
I removed the original tinned crimp contacts and used some copper hook lugs, that I got from a friend. But you could also solder the PTFE wires directly to the binding posts, no problem.
-branadic-
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Here is my experience installing the LowThermal binding posts and adaptor:
1] The soldering and insulation of the terminations were relatively simple along with mounting the adaptor to the aluminum panelling. Make sure to solder the wires according to your hand dominance to avoid accidentally melting something with the soldering iron. I used a temperature of about 850 °C so that the solder melted quickly and the posts would only be heated locally. The solder I used contained 40 % Pb, which made it much easier to melt and bond to the copper post.
[attach=1]
2] I was upset when I discovered that the LowThermals might not be compatible with every R6581 model. At this point, I already cut the wires from the original banana terminals. On further inspection, I realized that there was a misalignment with the front panel assembly. In my case, the plastic panel label covering was misaligned with the aluminum back panel. I first attempted to unscrew the analogue board case from the rest of the instrument in an attempt to align the parts. This did not improve the situation.
[attach=2]
3] I ended up dismounting the front panel and using a razor blade to remove access plastic causing the misalignment. To do this properly, you must remove a small portion of the material at a time or it will result in jagged edges instead of a smooth circular shape for the hole. Luckily, I noticed this quickly enough that I was able to correct the error before I ran out of material. Note that the disproportionate line thicknesses of the coloured circles around each through-hole will not be noticeable once the binding posts are installed. I suppose another strategy would be to delaminate the plastic from the aluminum, but you might end up misaligning something else and you risk creasing the plastic. I took a shortcut.
[attach=3]
4] Here is a picture of the backside of the front panel. There was enough wire that I was able to wind the exposed wire around each binding post at least once before soldering. Wrapping and soldering will provide a decent connection. Make sure to inspect the soldering of each job or you might end up with problems later on.
[attach=4]
5]
The binding posts were tested by measuring a 10 Ω Vishay resistor in 4-wire resistance mode. Just to be clear, the front panel colours on my Advantest R6581T were blue, green, yellow for the top and orange, white, red for the bottom row. My DMM is due for calibration, so I am not concerned about any modifications at this point. I have plenty of calibrated testing equipment as a substitute for this 8.5 digit DMM.
[attach=5]
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Incorrect scheme, from the manufacturer.
Expand the capacitor.
(http://img.radiokot.ru/files/98285/thumbnail/244lni4kc2.jpg) (http://img.radiokot.ru/files/98285/244lni4kc2.jpg)
Wrong.
(http://img.radiokot.ru/files/98285/thumbnail/244lng7f2k.jpg) (http://img.radiokot.ru/files/98285/244lng7f2k.jpg)
Circuit diagram.
(http://img.radiokot.ru/files/98285/thumbnail/244lnh4qd4.jpg) (http://img.radiokot.ru/files/98285/244lnh4qd4.jpg)
Right.
Is the C215 in the attached photo also incorrectly mounted? The silkscreen says that it is correctly oriented, but I suppose it might not follow the circuit exactly. The calibration dates shown on my Advantest are for 2005/08/01 to 2015/07/31, making me believe it to be a newer variation. The serial number is 56230037. Was the mistake made in later models? :-BROKE
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If in doubt, one could just measure the voltage at the cap. They may survive the wrong polarity for some time.
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If in doubt, one could just measure the voltage at the cap. They may survive the wrong polarity for some time.
The board has been removed to upgrade R200 and R234 among other changes. I stumbled upon this and I figured I might as well consider this as well since the board is already out.
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That is some mistake. I suppose I will reverse the capacitor as I am reading -5.5 DCV at the positive side. :palm:
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Have you altered the control of the K006 relay? This must be done.
But I do not see the need to replace the resistors.
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Have you altered the control of the K006 relay? This must be done.
But I do not see the need to replace the resistors.
Yes, I did. Thank you for asking! :-+
Now all I have to do is have this instrument calibrated. It is a shame that I do not have a calibrated precision 10 DCV source yet. One thing at a time.
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The calibration instructions for this instrument recommend < 12 AWG wire as a short, but this seems to be a bit excessive and may actually be less effective. I used a spent OFHC copper (C10100) Conflat-40 gasket from a turbomolecular vacuum system, a Keysight 11059A Kelvin Probe Set and tin-foil shielding for now. :-DD
These are the shorts that I have found available:
Fluke 884X-Short (70 CAD)
Keithley 8610 (110 CAD)
Keysight 34172B (290 CAD)
Does anyone have recommendations for a low-thermal 4-wire calibration short? Is there anything better than my silly substitute?
EDIT: I ended up purchasing a Keithley 8610 because it stated that it was a low-termal short in the datasheet and was listed on the Keithley 2002 (8.5-digit DMM) datasheet list of accessories.
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The short does not really need very thick copper. The one for the DMMs are usually just a PCB with 4 connectors.
There are plans for a makeshift 4 wire short by just bending a piece of some 1-1.5 mm² bare copper wire to make contact inside the 4 mm connectors. With the screw terminals one could also just use a thinner copper wire in a kind of U shape.
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Question to all R6581 owners, would you like to contribute translating the instruction manual? I already started with the index, but to be honest, there are a lot of pages. But if everyone contributes only a little piece, we would then be able to put things together faster and could have a full manual soon.
I do have the japanese OCR pdf-file transfered into an .odt file and translated, as good as google translate could do the job based on the signs and letters that were detected by the OCR program. Unfortunately sometimes the OCR program failed to detect the proper sign/letter. So there is still a lot of work to do, checking and verifying, putting pictures and tables into a proper state. Anyone interested to support that work?
-branadic-
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Question to all R6581 owners, would you like to contribute translating the instruction manual? I already started with the index, but to be honest, there are a lot of pages. But if everyone contributes only a little piece, we would then be able to put things together faster and could have a full manual soon.
I do have the japanese OCR pdf-file transfered into an .odt file and translated, as good as google translate could do the job based on the signs and letters that were detected by the OCR program. Unfortunately sometimes the OCR program failed to detect the proper sign/letter. So there is still a lot of work to do, checking and verifying, putting pictures and tables into a proper state. Anyone interested to support that work?
-branadic-
I second that motion. :clap:
I have already translated most of the calibration section apart from a communication example. It should be attached to this thread as a DOCX within a compressed file.
... attached is my own drafted translation for the Calibration section (with the exception of the 'ADC Commands')...
May I suggest that we provide credit to each translation contribution that is incorporated into the English version? Something as simple as the author's name in the header would be much appreciated.
Also, once we have enough contributors organized, we should assign a reviewer to read the entire document to check for consistency and errors. This could be more than one person. A revision number can be included too.
My other suggestion would be to translate the GPIB handbook as a lot of members would like to take advantage of this resource.
Regards.
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Since there is no ACV calibration video on the network, I decided to fix it.
https://youtu.be/uMjWAdwoWYI
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Advantest R6581 RMS board is like a work of art. I found and google-translated one patent that sheds light on the ACV self-calibration technique. But this is just a guess. Real equipment is much more complex and interesting. Therefore, reverse engineering of the RMS board is on my to-do list (if, of course, one day I have it).
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Here are the first few pages, chapter 13 and the index merged together.
I've added a page with the contributor.
-branadic-
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Here are the first few pages, chapter 13 and the index merged together.
I've added a page with the contributor.
-branadic-
I took a quick glance at the translation of Chapter 13 and found that it is different from the manual I downloaded from xDevs and KO44B. There is no Figure 1 in my version.
I also found the Teflon test lead mentioned in 13.1 should be "high-impedance" or "high insulation resistance", not "low-impedance". In addition, Figure 6 is about "ZERO FRONT", but the picture is obviously the back panel.
I tried to translate the Japanese in Figure 1 into English, and I attached it.
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I took a quick glance at the translation of Chapter 13 and found that it is different from the manual I downloaded from xDevs and KO44B. There is no Figure 1 in my version.
Correct. I added the illustration from the Advantest website so that the readers would know what the A01035 cable model number was referring to in the instructions.
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just in case anyone is looking for an original AC Option board
I still have one
https://www.eevblog.com/forum/buysellwanted/fs-advantest-r6581-parts-(location-germany)/msg3358518/#msg3358518 (https://www.eevblog.com/forum/buysellwanted/fs-advantest-r6581-parts-(location-germany)/msg3358518/#msg3358518)
just send me a PM
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just in case anyone is looking for an original AC Option board
I still have one
https://www.eevblog.com/forum/buysellwanted/fs-advantest-r6581-parts-(location-germany)/msg3358518/#msg3358518 (https://www.eevblog.com/forum/buysellwanted/fs-advantest-r6581-parts-(location-germany)/msg3358518/#msg3358518)
just send me a PM
Therefore, reverse engineering of the RMS board is on my to-do list (if, of course, one day I have it).
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To understand the complexity of reverse engineering - I will give photos of the RMS board.
(https://img.radiokot.ru/files/98285/thumbnail/2idm5qlyjr.jpg) (https://img.radiokot.ru/files/98285/2idm5qlyjr.jpg)
(https://img.radiokot.ru/files/98285/thumbnail/2icl0tfjvr.jpg) (https://img.radiokot.ru/files/98285/2icl0tfjvr.jpg)
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the AC board needs its own shielding case and connector cable to the main board (see att. pic)
(https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=1218049)
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Interestingly enough, I discovered that the instrument has three internal temperature probes for the DCV, OHM, and AC regions (see 13.6.1 SCPI Commands). It is a nice feature of the remote commands.
One temperature sensor.
The temperature read from the multimeter is the one that was at the time of the last given internal calibration.
Since DCV, ACV and Ohm are calibrated at different times, the temperature will be different.
In the end, you can call the calibration, say DCV, separately. And when reading the temperature of the internal calibration of the DCV, this temperature will be displayed.
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Hello,
Is anyone who owns an Advantest/ADCMT R6581(T) interested in an original used VFD? The pins are a bit ratty and need to be realigned, but as far as I know, the display works. I replaced the display recently because it was slightly dim and it has been collecting dust on a shelf for a few months ever since.
EDIT: My VFD installation guide is available in previous posts: https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3550243/#msg3550243 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3550243/#msg3550243) (display replacement is challenging to perform and you should test the display before installation)
The item is free with the exception of shipping. I accept PayPal if that works.
A picture of the display has been attached. There are also two photos that demonstrate the screen abilities compared to a Fluke 5440B in various lighting conditions.
Please PM me with a short proposal/inquiry and address. I will try and get back to you. EDIT: Item is no longer available.
Thanks.
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There is a minor problem with the binding post mod branadic proposed. The carrier designed for the Lowthermal 2758 binding posts requires using much longer M3 screws to mount than the original sockets. Those screws are connected to guard with their heads are close to the metal front panel connected to PE. Remaining isolation distance may be less then 1 mm. Better drill the 6 mm holes a little deeper and use shorter screws again.
Regards, Dieter
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There is a minor problem with the binding post mod branadic proposed. The carrier designed for the Lowthermal 2758 binding posts requires using much longer M3 screws to mount than the original sockets. Those screws are connected to guard with their heads are close to the metal front panel connected to PE. Remaining isolation distance may be less then 1 mm. Better drill the 6 mm holes a little deeper and use shorter screws again.
Regards, Dieter
Thank you for pointing this out, Dieter. I measure the screw head depth to be 0.94 ± 0.05 mm (n = 12). Would this gap be a problem when working at high voltage? When I have time, I think I will put some electrical tape or a thin insulative layer between the LowThermal binding post adapter and the front panel to prevent accidental contact to ease my mind.
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No real problem as long as there is no short. As far as i remember 1 mm of dry is air is good for about 10 KV but electrical safety rules are more stringent. With the original sockets and their short screws the distance is about 5 mm. Apropos using the meter with higher voltages: The front end of the R6581T has a relay for that which needs exercise every now and then, just like the front/rear relay. I mean if you want to use the meter at ppm or sub-ppm levels. No different from other high resolution meters.
Regards, Dieter
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> 1 mm of dry is air is good for about 10 KV
I remembered 2kV, but [1] says 3kV. I wouldn't cut it that close though and rather err on the safe side.
[1]https://hypertextbook.com/facts/2000/AliceHong.shtml (https://hypertextbook.com/facts/2000/AliceHong.shtml)
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Yes, about 3 KV/mm is a better number. Anyway, depending on how clean the air gap remains, electrical safety rules say 1 mm is good for 250 V (some dirt) to 400 V (clean). For 230 VAC 3 to 5 mm are recommended. These numbers no longer require rounded corners and are independent of air pressure (height).
Anyway binding posts are not completely safe, especially when used with copper lugs.
By the way the original sockets of the R6581A have a copper tube inside with a plug around it made from white metal and with the copper wiring crimped to the plugs. There is a large contact area between plug and tube, in order to reduce temperature difference and thus thermal EMF.
Regards, Dieter
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A calibration service provider has explained to me that the DMM ohmmeter range of 10M, 100M, and 1000M is not functioning properly (out of tolerance).
I find it strange that the instrument is completely calibrated with exception of those ohm ranges mentioned.
Can anyone please explain the OCOMP ON/OFF feature of the R6581T (bottom left corner of attached image from Mickle T)? I suspect that they may have not selected the proper settings before performing an external calibration or during the verification process. Can anyone speak to this? The manual does not describe it. If this is the problem, where can I find instructions on how to configure this setting from the front panel?
:-BROKE
Thank you! I am a bit under the gun because the company wants to send the instrument back soon without a complete calibration.
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Can anyone speak to this? The manual does not describe it.
This description appears to be on section 3, page 18, number 3. I will have to translate it. :scared:
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Can anyone speak to this? The manual does not describe it.
I will have to translate it. :scared:
Original text:
(3) 修オフセット電圧補正機能の設定
抵抗測定は、内部の基準測定電流を比測定抵抗に流して発生した電圧を測定しています。たとえば、リードの熱起電力などのようなオフセット電圧があると誤差になってしまいます。OHM-COMP機能によって、このようなオフセット電圧をキャンセルすることができます。OHM-COMP機能をオンにすると、通常通り測定電流を流して電圧を測定し、次に測定電流を流さないで電圧を測定します。両者の差をとることによってオフセット電圧をキャンセルでき、誤差のない抵抗測定ができます。オフセット電圧補正機能が、有効なのは10Ωレンジ〜1000kΩレンジです。10MΩ，100MΩ，1000MΩレンジでは、OHM-COMP機能がオンであっても、オフセツ卜電圧補正は行いません。
Google Translation:
(3) Offset voltage correction function setting
For resistance measurements, a voltage is generated by passing an internal current reference through the ratio resistor. For example, if there is an offset voltage such as the thermoelectromotive force of the lead, it will be an error. The OHM-COMP function can cancel such offset voltage. When the OHM-COMP function is turned on, the measured current is applied as usual to measure the voltage, and then the voltage is measured without the measured current. The offset voltage can be cancelled by taking the difference between the two, and resistance measurement without error can be performed. The offset voltage correction function is effective in the 10 Ω range to 1000 kΩ range. In the 10MΩ, 100MΩ, and 1000MΩ ranges, offset voltage correction is not performed even if the OHM-COMP function is on.
Question: How is this feature being listed in Mickel T's ACAL steps 13 and 14 if it doesn't correct for voltage?
Should I ask the laboratory to turn this feature on before running the calibration?
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I also quickly have translated section 3, page 19, number 5. I am guessing that the resistance measurement current may also be related. I really wish that the calibration steps made note of these settings before I sent the instrument in for calibration. :-\
Original text:
(5) 抵抗測定電流の選択
抵抗の測定電流は、HI-POWERまたはLOW-POWERに選択できます。それぞれの電流 値は、[表3-8]を参照して下さい。HI-POWERはLOW-POWERに比べて確度良く測定ができますが、比測定抵抗での消費電力が大きいため、測温抵抗体など自己発熱の影響を受けやすい素子の抵抗を測定する場合は、LOW-POWERが有効です。
Google Translation:
(5) Selecting the resistance measurement current
The measurement current of the resistor can be selected from HI-POWER or LOW-POWER. Refer to [table 3-8, page ] for each current value. HI-POWER can measure more accurately than LOW-POWER, but since it consumes a large amount of power in the ratio measurement resistor when measuring the resistance of a device that is easily affected by self-heating, such as a resistance temperature detector, LOW-POWER is enabled.
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For the highest Ohms ranges the may not be much choice in the test current. They just need the lowerst test current for the highest ohms.
The high ohms ranges may not work with a short integration time (e.g. < 10 PLC) if the Az mode is selected. One may even get better readings in the non AZ case with high Ohms (10 M or more). The non AZ modes adds a little offset error, but less "leakage" / no charge injection form AZ switching, that can look like leakage with a high resistance source, especially if the is additional cable capacitance.
The high Ohms measurements are relatively sensitive to leakage currents, e.g. from a dirty board. The ACAL procedure does not fully compensate for this (there can be slightely different leakage paths). So it is possibility that a meter may acurally fail on the high ohms range. One may habe to live with a larger tolerance for these ranges. I remember other reports on problems with high ohms.
A similar porblem with high ohms is also on the calibrator side - switching and the cables may add errors. So the calibrator / cal lab could in principle also be the problem. Chances are one would need manually connected precision resistors, not a calibrator like FLuke 57xx. The high ohms part may not be used very often.
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A similar porblem with high ohms is also on the calibrator side - switching and the cables may add errors. So the calibrator / cal lab could in principle also be the problem. Chances are one would need manually connected precision resistors, not a calibrator like FLuke 57xx. The high ohms part may not be used very often.
Hi Kleinstein,
Thank you for the quick response and comments! I'll try and ask them about the settings they used before they go at it again tomorrow. All I know so far is the attached report. According to the document, they are using precision resistors for the high-ohm ranges.
EDIT: OOT is an abbreviation for 'Out of Tolerance' from the second last page.
Regards.
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1) External calibration (as well as internal one) doesn't use any of the user-defined settings in the DMM.
2) The main problem with R6581T is a "T" symbol :) R6581T - is a technological multimeter. It used only for ADVANTEST T2000 IC/SoC/ASIC test system, but not in metrology laboratories. R6581T don't have any official specs or manuals.
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1) External calibration (as well as internal one) doesn't use any of the user-defined settings in the DMM.
2) The main problem with R6581T is a "T" symbol :) R6581T - is a technological multimeter. It used only for ADVANTEST T2000 IC/SoC/ASIC test system, but not in metrology laboratories. R6581T don't have any official specs or manuals.
Interesting, Mickle. Perhaps, the Advantest is working as it should.
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The high ohms may need 2 wire mode instead of 4 wire mode. At least this would reduce the chance for leakage a little. In the MOhms one does no longer care much about wire resistance.
Another setting that may effect the measurement is the capacitor at the input that can be connected. It comes with an odd name (protected or similar).
It may effect especially the 100 M and 1 G range, as the settling time could be long.
The ACAL and external CAL use fixed settings. However here it is about a performance verification. So the DMM is running a normal measurement.
For the resistance ranges the best results are likely with different settings depending on the ranges. Not sure if there is such an automatic settting is available. The 4/2 wire case also effects the cables needed.
The instructions should tell which mode to use best for the resistor range and for which settings the tolerances apply.
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In your preliminary report there are results "as found" and "as left". Does that mean they checked once more after adjustment? How is it possible that the 1000 MOhm was adjusted from 953 to 984 and not to 1000? Doesn't that mean the calibration setup was is unstable?
Currently we have a R6581A, and it behaves a bit strange although i applied the bug fixes mentioned above. I got the impression it remembers temperature over several days, similar to what i found in precision measurements of an Alpha Electronics foil resistor. Maybe humidity.
Regards, Dieter
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In your preliminary report there are results "as found" and "as left". Does that mean they checked once more after adjustment? How is it possible that the 1000 MOhm was adjusted from 953 to 984 and not to 1000? Doesn't that mean the calibration setup was is unstable?
...
Hi Dieter,
'As found' is likely how it came into the shop prior to calibration.
'As left' is what they did in their third attempt at calibration. They told me they tried the procedure 3 times and were unable to achieve high-ohm measurements within tolerance.
See second last page for descriptions.
Regards.
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Just connected two 1 GOhm resistors. In 2W mode and with 100 PLC the variation is 853,4 to 853,8 for one resistor and 884,7 to 885,1 for the other one. Spread/walk is independent of guard connection and this was using short unshielded cables. Addition of a 2 nF high voltage cap reduced short term noise but not the spread. Anyway the instrument should calibrate to 1 MOhm or better.
Spec seems to be +/- 5 MOhm, so our R6581T wouldn't have that problem. Also i think the remark of Mickle T. may be correct, yet i haven't seen a demonstration that a R6581 is any different/better for the DC part.
Regards, Dieter
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I have one of these meters. I have never calibrated it. I have a calibrated K2001, however.
As Mickle points out it is not a serious metrological instrument. There are some pages on EEVBLOG which show that INL is typically not stellar for the 6581T.
That said, I get a lot of good use out of it, bearing in mind its limitations. If I were you, I would not fret too much about the calibration failure in the high ohms ranges. What I typically do is acquire resistance (and voltage) standards in the ranges that are of interest and I re-measure the instrument whenever a "serious" measurement is to be taken. I have more than three good meters so this gives me some confidence that drift is low, the meter warmed up and so on.
I guess this is the "three clocks" solution.
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Mm, a cal report to cruch on. First question I would ask, what is accuracy column exactly mean? :) Voltage 10V point at 0.2ppm? 10kOhm at 0.5ppm? Those are not even 24 hour specs, so :-//?
R6581T I had was very dodgy on ohms at ranges 100kOhm and higher too, and running ACAL always gave different results. Then I have given away the meter to a less fortunate volt-nut, thus resolving the issue and marking R6581T as not worthy to have power of 8.5 digits,
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TiN, we can read what you did to that R6581T in the thread about your temperature chamber. I have been running the R6581T in a temperature chamber, too. I think the criterion is the RMS value of its internal temperature sensor. Inside the chamber it comes down to 0.01 °C (readings every 5 seconds). This is about the power supply of the R6581A floating section, in the box near its fan.
After some days at 23 °C it settled to be an 8 digit meter without ACALs. Residual noise came down to about 200 or 300 nV rms including noise of the 10 V reference (DUT). The linearity issue is one of the bugs to be fixed (read above). So it depends a bit on the user what it does.
Regards, Dieter
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Mm, a cal report to cruch on. First question I would ask, what is accuracy column exactly mean? :) Voltage 10V point at 0.2ppm? 10kOhm at 0.5ppm? Those are not even 24 hour specs, so :-//?
R6581T I had was very dodgy on ohms at ranges 100kOhm and higher too, and running ACAL always gave different results. Then I have given away the meter to a less fortunate volt-nut, thus resolving the issue and marking R6581T as not worthy to have power of 8.5 digits,
Yeah, it seems like a sketchy instrument...
Do you have an English version of the specifications/data sheet? I only have a Japanese copy.
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Looking at the 'as found' data, if the meter was in good ohms calibration at some prior point, the discrepancy now on all four ranges could be accounted for by a constant ~500pA worth of leakage or excess bias current. Since there appears to be 10V test voltage on all of the affected ranges, the cause could be anything in the circuit that would have a consistent leakage current at 10V. I thought about looking at the low current ranges to see evidence that a bias current might be involved, which does not appear to be the case, but I did notice that they listed the test results for the 100nA range in uA--I hope that's a typo, but it seems odd that their systems would make such a mistake.
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Oh, how sad. Look those poor R6581T owners! They probably should burn their devices into ashes, or at the very least hammer them to pieces with fury. Definitely they must all be destroyed! And the 'R6581T' name should never be spoken again into the temple of 8.5 digits DMM.
I'm going to tell you an anecdote.
It was around February/March 2018 when we (TiN and me) arranged a meeting at my home. TiN received back his 10K resistor (SL935) from USA calibration recently (maybe Dec 2017?). The R6581T was running for some hours before the meeting. He meticulously cleaned the banana jacks with Deoxit. (Yes, he brought a complete calibration kit to my home. Thank you Illya!). Because he didn't bring with him his own 4-wire cable, he carefully tested my 4 wire cable (after some testing, he considered that it was ok). He connected the SL935 10K to the R6581T, and a USB-GPIB cable to his 17" laptop. As you all know, he likes to have his own scripts with everything automated.
He run the 4W resistor test script. At first, the 10K measurement was way off. Something was wrong! He found that the value was increasing ... It was self-heating ! We indeed were using the 4W high-power mode and the resistor was getting hot.
We changed settings to 4W Resistor LOW power mode, and waited some minutes. Now, this time the SL935 10K measurement agreed to 1ppm. It was spot on.
His SL935 was just recently calibrated (less than 3 months), my R6581T last external calibration was on 2004 (14 years).
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He run the 4W resistor test script. At first, the 10K measurement was way off. Something was wrong! He found that the value was increasing ... It was self-heating ! We indeed were using the 4W high-power mode and the resistor was getting hot.
We changed settings to 4W Resistor LOW power mode, and waited some minutes. Now, this time the SL935 10K measurement agreed to 1ppm. It was spot on.
What are the applied currents/voltages in the high and low power modes?
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He run the 4W resistor test script. At first, the 10K measurement was way off. Something was wrong! He found that the value was increasing ... It was self-heating ! We indeed were using the 4W high-power mode and the resistor was getting hot.
We changed settings to 4W Resistor LOW power mode, and waited some minutes. Now, this time the SL935 10K measurement agreed to 1ppm. It was spot on.
What are the applied currents/voltages in the high and low power modes?
Hi bdunham7,
You can read the attached Section 3.7 that I mostly completed last night at 1:30 AM on my vacation :'(
I took a screenshot of the table on my MacBook too.
Regards.
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OK, so essentially 10V on HI and 1V on LO, except the 1G range is always 10V, with the currents calculated accordingly. So according to Fluke 742A specs, HI would be causing a very minor, acceptable error on the 10K range and then essentially no error on the ranges above that. I would presume calibration would be done in the HI range.
TiN's rather unusual resistance reference referred to above is a different animal than the 742A series.
So I think you may have a half a nanoampere going somewhere--good luck finding it! It might be instructive, if the cal lab is cooperative, to remeasure the highest 4 ranges in the LO mode. If it is leakage in a set ratio to the voltage, or highly dependent on the voltage, you would see the 1G range unchanged, the next two ranges would shift towards (or even beyond) the correct value and the 1M range might even read high.
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One sanity check is a DC voltage measurement with only a 1 GOhm and a little HV cap over the inputs. For our R6581A the result was well below 1 pA.
If Mickle T. is right in that no user setting is used during external calibration, then maybe the instrument is trying to do it in 10 PLC mode and one should use a HV cap parallel to improve results. Still it isn't guaranteed the capacitor will be charged properly at the right time. Or use a guard box.
Regards, Dieter
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Thank you.
If and when Texas HQ responds back to my rather lengthy email, I will include these details. They might get impatient with my requests, but this is what I am paying them for. :blah:
I believe I have a few precision resistors and capacitors that I can reliably use to diagnose the high-resistance ranges of the DMM when I get it back. :-/O
Hope is not all lost. At least it works in most conditions and I can use it as a 'transfer standard' for the usual ranges.
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Hope is not all lost. At least it works in most conditions and I can use it as a 'transfer standard' for the usual ranges.
Not to be dismal, but IMO you do need to understand where the problem is before you can really trust it in any range, including DCV and DCA. Calibration constants can hide minor flaws but you don't necessarily know how that might affect intermediate values as opposed to calibration points, nor do you know if the issue is stable. My guess is that the other ranges are OK, but if I were you I wouldn't relax until you at definitively isolate the issue to something in the resistance section.
This sort of struggle is hard enough at 5.5-6.5 digits and 500nA test currents.
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One weak point of the R6581 design is the switching at the input (e.g. in AZ mode) under some conditions there can be quite some charge injection / current pulse at the input. Especially for a short integration this may act like additional bias current / an input resistance lower than the normally expected value. It may very well still look OK at zero with the simple test with a high values resistor, but the input current at some 5 V or 10 V may be quite different.
Extra input leakage can happen at higher voltage (the switching JFETs see a higher voltage with a positive input).
A possible way to check the input current is to record the drift if the read votlage with a small (e.g. 1 nF) low DA capacitor at the input. Charge the cap to suitable starting points (e.g. +-10 V, maybe +-5 V and 0 V and than record the drift. The integration time (e.g. 1 PLC vs 10 PLC) and AZ setting can make a difference from charge injection. The input bias is drift rate times capacitance (including DMM internal capacitance). The input current is not necessay constant or a simple linear function of the input voltage.
This is a simple check, I recommend before sending a DMM with high Z input (e.g. > 1 G) to calibration or when getting a new / used one. Even without computer read out one can get a pretty good idea of the dirft rate and thus the input bias.
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...
First question I would ask, what is accuracy column exactly mean? :) Voltage 10V point at 0.2ppm? 10kOhm at 0.5ppm? Those are not even 24 hour specs, so :-//?
...
Illya is correct. Where is the accuracy information coming from? The resistance specifications do not match the calibration accuracy spreadsheet... :palm:
I haven't fully evaluated everything, but it appears that the 10 MΩ and 100 MΩ may actually be in range. :-DMM
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Out of curiosity, what do you do with your temperature measurements?
These temperature measurements simply accompany long-term drift measurements :)
Attached is an English translation of Section 15 - Specifications of the original ADCMT R6581(T) manual from 2007 (pages 621 to 635).
Dumb question / sanity check:
Is the "23 ± 1 °C" for the 24-hour specifications referring to the ambient room temperature or the internal temperature of the instrument?
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Ambient temperature. Internal temperature is somewhat higher ;)
-branadic-
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The difference is about 14 to 15 °C for our machine.
And the internal temperature sensor is slow in comparison to TC of the DC Volt measurement, so it isn't easy to use for TC compensation. Best use the R6581 at constant temperature.
For our machine TC is about -0.1 ppm/K, so in order to get 8 digits one needs +/- 0.1 K, and that actually works. Noise is less than 0.02 ppm RMS (200 nV) with 100 PLC. This is a conservative limit, including some noise of 10V test reference.
Regards, Dieter
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Thank you, Branadic and dietert1.
I spoke with the TRANSCAT representatives today. Looks like they recognize that they made critical errors with their tolerances and some units. They have at least acknowledged them for now...
The temperature variation for the calibration testing was recorded at 23.47 °C (as found) and 23.13 °C (as left). Temperature variance could be a significant factor in the 1 GΩ resistance measurement, which is the only range that is not within tolerance (1.6 % error) according to my own calculations based on the 2007 ADMCT manual. The magnitude of the error is highly suspicious. When I get the instrument back, I will record all of the previous settings for each mode (DCI, DCV, OHM) to determine what configurations (PLC, HI/LO Power, AZERO, INT CAL, COMP, etc.) they used. Hopefully, the settings will reflect the measurement conditions. From there, I can assess whether or not the instrument was used properly to determine the tolerances.
The staff in Texas HQ are swamped with work due to a COVID outbreak that has resulted in the loss of one of their members recently. :(
It is going to be a while until they can validate their work and return my instrument. At this point, I have a fair bit of confidence that my 'toy' is working properly. I have an Ohmite RX-1M Series resistor at 1 % tolerance (measured as 1.0025E+09 Ω by R6581T, 1.0025E+09 Ω by R6245, and 1.0038E+09 Ω by R8340 on 2021-03-07) that I will use to check the R6581T 1 GΩ range. Luckily, I tested all the measurement ranges before I sent the DMM to TRANSCAT. Since the R6245 and R8340 have not been changed, I should be able to compare them with my R6581T using the Ohmite resistor. If the R6581T measures comparatively well with the other instruments, like it did before, I will know that TRANSCAT has measured the 1 GΩ range incorrectly.
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I spoke with the TRANSCAT representatives today. Looks like they recognize that they made critical errors with their tolerances and some units. They have at least acknowledged them for now...
Forgive my obtusity, but what error have they made? In the three relevant ranges, the only thing that raised an eyebrow for me was the TUR on the 10M range.
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I spoke with the TRANSCAT representatives today. Looks like they recognize that they made critical errors with their tolerances and some units. They have at least acknowledged them for now...
Forgive my obtusity, but what error have they made? In the three relevant ranges, the only thing that raised an eyebrow for me was the TUR on the 10M range.
If I did the math correctly (assuming LOW Power, TCR, and EXT CAL):
9.99441200 MΩ < 9.99856300 MΩ < 10.0056840 MΩ (PASS)
99.4964093E MΩ < 99.8658000 MΩ < 100.517131 MΩ (PASS)
994.575354 MΩ < 984.106400 MΩ < 1005.60265 MΩ (FAIL? possibly human error)
This is not the same as what TRANSCAT provided (assuming HI Power only):
9.99948800 MΩ < 9.99856300 MΩ < 10.0006080 MΩ (FAIL)
99.9555700 MΩ < 99.8658000 MΩ < 100.057970 MΩ (FAIL)
995.076600 < 984.106400 MΩ < 1005.10140 MΩ (FAIL)
TRANSCAT will not reveal the following:
- power (HI/LO) level, which dictates the tolerances
- integration time
Additional information:
- The instrument successfully measured an Ohmite RX-1M 1 GΩ with 1 % tolerance (1.0025 GΩ) prior to replacing R200 and R234.
- I left the instrument running for months before sending the instrument for calibration. It was tested with the resistors I had available. It was a quick test to determine if there was anything unusual before sending it in.
- The manual is not available in English and the calibration lab did not have access to translations to configure the settings.
- My guess is they were using whatever parameters the instrument was set to and quickly measured the ranges. I will find out what these settings are once the instrument is sent back.
It is difficult to believe that the instrument is dysfunctional based on the information I have presently. Fingers crossed though. My only concern is that the resistor replacement mentioned above could have somehow caused the 10 MΩ to 1000 MΩ ranges to fail. If so, I suppose I know where to begin diagnostics. My question is how could those resistors impact the high-resistance range only? :scared:
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I don't see how a change of R200 and R234 could effect the high resistance ranges only. The effect would normally be small, like a minute change in the INL and drift. So it may effect the ACAL part for 1 V. The high resistance range don't really care about low ppm's - so even a rather poor R200 / R234 would not be visible for the higher resistance ranges.
The high resistance ranges are more sensitive to the ciritcal OP in the current source (U404), leakage of D402 (at the protection), Q402-404. The general input bias current could be an issue too. As the gain is set via ACAL, a problem in the current measurement portion (e.g. leakage around U503) could also effect the high Ohms accuracy. It does not have to be a broken part, but deposits on the PCB could also cause leakage. Some leakage only causes offsets that are corrected anyway.
It is odd, that they did not ask for a manual if they don't have one.
I would consider that using 100 PLC would be the obvious choice, even if you don't have a manual. Anyway it would not make a difference if they use 10 PLC and than averging, as 100 PLC is also just doing that internally.
The Ohms power setting should not effect the higherst ranges - these are allway the same low power, limited by the availabe voltage.
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If I did the math correctly (assuming LOW Power, TCR, and EXT CAL):
This is not the same as what TRANSCAT provided (assuming HI Power only):
TRANSCAT will not reveal the following:
- power (HI/LO) level, which dictates the tolerances
- integration time
I suppose having the manual only in Japanese is quite an issue. Are there any Japanese forum members that might help translate a page or two?
I would have thought that the calibration procedure would use HI power, but of course that doesn't mean they are using the HI/100PLC settings to measure the 'as left' reading. However, a thought did occur to me--is it possible that the calibration procedure does both HI and LO and there are two separate sets of calibration constants for each power level?
Also, although I have no experience with that DMM, or 8.5-digit DMMs in general, but typically if a machine reaches its limits for calibration constants, it gives you an error. So either the DMM should enter a constant large enough to give you a correct reading--no matter how far off it is to begin with--or should not enter any constant but instead tell you that the baseline reading is out of limits. To enter a value and have the machine accept it and then not measure accurately later would be indicate that something is going wrong. I have had meters that do accept a calibration point, but then have either instability or gross errors at points other than the calibration point--which is why I harp about not calibrating broken meters. But to have it accept the entry and then immediately be off at the same point seems weird. If the readings are stable, then the only reason I can think of for this to happen are that the readings after the calibration point entry are being taken with different parameters than during calibration, whether that be power level, PLC or something else. Or, possibly the meter doesn't work the way I think it should--and I can't read Japanese.
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I just got off the phone with the calibration technician. He said that he tried everything to make the R6581T measure within tolerance:
- 2-wire mode instead of 4-wire for the 10 MΩ, 100 MΩ, and 1 GΩ range (they will update the accreditation data to reflect this)
- checked both HI and LO power settings (not much difference)
- used 100 PLC for the whole procedure
- OMH-COMP OFF
Apparently, the technician had no problem with the R6581T because it is similar to the Fluke 3458 and 8508.
He mentioned that while testing, he noticed something very strange about the -1 V reading on the 10 V range. He had to calibrate the DMM three to four times to get the instrument to read correctly. This might be key to diagnosing the problem... EDIT: This sounds like ACAL R230, which is located right next to R234.
I think I must have done something wrong on my end. Maybe I overheated a component while de/soldering or left part of the board contaminated enough to have poor readings at the high-resistance range. :(
EDIT: Change history:
1) Branadic binding post adapter with leads soldered to posts
2) R200 - easy replacement with solder sucker because the feet were straight
3) R234 - particularly difficult to remove with a soldering iron, solder sucker, and eventually wire cutters
4) K006 - followed the picture and heat shank a cover over the green wire
5) C215 - easy to overheat, but should not be a critical component
I am going to get an estimate for the cost of repair if possible. Might as well have the instrument come out completely calibrated.
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AFAIK the 6581 uses ACAL similar the the 3458. So there are no real cal constants to enter for each Ohms range, let alone seprate values for the high / low power modes. Ideally there may be some extra tests and constants for the very high ohms ranges modes to account for leakage, but I somewhat doubt they have implemented this.
The CAL steps at these modes are tests, if the performance is acutally within the bounds. AFAIK there is no individual adjustment, just 10 V and 10 K.
In most cases a calibration is a check only and there is no adjustment, maybe except of zero offsets (e.g. 4 wire ohms zero and voltage zero) that is also user adjustable independent of calibration anyway.
Trouble at -1 V may be especially bad: the ACAL procedure uses -1 V to get the range for the 1 V range and lower. If the porblem is with -1 V at the ADC it would also effect the 1 V to 100 mV range step. So the readings at -10 V, -1 V and 0 V are the 3 most imortant ones.
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The CAL steps at these modes are tests, if the performance is acutally within the bounds. AFAIK there is no individual adjustment, just 10 V and 10 K.
OK, that explains how you end up with a wrong reading but no error message. However, I can't square that exactly with his as-found vs as-left data. The 10K range was adjusted down slightly, apparently, but the 4 top ranges went up. The 1M range actually went up enough to get back into spec.
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There are 2 steps in the calibration process with adjustment. The first is to adjust the constants for the 10 V and 10 K resistance range. This is normally only done rarely, e.g. for a new calibration after a major repair / change, or if starting well out of cal.
The 2nd step is the ACAL procedure, the internal measurement of the internal gains and ratios of the shunts and current sources. This process is normally repeated relatively frequent, like once a week or one a day, e.g. before a critical measurement sequence. Normally the ACAL part should be rather repeatable and at the same temperature give very similar results. Over time is may slowly change and this is why it is repeated.
The high resistance ranges are about the most sensitive parts in the ACAL process as it used very small currents and thus react to internal leakage currents. Leakage currents can change with temperature and humidity - the humidity effect may take quite some time.
Repeated ACAL under stable conditions would be a point to normally test - the change should be rather small, like less than 1/2 the 24 hours specs.
This may not be part of the normal CAL procedures - though in my view it should and there should be test limits for this. On could consider this an extra self test, as it does not need any extra equipment.
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Here i have a measurement with our R6581T inside a TEC chamber.
The black curve shows R6581T measurements of a 10 V reference that i put into an NH2 incubator.
Raw data in gray exhibit typical 2-point temperature regulator modulation
(on at 22 °C, off at 21 °C, every 6 minutes). Vertical range is 1 ppm.
Red curve shows internal temperature of R6581T.
Pink curve is inner temperature sensor of TEC chamber, brown curve is outer
temperature sensor of TEC chamber. Both sensors are near the respective heatsinks and their
measurements have been shifted up by 18 °C to roughly match the red curve. Chamber set
temperature starts at 20.7 °C which results in 23 °C chamber air temperature. It went
up to 23 °C by incident at 20:07 and was readjusted down to 20.7 °C at 20:55.
The TEC chamber takes about 10 minutes to realize the temperature step, while
the R6581T temperature sensor has a risetime of about one hour. The voltage measurement
reacts after about 30 minutes and follows the temperature rise faster than
the temperature decrease. TC would be about -2.8 uV / 2.3 °C = -1.2 uV/K = -0.12 ppm/K.
At this time scale!
Regards, Dieter
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For the TC of the instrument the internal temperature is porbably the more relevant scale. The temperature pulse is still too short to fully get visible in the internal temperature. The effect on the internal temperature is no 100% at the same time and same shape, but the 2 curves are also not so much different. So the delay is quite comparable.
The moving average is somewhat scewed to one side in time (like you calculate in real time). This is a bit confusing as different times for averaging are used. So ideally have the symmetrical form, going forward and back in time, as one can do after the experiment.
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The boxcar low pass for the voltage is an optimum filter covering two periods of the NH2 incubator. Extra delay is one period (6 minutes). So the delay to voltage change is more like 24 minutes, while the "Int. Temp" sensor of the R6581T has a risetime of one hour or more. It takes several hours to settle after a temperature change. Don't know how that is possible.
Of course the test reference should get better temperature control as soon as possible.
Regards, Dieter
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Good evening,
quite a while, when bbshot was still accessable I had a discussion related to INL improvement, here is a snippet:
https://translate.google.de/translate?hl=&sl=zh-CN&tl=en&u=http%3A%2F%2Fbbs.1ppm.cn%2Ftopic%2F23%2Fadvantest-6581%25E7%25A3%25A8%25E6%259C%25BA-zy%25E7%259A%2584%25E5%25BE%2597%25E6%2584%258F%25E6%259D%25B0%25E4%25BD%259C
Comment: Unfortunately I have no access to the thread either, but maybe some fellow could help to have the page translated and copied into a pdf for us?
Here is my corresponse with someone about it:
<speaker1> replace U105-> OPA189, U104->AD707KR for short-term improve.
<speaker1> and also U205-> LTC1150 or 2057
<speaker2> so U105 OP07D --> AD707KR and U104 LT1220 --> OPA189 ??? And that improved things?
<speaker1> yep
<speaker1> that's his tested result.
<speaker2> has someone confirmed his results and what manufacturing date is his unit
<speaker1> he has three 6581. I know he had tested it on two 6581.
<speaker1> I'm not that interested in 6581 at that time. so, I didn't really pay attention on his test.
<speaker2> okay
<speaker1> but, there are lot of volt-nuts here that have tried it and get similar noise performance. one way or another.
<speaker1> we have a 6581 group here. more than 60 members.
<speaker2> wow
<speaker1> the short-team stability of 6581 isn't the problem. after modification we can got about the same performance.
<speaker1> the linearity it is.
<speaker2> yes and this is caused by the ADC design and Q204?
<speaker1> I think so.
-branadic-
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The suggested changes to U104 and U105 look a bit odd in parts. It is an interesting point considering that the amplifier may be cause of the INL, at least part of it. There are 3 amplification stages. The OP07 may have a relatively low open loop gain and could have output cross over error. However the other stages give an gain of about 33 and some 40 ? for the JFETs. So there is still quite some loop gain, even with a not so great OP07.
The OPs are inside the main FB loop, so there is no really need for very low drift. It may be more about the loop gain. U104 is used with no local feedback and the GBW of that OP would directly effect the amplifier frequency response. So the speed of a replacement OP should not be very different. Changing U104 to an AD707 or similar OPA177 would add more loop gain at a similar BW. I don't see why the OP07 could cause a significant INL error, but things are tricky below the ppm level.
Exchanging U105 makes not much sense to me (unless broken). The OP runs with local feedback (gain of -33) and should not be that critical.
The loop gain is small, but the whole amplifier ist still inside the main loop.
With gain the OP U504 (GND side buffer at the FB divider) could be a problem: it's ouput cross over error would not be suppressed very much.
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Here i have another R6581T inside TEC chamber result.
The R6581T is monitoring a 5x LM399 reference with PWM 10 V stage, that has been operating at constant conditions for some weeks. Each point in log averages 500 measurements of 100 PLC in 2500 seconds. Vertical scale is in uV.
Before this log the TEC chamber was off (under revision) for two days.
Near the beginning of this log chamber temperature drops to 23 +/- 0.01 °C and internal R6581T temperature drops to 38.9 +/- 0.05 °C. We can see the R6581T drift over 54 hours, about -0.9 ppm total and then settle with low noise. Since the temperature change was 38.9 - 41.3 = -2.4 K we can estimate TC = -0.9 ppm / -2.4 K = 0.37 ppm/K on this time scale. For very short time scales the result was -0.12 ppm/K (see above).
The TC derived from all observations during recent weeks until now is 0.15 ppm/K.
Regards, Dieter
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I just got off the phone with the calibration technician. He said that he tried everything to make the R6581T measure within tolerance:
- 2-wire mode instead of 4-wire for the 10 MΩ, 100 MΩ, and 1 GΩ range (they will update the accreditation data to reflect this)
- checked both HI and LO power settings (not much difference)
- used 100 PLC for the whole procedure
- OMH-COMP OFF
Apparently, the technician had no problem with the R6581T because it is similar to the Fluke 3458 and 8508.
He mentioned that while testing, he noticed something very strange about the -1 V reading on the 10 V range. He had to calibrate the DMM three to four times to get the instrument to read correctly. This might be key to diagnosing the problem... EDIT: This sounds like ACAL R230, which is located right next to R234.
I think I must have done something wrong on my end. Maybe I overheated a component while de/soldering or left part of the board contaminated enough to have poor readings at the high-resistance range. :(
EDIT: Change history:
1) Branadic binding post adapter with leads soldered to posts
2) R200 - easy replacement with solder sucker because the feet were straight
3) R234 - particularly difficult to remove with a soldering iron, solder sucker, and eventually wire cutters
4) K006 - followed the picture and heat shank a cover over the green wire
5) C215 - easy to overheat, but should not be a critical component
I am going to get an estimate for the cost of repair if possible. Might as well have the instrument come out completely calibrated.
I received my Advantest R6581T back from Transcat today. Sure enough, it has the problem with the high ohms range. They are not willing to diagnose or repair it. :horse:
When I measure an Ohmite RX-1M 1 GΩ 1 % resistor, the reading is within tolerance initially.
After observing the meter readings for about 2 hours, I believe the measurements decay over time until a steady-state value is reached.
My guess is that the instrument reads correctly for a while but slowly drifts off course. The same values appear for both the front and rear terminals. I am going to take some time to measure all my resistance/voltage standards before opening it up for diagnostics.
Does anyone know how to explain this mechanism?
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The high ohms performance use low currents and is sensitive to leakage and may thus depend on temperature. The higher the temperature the higher higher the leakage currents.
For resistors much above 10 M, I would not consider a normal DMM to be the right instrument. The Fluke 8858 may an exception. Otherwise it would be more like a job for an electrometer like Keithly 617.
For the very high resitors the auto zero off mode may work better than AZ on, especially with a longer cable. The cables also can make a difference - normal PVC isolation is no longer good enough, unless very short and not touching anything.
Getting trouble with -1 V in the 10 V range is a really bad sign, as this point is also used in the ACAL procedure.
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Thank you, Kleinstein.
Should I try to clean the board with isopropyl alcohol, gloves, and a toothbrush or would this just make things worse?
Has anyone successfully measured high-resistances with their Advantest R6581? If others are experiencing similar issues at these ranges, then I guess the problem is inherent to the instrument.
Getting trouble with -1 V in the 10 V range is a really bad sign, as this point is also used in the ACAL procedure.
This concerns me also... All in due time. :-+
For now, I won't tamper with the internal calibration until I measure all my standards. At least I will be able to get some NIST traceable measurements for the trouble. With luck, some will be adequate for the record.
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It is a bit hard to tell which direction the leakage is. Leakage on the board has the tendency to get better when the meter gets warm. Leakage insider the semiconductors gets worse when warmer. It is still a question in which direction the current flows - is can be both ways. Unless there is visible dirt I would not try to clean it, at least not yet or without another hint in that direction.
A point would be to compare the resistance measurement in different ranges modes. E.g. with AZ mode on and off and maybe in a not yet fully warmed up state (or during warm up). With resonable stable resistors one could check if different ranges are consistent.
Another point to check is the input bias current, I remember that there is some problem with the MUX switching causing curent spikes in AZ mode - this is why the non AZ mode may be a option despite of the DC drift.
I faintly remember that there where reports on problems (e.g. higher ranges out of spec) with high ohms with the R6581. So high ohms may not be the strength of this meter.
In some versions one relay rund relatively hot, as current reduction when on is no working properly. This is fixable.
Is the fix for the relay power saving bug applied ?
Not using the ACAL function is more like a short time solution only.
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Is the fix for the relay power saving bug applied ?
I think I followed the picture correctly. Hopefully, I didn't overheat anything.
The rectangle indicates the original connection that has been isolated with heat-shrink tubing. Sorry for the poor picture quality.
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I received my Advantest R6581T back from Transcat today. Sure enough, it has the problem with the high ohms range. They are not willing to diagnose or repair it. :horse:
When I measure an Ohmite RX-1M 1 GΩ 1 % resistor, the reading is within tolerance initially.
After observing the meter readings for about 2 hours, I believe the measurements decay over time until a steady-state value is reached.
My guess is that the instrument reads correctly for a while but slowly drifts off course. The same values appear for both the front and rear terminals. I am going to take some time to measure all my resistance/voltage standards before opening it up for diagnostics.
Does anyone know how to explain this mechanism?
Can you measure the input bias current, preferably directly with a picoammeter, on the DCV range that would correspond to the voltage used in the 1G resistance mode? If no picoammeter is available, just shunt the input with a stable 1M resistor and a small (1-10nF) mylar or PP capacitor--each microvolt displayed corresponds to 1 pA bias current. Start with the meter cold and see what the bias current does over a 4 hour period.
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Has anyone successfully measured high-resistances with their Advantest R6581?
My R6581T is out of spec on 10M and above. But R6581D is within spec on all ranges. And I don't understand - why.
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I received my Advantest R6581T back from Transcat today. Sure enough, it has the problem with the high ohms range. They are not willing to diagnose or repair it. :horse:
When I measure an Ohmite RX-1M 1 GΩ 1 % resistor, the reading is within tolerance initially.
After observing the meter readings for about 2 hours, I believe the measurements decay over time until a steady-state value is reached.
My guess is that the instrument reads correctly for a while but slowly drifts off course. The same values appear for both the front and rear terminals. I am going to take some time to measure all my resistance/voltage standards before opening it up for diagnostics.
Does anyone know how to explain this mechanism?
Can you measure the input bias current, preferably directly with a picoammeter, on the DCV range that would correspond to the voltage used in the 1G resistance mode? If no picoammeter is available, just shunt the input with a stable 1M resistor and a small (1-10nF) mylar or PP capacitor--each microvolt displayed corresponds to 1 pA bias current. Start with the meter cold and see what the bias current does over a 4 hour period.
The input bias might well be very time dependent, e.g. for a HP3456A I've seen spikes in the nA range for an input bias current averaging less than 100pA. A digital picoammeter might not the best tool to catch that.
I wonder, whether there's some parasitic capacity being charged with the constant current source when measuring large resistances. For very high resistances, electrometers use cables with guards to prevent (minimize) such.
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The input bias might well be very time dependent, e.g. for a HP3456A I've seen spikes in the nA range for an input bias current averaging less than 100pA. A digital picoammeter might not the best tool to catch that.
Yes, I've seen that and I believe on that model, just like the 3455A, you can eliminate the spikes by turning autozero off. And you're correct, a digital picoammeter wouldn't be ideal--which is what most people likely have. I have an analog one and that is what I was thinking of. It does fine with measuring input bias currents and the needle 'kicks' if those spikes show up. I think a small (1-10nF) cap would be a good idea either with the picoammeter or self-testing with a 1M resistor.
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Can you measure the input bias current, preferably directly with a picoammeter, on the DCV range that would correspond to the voltage used in the 1G resistance mode?
I have an uncalibrated Keithley 6485 picoammeter that has been collecting dust recently. Maybe I will give it a shot this weekend. I built a LabView program that I can use to record the data. Maybe all these events have led to this DMM problem! ;D
I also have an Advantest R6245 and an R8340 that might have some advantages over the Keithley but they have no LabView interface yet.
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Has anyone successfully measured high-resistances with their Advantest R6581?
My R6581T is out of spec on 10M and above.
Someone said earlier that the T variation doesn't officially have a specification sheet.
If there are no significant differences, maybe Advantest pulled an Intel move. From what I understand, Intel brilliantly sorts their processors depending on their product outcome rather than discarding failures. :-DD
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Selecting the DMMs from performance in the final tests makes absolutely sense. The parts do differ in performance and matching is also sometimes better and sometimes not that good.
The R6581 is known to show a quite significant spike in the input current when in AZ mode. Chances are one can directly see that on the scope (connect the scope to the DMM input in volts mode and maybe Ohms mode).
For the high ohms (e.g. > 10 M) it can make sense to turn of auto zero, however AFAIK the internal ACAL process still uses auto zero. So the scale factor for the higher ranges is still effected.
For looking at the input bias one can also look at just a low leakage capacitor (e.g. 10 nF) and use the rate of change to calculate the current. With 10 nF a current of 1 pA would be 0.1 mV per second, which is easy to see. This way one can also check the leakage at other voltages, not just near zero as with the resistor.
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You cannot base such a theory on the experience of people who got 25 to 30 year old instruments of unknown origin from ebay. Very likely those are instruments that were put aside for some reason. And the R6581T has a fan, so it can be pretty filthy inside. You don't know whether somebody zapped the input protection diodes before. I have seen one instrument with < 1 pA offset current in DC mode and another one with 70 pA.
I'd like to promote a more optimistic attitude: Clean the instrument, recap, get new VFD, fix known bugs, find and fix previous damage, apply low thermal EMF mods (binding posts and reference module connector). Also i remember a youtube video where TiN did not find any anomalies checking the R6581T input.
There is one more thing i found recently: When i thought about separating Guard from Lo in a 3457A meter, i saw that they use the cage as a low impedance ground network. This happens when you screw the floating section board to the mounts at the bottom of the cage. So in order to mod the guard, one needs to insert another sheet of metal to be used as ground network. I got a sheet of copper for that and ordered copper screws and nuts. I mean you want low thermal EMF for that ground network.
When starting to clean a R6581T a week later, i found exactly that construction at the bottom of its Guard cage but with an aluminum sheet as ground plane. So it will need another low thermal EMF fix.
Regards, Dieter
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Based on the reverse engenierd schematics the input switching has a problem with quite some current spikes. This is not because of broken parts, but more like a poor design at that area. For the given circuit the extra current also shows up in a simulation. The analysis was done earlier in the tread, about here:
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1476332/#msg1476332 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg1476332/#msg1476332)
At low voltages the current can be OK (e.g. 10 pA range, depending on luck with the parts and how well the individual leakage parts compensate). The extra current spike happens only at a higher voltage (AFAIR mainly one sign above a threshold). The over all / average current may still be not too bad for a normal voltage reading and the ohms sense inputs can be a bit better, as they use larger resistors for protection.
Form the experiments done it is not so easy to fix this problem, as it is directly linked to the amplifier and how to drive the JFET gates.
It is not a problem of leaky parts or dirt, but more with limited slew rate, that can cause JFET gates to get forward biased.
One can measure the input current also at other voltages. There are some examples shown in the tread and they show quite some current.
TiN also had problems with the higher Ohms ranges - so chances are the higher ohms ranges are not that great. There may be slected / tested good meters that meet the specs (e.g. those without the T). The high ohms ranges use very low test current and this naturally is sensitive to leakage currents.
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You did not understand. I reported evidence that one R6581T had an offset current of < 1 pA and a second one had more than 70 uA - in the same test. For me a strong indication that one of them is bad. Not need to invent numbers like 10 pA.
A typical mistake seen often in this forum: People are talking about "the R6581T", but they can at most talk about "their R6581T". Others develop strong opinions and speculations without ever touching any real R6581T. Not very helpful.
Regards, Dieter
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No doubt a good R6581T should have low input current at 0 V or low voltages like from -3 v to 3 V. A high current (like > 100pA) there would be a defect or maybe dirt.
However given the schematics ( and measurements from others there) one has to expect the input current to go up when you get closer the full scale (e.g. 7 to 10 V - I don't remember the sign that is more critical). Unless they have changed the ciruit, the current spikes from switching are there by (poor) design and not because of broken parts.
It takes a little extra effort to measure the input current at +-10 V, but it is still not that difficult (e.g. use the drift rate for a 1-10 nF range low DA capacitor). Expect a higher current (nearly 10 x) in the 1 PLC mode compared to 10 PLC.
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Finereader recognized the entire R6581 manual. Didn't translate.
If there are errors, please let me know.
:phew:
https://cloud.mail.ru/public/DoB9/A5DWKLDDB
I can upload it in docx and odf format.
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Ummm... I already did this. If anyone can host the PDF, I can send it to them. What was done exactly?
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I already did it 4 years ago and stored the "6581,R6581D User Manual (2007,OCR).pdf" in KO4BB archive ;)
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Since the machine recognition system is still far from perfect, I manually selected data types. And he corrected the incorrectly recognized hieroglyphs. Otherwise, the text turned into some kind of nonsense.
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My 6581 has a loud noise in testing now，short circuit with about 0.08ppm。
Where should I start for repairing?
Any suggestions,Thanks！
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martinr33 pointed out a very interesting observation today:
The Advantest R6581 is rated to a maximum of 1000 V, whereas the R6581T model is rated to 300 V in my variation.
TiN's model is rated to 120 V! https://xdevs.com/doc/Advantest/R6581T/img/adv_front.jpg (https://xdevs.com/doc/Advantest/R6581T/img/adv_front.jpg)
According to the dataset that was provided, the calibration lab tested my unit to 1000 V... :scared:
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martinr33 pointed out a very interesting observation today:
The Advantest R6581 is rated to a maximum of 1000 V, whereas the R6581T model is rated to 300 V in my variation.
TiN's model is rated to 120 V! https://xdevs.com/doc/Advantest/R6581T/img/adv_front.jpg (https://xdevs.com/doc/Advantest/R6581T/img/adv_front.jpg)
According to the dataset that was provided, the calibration lab tested my unit to 1000 V... :scared:
Are those voltage markings on the front panel the maximum the meter can read without damage or are they just indicative of the CAT II rating?
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Essentially R6581T input protection is a passive circuit, with two clipping diodes and a resistor to limit input current. Then there is some extra circuitry to limit transients to +/- 2 V or so from the previous DC level. That cicuit also makes diode leakage less dependent on DC level. Current limiting resistors are 4x 2K2 and good for about 1 W each, so that would mean a continuous overvoltage of up to 47 V on each resistor, 188 V in total plus the +/- 13 V clipping range. The circuit survives short pulses of higher voltage, e.g. during the time to open the relay and disconnect the direct low voltage input in autorange mode.
Don't know whether the relay opens if you input 100 V while in manual range 10 V.
And one would like to know what is the voltage spec of that relay. There may be the origin of a final spec of 600 V or so. In dry and clean conditions the physical limit for sparks will be yet higher, probably above 1 KV.
Regards, Dieter
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Here i have a proposal for solving the R6581T input mux leakage. It's a partial solution supporting DC with Autozero measurements, with clean break before make operation. No more input leakage over the full range from -12 to +12 V, except input amplifier leakage and leakage of protection circuit (< 1 pA).
The mod also improves the nonlinearity issue discussed above, as it eliminates deviation by voltage drop across protection resistors caused by leakage. The original circuit leaks to the input with negative input voltages.
The idea is routing either the buffered DC input or Gnd or the original guard level to the MUX drive pin 27. In DC with Autozero mode, only the first two are used and the MUX works independent of the slow input amplifier response. The mod is simple (one chip) and works. The schematic shows some context.
Removing leakage during Autocal requires a little more, as the Autocal negative (!) test voltages come from another MUX input.
Regards, Dieter
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I received my Advantest R6581T back from Transcat today. Sure enough, it has the problem with the high ohms range. They are not willing to diagnose or repair it. :horse:
When I measure an Ohmite RX-1M 1 GΩ 1 % resistor, the reading is within tolerance initially.
After observing the meter readings for about 2 hours, I believe the measurements decay over time until a steady-state value is reached.
My guess is that the instrument reads correctly for a while but slowly drifts off course. The same values appear for both the front and rear terminals. I am going to take some time to measure all my resistance/voltage standards before opening it up for diagnostics.
Does anyone know how to explain this mechanism?
Can you measure the input bias current, preferably directly with a picoammeter, on the DCV range that would correspond to the voltage used in the 1G resistance mode? If no picoammeter is available, just shunt the input with a stable 1M resistor and a small (1-10nF) mylar or PP capacitor--each microvolt displayed corresponds to 1 pA bias current. Start with the meter cold and see what the bias current does over a 4 hour period.
The Advantest R6581T was turned OFF at 7:34 AM for 1 hour before turning the instrument ON at 8:36 AM (corresponding to the large spikes in the graph). It took about 1 hour to reach a steady-state value on the 10 V range at 9:49 AM. The Advantest R6581T positive input was connected to the Keithley 6485 positive input of the inner BNC conductor throughout the entire range of measurements.
EDIT:
At 11:20 AM, the Keithley 6485 reads (-5.1 pA ± 0.25 pA).
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The study above was repeated by leaving the Advantest R6581T OFF for about an hour, then turning the instrument ON at 12:31 PM with AZERO ON prior to startup. The noise is certainly a product of the AZERO function. Interestingly, the signal sharply increases at startup then decays to a mean of zero. The instrument AZERO was turned OFF at 1:53 PM which is indicated by the lower noise at (-5.0 pA ± 0.37 pA).
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Even the time with auto zero on look still quite good. The mean near zero is a slight surprize. AFAIK there is no adjustment pot to the bias current so I would consider this a lucky coincidence.
However the point with zero input voltage is also the easy case, as this means switching between 2 essentially equal voltages . Chances are the spikes get larger when there is an input voltage, like some -5 V.
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Even the time with auto zero on look still quite good. The mean near zero is a slight surprize. AFAIK there is no adjustment pot to the bias current so I would consider this a lucky coincidence.
However the point with zero input voltage is also the easy case, as this means switching between 2 essentially equal voltages . Chances are the spikes get larger when there is an input voltage, like some -5 V.
:phew:
The Keithley 6485 was zeroed with the Advantest OFF. Hopefully, that was alright to do.
I can repeat the experiment with an Advantest R8340 and apply a voltage while measuring the current. If that isn't good enough, I have an Advantest R6245 SMU that I could try. None of them are calibrated or have logging capabilities at the moment.
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The zero of the amp meter should normally be done with an open input. I don't think this would make a large difference, as there may be relays off at the input, when the meter is off.
The test of the input current is not so much about accuracy, more about the rough size. So no calibration for the meter would not be a problem.
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The zero of the amp meter should normally be done with an open input. I don't think this would make a large difference, as there may be relays off at the input, when the meter is off.
The test of the input current is not so much about accuracy, more about the rough size. So no calibration for the meter would not be a problem.
I did a quick measurement with the R6245 by inputting 10 DCV to the Advantest R6581T on the 10 V range. The current reading was roughly less than 0.015 nA without zeroing the SMU or using AZERO on the DMM. If this is interesting, I can try more extensive study like I did with the Keithley 6485.
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As far as i understand the studies above were near zero input voltage to the R6581T. I think 5 pA is a lot, a good R6581T has below 1 pA.
The "around zero" result with Autozero On appears strange. You may need to eliminate RF using a bypass capacitor parallel to the R6581T input. I found a 6.8 uF MKS works well. The R6581T input MUX emits RF, originating from the LM339 comparators that drive the FET
switches.
The interesting part is adding a battery to repeat the leakage current measurement at +6 and at -6 V (or whatever battery you have). I would not use a power supply for that as it may add leakage current, too. If you repeat that with Autozero On and Off, you will probably see strong leakage at negative input voltage and with Autozero On. At least that's what i found. The R6581T was open and the scope connected to the DCV MUX input. I used the + and - voltages from zeners D202 and D203 inside the R6581T as test input and there were 1 V peaks on the 8K8 protection resistor when measuring - 5.6 V. Then i started to think about modding the input MUX.
Regards, Dieter
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Out of curiosity, I cracked open the R6581T and measured the R230 network resistor because I have a hunch that this component could be the culprit. The following resistances were roughly measured:
11.08 kΩ, 4.16 kΩ, 495 Ω (when connected the board, measured in both directions)
Does anyone else get these readings from the board? If so, does your Advantest have trouble reading high-ohms?
According to MickleT's schematics ("simplified diagram of the analogue board" and page 3/5 of "ADC"), the readings should be:
45 kΩ, 4.5 kΩ, and 500 Ω (when connected directly to the DMM)
What makes me suspicious of R230 is that the -1 V range was reported to be a problem by the calibration technician. He explained that the instrument needed to be calibrated 3 times before it was within tolerance and part of the reason was that the - 1 DCV was out on the 10 V range.
Using a Fluke 732A, I measured the following voltages with the R6581T a few days ago:
-0.9999998 V on the 10 V range (definitely an incorrect measurement and repeatable)
-1.000009528 on the 1000 mV range
+1.00000960 on the 10 V range
+1.00000985 on the 1000 mV range
Looking now at MickelT's "DCI & Ohms Artifact Calibration" flow diagrams, it appears that the 10 MΩ, 100 MΩ, and 1000 MΩ all require the -0.1 V, -1 V and -10 V reference voltages for calibration. Are these voltages directly related to the R230 voltage divider? If so, I may have found the problem.
Am I going crazy or could I be onto something? :scared:
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Going into the Internal Diagnostic Modes (HOLD POWER + HOME on boot up):
X1ZERO_1 (FAST MODE) = - 0.0165 VDC
X1ZERO_2 (PREC MODE) = +2.95 VDC
X10ZERO = 295.35 mVDC
X100ZERO = 29.52 mVDC
7.2Vref = +10.0448 VDC
-10Vref = -6.8979 VDC
-1Vref = -689.819 mVDC
-0.1Vref = 69.027 mVDC
Int_temp = 63.32 °C
The only serious modifications I made were to resistors:
R200
R234
This makes absolutely no sense to me. I am so lost... :palm:
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Measuring R230 in circuit is problematic. So the different number for the 45 K part is likely from the in circuit effect.
The numbers from the diagnistic message look odd. This could still be some oddity in the software. A nearly 3 V offset for the precision mode is strange.
This more looks like some offset at the ampliers output or ADC, as the offsets go down with gain. This may be something wrong with R200 or another ADC problem.
It is than still odd to see the small error in the fast mode.
Not sure if the -10/-1/-0,1 V ref values include the offsets - this may make up the difference.
Instead of an in circuit resistance measurement, the better way to check would be a voltage measurement on the running meter.
For R230 this would be the -10 / -1 / -0.1 V test votlages.
The amplifier offset should be visible while measuring a short and than use a 2nd meter to measure the internal voltage at a few points, like the amplifier output.
The wrong reading of -1 V in the 10 V range is really odd. With this the meter should not have passed calibration. Using repeated tries to get it work is not a good practice ! It is more like one should repeat the ACAL part several times and the meter should be in CAL all the time. If it fails once it fails calibration.
Not working reliable at -1 V is kind of a desaster for the ACAL procedure, as many one the readings are around -1 V. The high Ohm problem may still be a separate problem - possibly just too optimistic specs and a weak design in this area.
A -5 pA input current is not so bad. With quite a few FETs in the MUX and the amplifiers this is a realistic number.
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Yes, there is a certain risk with modding to screw up. Anyway with the schematics we got from Mickle T. maintainance of the analog section of R6581T is easy.
You can use another meter to check the reference voltage chain: 7.xxx V from the LTZ module, +17 V, -19 V and the three Autocal test voltages -10, -1, -0.1 V. All these may deviate from their nominal values by some percent, but their ratios are accurate. If there is an error with the references, the diagnostic mode will generate strange results.
Regards, Dieter
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I suppose there is a possibility that I installed the R234 backwards, but I was careful to check the other people's reference pictures before installation.
Tonight, I will check the voltages.
EDIT: Couldn't wait!
R230: 98.5 mV, 0.985 V, 9.85 V
R234: 9.659 V, 7.090 V (across the network: 16.75 V)
So far, the voltage magnitudes appear to be reasonable to me. :-//
The firmware version states: ".A01". Is there a newer version available?
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The firmware version states: ".A01". Is there a newer version available?
http://www.ko4bb.com/getsimple/index.php?id=download&file=Advantest/Advantest_R6581_8.5_Digits_Digital_Multimeter_EPROM_A02.zip (http://www.ko4bb.com/getsimple/index.php?id=download&file=Advantest/Advantest_R6581_8.5_Digits_Digital_Multimeter_EPROM_A02.zip)
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Here's 03.
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The R234 and R230 votlage readings look ok. Looks the large offset could be the problem to get the wrong numbers.
The expected voltages at R200 would be similar to R201.
The interesting point would be the ADC input, so TP200 , with the input shorted and in 10 V and 1 V range with out auto zero and high PLC. For the fast amplifier one could also test with a very short integration time.
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The -19 V reference voltage check was missing. The offset numbers in diagnostic mode mean that the precision channel of the input amplifier
produces a constant output offset of about 3 V. Depending on gain this output offset gets attributed the numbers shown in diagnostics. It can be a problem of that amplifier or of the -19 V reference. Better fix this before playing with firmware update.
Regards, Dieter
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The -19 V reference voltage check was missing. The offset numbers in diagnostic mode mean that the precision channel of the input amplifier produces a constant output offset of about 3 V. Depending on gain this output offset gets attributed the numbers shown in diagnostics. It can be a problem of that amplifier or of the -19 V reference. Better fix this before playing with firmware update.
Regards, Dieter
How should I test the -19 V reference voltage? Is that associated with R200?
EDIT:
Looking at the schematics, I assume that the -19 V is associated with R232:
16.5 V, 18.685 V
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The -19 V is availabe at several points: the output of U211 and at R200 , R201.
The low offset for the high speed range may be just the difference to the slow output.
Though shown as a problem with the amplifier offset, chances are this is a problem with the ADC or reference (the -19 V).
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...
The expected voltages at R200 would be similar to R201.
...
As indicated by the attached tables, the voltages of R200 and R201 seem to match reasonably well. I shorted the DCV input and the range was set to 10 V during the measurements at each resistor.
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The voltage readings look all OK, just a slightly lower reference voltage than the nominal. This should not be a problem. The ADC input = pin 3 of R200 is also close to 0 V as it looks. So there is no large offset visible. So there must be some other odd reason for the meter to measure so much offset.
One possible fault to cause an offset may be a non working reset at the ADC integrator. So maybe check TP201 with the scope. Probably best with 1 PLC, non AZ and a short in the 10 V range.
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Let me remind you all that I truly appreciate your help with this Advantest R6581T problem.
I would be entirely lost without your input and I am so glad I have access to your knowledge, experience and insights. :-+
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...
One possible fault to cause an offset may be a non-working reset at the ADC integrator. So maybe check TP201 with the scope. Probably best with 1 PLC, non-AZ and a short in the 10 V range.
I guess it is time to buy my very first oscilloscope :-[
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Here's 03.
Have you successfully used these files?
Also, is the firmware loaded on the PLCC44 chips next to the front transformer? They seem to be.
If so, I am looking at this adapter board for my GQ-4x4 universal programmer:
https://www.gqelectronicsllc.com/store/index.php?route=product/product&path=25_64&product_id=135 (https://www.gqelectronicsllc.com/store/index.php?route=product/product&path=25_64&product_id=135)
I think I will buy new chips so that I have a backup before I attempt an upgrade.
This firmware upgrade will be in anticipation of when I do figure out what is actually wrong with my instrument. Firmware might be a problem, but I will exhaust all other possibilities first.
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I don't think the firnware is main cause of the problem. There may be a few smaller changes with the firmware, but the problem at -1 V looks like a serious HW problem. I don't think with could be fixed with small changes in the timing.
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R6581T firmware updating - is a totally waste of time.
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Have you successfully used these files?
I do not have this device :( I just collect information :)
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Once more i looked at the input leakage current of the R6581T with the modded input MUX.
With covers open i nulled the instrument with a low thermal short and then connected 10 MOhm with 1 uF MKS parallel to the voltage input. So 1 pA of leakage generates 10 uV offset voltage. I added a protective box over the input terminals with the resistor and the cap to suppress air drafts.
The steady state observation was 3 uV, that is 0.3 pA leakage.
After closing the instrument and waiting some hours for the internal temperature to reach 38.5 °C i repeated the procedure and found 2 pA. As expected for semiconductors the leakage currents rise with temperature. These are the JFETs in the input MUX, the protection diodes and the JFETs in the amplfiers.
Another criterion for a "good" R6581T is low input noise. With a low thermal short, 100 PLC, Autozero and running 100x statistics i got a standard deviation between 45 and 50 nV. This is in 100 mV range.
I tried to look at the dagnostic mode measurements and check the results with another DVM. Very confusing, e.g. they display the 7.2 reference voltage as 0.706221, while the HP 3478A displays 7.0640. The diagnostic measurements may be in arbitrary units.
Regards, Dieter
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...
I tried to look at the diagnostic mode measurements and check the results with another DVM. Very confusing, e.g. they display the 7.2 reference voltage as 0.706221, while the HP 3478A displays 7.0640. The diagnostic measurements may be in arbitrary units.
Regards, Dieter
Interesting, Dieter. Thank you for this information.
Could these false readings from the internal check mechanism be a common issue? MickleT's "R6581(D, T) DIAGNOSTIC MODE" PDF reflects expected measurements and shares the same version ID as my own unit (i.e. "ADVANTEST,R6581T,0,A01"). I believe that that the magnitudes are not intended to be 'arbitrary'. We could assume that our anomalous readings are hardware-related. I wonder how they are collected and presented by the DMM.
Out of curiosity, what did your unit state for the internal zero checks (x1Zero_1, x1Zero_2, X10Zero, and X100Zero)?
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https://cloud.mail.ru/public/xwNi/b5vD62nsc
Internal check data of my multimeter. For comparison.
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https://cloud.mail.ru/public/xwNi/b5vD62nsc
Internal check data of my multimeter. For comparison.
Thank you, serg-el. :-+
Is your R6581 unit have original components or have you modified the analogue board?
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Only relay K006 connection and replacement of capacitors C215 and C212.
https://cloud.mail.ru/public/qCSD/2tCLvdhJ5
Yes. This multimeter has had a difficult life. I had to align the case, and wash, and clean the buttons ...
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This multimeter has had a difficult life. I had to align the case, and wash, and clean the buttons ...
My unit required little to no maintenance. It is much cleaner than your unit too. The T version might have lower-quality components that are more prone to failure. Going through your pictures I notice a few variations (besides the obvious AC board). Thank you for these.
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@ leighcorrigall
By the looks of it you have some serious problem, not only that there is something screwed up with the voltages, also internal temperature is pretty unusal and high, unless your unit is close to the vulcano on La Palma.
-branadic-
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The higher temperature may also explain the higher input leakage. Maybe the fan isn't working properly.
The diagnostic mode has a "Reset" item. I used it trying to terminate and leave diagnostic mode for normal operation, but nothing happened. The next time i was using diagnostic mode, all the internal voltage readings came on scale. Mmh. That unit is firmware A01. Maybe somebody knows the details.
Regards, Dieter
Edit: Or the fan is working and the internal temperature is normal, but the LM35 temperature sensor reading is wrong by the same offset that was present before. 30 °C extra is a 300 mV offset. At a normal operating temperature of 30 °C when covers are open the LM35 output should be 0.30 V.
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...
With covers open I nulled the instrument with a low thermal short and then connected 10 MOhm with 1 uF MKS parallel to the voltage input. So 1 pA of leakage generates 10 uV offset voltage. I added a protective box over the input terminals with the resistor and the cap to suppress air drafts.
The steady-state observation was 3 uV, that is 0.3 pA leakage.
...
I repeated a similar experiment using a Keithley 8610 CAL SHORT and a 10.00211 MΩ Caddock resistor (ML212 10M 0.1%) combined with a "DIEL 100 2.5" capacitor that I removed from a Keithley 616 electrometer.
On the 10 V range, the value is < 0.00044 V (100 NPLC) with a ground shield cover over the binding posts after nulling.
On the 1000 mV range, the value is < 0.425 mV (100 NPLC) with a ground shield cover over the binding posts after nulling.
EDIT:
For confirmation, another 10.0108 MΩ Caddock resistor (ML212 10M 0.1%) was used in combination with another "DIEL 100" film capacitor to measure the leakage. A picture has been attached of the resistor-capacitor combination.
10 V range: < 0.00044 V
1000 mV range: < 0.423 mV
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There are absolutely no problems with the input current at zero voltage at the input. But far from zero, it becomes catastrophic due to charge injection during multiplexing.
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Sorry, but these are switching errors of the input MUX caused by wrong control signals. For example when switching from LO input to negative DCV input after Autozero. Since the Guard signal comes from the slow amplifier output, it remains at Gnd level for up to 200 usec after switching and current flows into the gate of the DCV input JFET. This forward diode current flows from the Guard buffer to the instrument input. Only when the amplifier has settled, the DCV input JFET gets gate voltage near zero as it is meant to be.
The mod i proposed above produces correct control signals, at least for DCV with Autozero. The Guard pin of the input MUX needs to go negative and/or settle to the correct voltage during the break-before-make time interval. We cannot use the MUX output to determine that voltage level as it is undetermined during break-before-make. Each input except LO needs to have a buffer similar to the AD549 of the DCV input. Then we can select the MUX control signal Pin 27 from those buffered signals and the switching errors will be gone.
Anyway, it is a good idea to check the basic input leakage. As you wrote, there will be no or little switching errors near zero input voltage.
Regards, Dieter
Edit: Also the JFET switches of the input MUX don't work well when both input and output are high impedance. There is that 330 pF cap C008 to help a little. I will probably try and replace the MUX hybrid by 2x MAX328 low leakage mosfet mux chips plus some glue logic. The comparators used for level shifting can go, as well as the heat generated by the 14x 100 K resistors inside the hybrid.
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There are 3 parts to the input curent at higher votlages. One is the JFET gate current from the slow guard amplfier. Another one is charge pumping from a missing precharge phase: the capacitance of the amplifer input an output side of the mux are charges by the input. With some 10 pF and 2.5Hz switching (10 PLC AZ) this would act like 40 GOhms to ground.
A third part is charge injection from the gate capacitance. This may vary quite a bit with 2 JFETs in series in the mux. Depending on where the tresholds are the charge flows more to the amplfier or input.
The correction of the control signal would only fix one of the points.
Given the problems with switching and as it is possible to adjust the amplifers temperature drift, it would make sense to use the high ohms ranges mainly in the non AZ mode. As the switching problem also applies to the ACAL procedure, chances are the higher ohms and low current ranges may show some systematic error.
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I think the main problem of higher ohms ranges in R6581T is rather simple: ACAL 100M & 1000M is performing with AZERO ON, but all normal measurements - with forced AZERO OFF.
P.S. Thus, I see two solutions:
1) eliminate the above 3 sources of increased input current.
2) increase the delay in the firmware for performing AZERO during ACAL of 10M-1000M ranges.
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Kleinstein, your comment is a little misleading as you forgot to mention that leakage caused by the wrong MUX control signal is up to 10 000x times more than the other two problems you mentioned. Other people get confused if you use the term charge injection when the main, large issue is forward diode current into a JFET gate.
Regards, Dieter
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I aggree that the wrong control voltage for the MUX is the larger problem. The current can be huge, if the input is low impedance. This however only explains the current for the negative side, below some -3 V. The positive side current is from the other 2 parts. This is still within specs (at least for 10 PLC), but still not great.
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There are absolutely no problems with the input current at zero voltage at the input. But far from zero, it becomes catastrophic due to charge injection during multiplexing.
You inspired me to run an applied voltage sweep on the Advantest 10 V range. Attached are the results. I waited for the Keithley 238 (SV, MI) current measurements to reach an approximate steady-state before measuring the voltage from the Advantest R6581T. The Advantest was set to 100 NPLC (DFILTER: n = 25 mean), AZERO = ON, PROT = ON. A CRADDOCK ML212 10 MΩ 0.1% resistor (with a DIET capacitor in parallel as shown above) was used as indicated by your illustration.
EDIT: There was a mistake in the applied voltage. The new attachments correct this.
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Input current, calculated from R6581T voltage readings:
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Input current, calculated from R6581T voltage readings:
Interesting. It is a bit erratic, isn't it?
I decided to substitute calibration data for the Keithley 238 voltage source so that more realistic voltages were used for the x-axis.
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I suppose there is a possibility that I installed the R230 and R234 backwards, but I was careful to check the other people's reference pictures before installation.
...
@branadic
The R200 and R234 resistors have been properly oriented. This was confirmed by measuring the original blue resistors that I kept and comparing their resistances to the labels found on the Vishay replacements. Photos were taken before and after the replacement process for reference. The replaced resistors are not causing performance issues with my unit. At this point, I wish the problem was simple and that I made a really easy mistake with the resistor reversal, but there is something else causing the anomaly. :palm:
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Meanwhile the R6581T with the modded MUX received a fresh VFD.
Here are the internal voltages from diagnostic mode:
x1Zero_1 -0.0305 V
x1Zero_2 -0.00258 V
x10Zero -0.293 mV
x100Zero -0.0629 mV
7VRef 7.062... V
-10V -9.813399 V
-1V -980.702 mV
100 mV -98.178 mV
Int. Temp 35.32 °C (still heating slowly)
I also wired up a setup with a HP3478A and an E3630A power supply to measure input leakage current as voltage along a 10 MOhm resistor. As expected leakage is small without Autozero and much larger with Autozero on. Leakage current is the same with 10 PLC and with 100 PLC. With Autozero off this R6581T input behaves resistive, and a line fit estimates about 2 TOhm.
With Autozero on i got a latch-up when trying -11 V. This means even with the correct control signal the input MUX does not break before make at input voltages below -10 V. Break-before-make is based on the open-collector outputs of the comparators, in conjunction with the different RC delays formed by the 8K4 (break) and the 100K (make) resistors in the MUX hybrid and JFET gate capacitance. But that doesn't work properly if the gate thresholds are at very different voltages. In addition there is this strange patch R083/C026.
Regards, Dieter
Edit: As the MAX328 charge injection is specified as 5 pC, times 2.5 gives a max leakage of 12.5 pA at 10 PLC with Autozero. About a factor 15 lower than now. Maybe that's the way to go.
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C026 slows down some of the switches. As the charging part is though 100 K and discharge though 10 K the effect is stronger for the turn on part than for the turn off part. To some degree this avoids a make before break and reduces the effect of forward biased gate. R83 is likely mainly there to limit the current spike for the comparator. I don't know if the SW adds some extra phase with no input connected.
Except for the -11 V point the curve with AZ mode does not look so bad. It is still odd to also see a negative current for positive voltages.
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Added the additional data to the table.
For whatever reason the values of your unit are odd, leighcorrigall. I would try to find out why.
-branadic-
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Added the additional data to the table.
For whatever reason the values of your unit are odd, leighcorrigall. I would try to find out why.
-branadic-
I think this might be the heart of the problem. The actual measurements are not at all close to the results presented in the diagnostic menu. Could this be something wrong with the digital board? :-//
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It would be unusual that a problem with the digital board would only effect the diagnostic mode in a away to give wrong values. A defect in the firmware in such a way would be unlikely.
Are the wrong readings at least changing to the degree of normal noise, when a new measurement / update is called for ?
A agree that the odd values there are close to the heart of the problem. The esepcially odd point is the very different offset for the fast and slow mode, unless the fast amplifier value is only the difference to the slow one.
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Some more statistics.
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...
Are the wrong readings at least changing to the degree of normal noise, when a new measurement/update is called for?
...
The values are fairly stable. These measurements were taken now:
X1ZERO_1 = -0.0167 DCV
X1ZERO_2 = +2.9543 DCV
X10ZERO = +0.29526 DCV
X100ZERO = +0.0294 DCV
7.2Vref = +10.04475 DCV
-10Vref = -6.89803 DCV
-1Vref = -0.68989 DCV
-0.1Vref = -0.069098 DCV
INT_TEMP = +70.3 °C
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...
Are the wrong readings at least changing to the degree of normal noise, when a new measurement/update is called for?
...
The values are fairly stable. These measurements were taken now:
X1ZERO_1 = -0.0167 DCV
X1ZERO_2 = +2.9543 DCV
X10ZERO = +0.29526 DCV
X100ZERO = +0.0294 DCV
7.2Vref = +10.04475 DCV
-10Vref = -6.89803 DCV
-1Vref = -0.68989 DCV
-0.1Vref = -0.069098 DCV
INT_TEMP = +70.3 °C
I suppose there is a possibility that I installed the R230 and R234 backwards, but I was careful to check the other people's reference pictures before installation. Tonight, I will check the voltages.
EDIT: Couldn't wait!
R230: 98.5 mV, 0.985 V, 9.85 V
R234: 9.659 V, 7.090 V (across the network: 16.75 V)
It seems that this pattern could all lead back to R234:
7.2Vref - X1ZERO_2 = +7.090 V (R234 voltage)
-10Vref - X1ZERO_2 = -9.85 V (R234 voltage)
-1Vref - X10ZERO = -0.985 V
-0.1Vref - X100ZERO = -0.0985 V
As a sanity check, I have attached the R234 before and after photos. Note that the camera was pointed in two separate directions.
Could the Vishay resistor have incorrect labelling? I thought I checked the resistances before installation.
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The readings are fairly stable, but at least they do change a bit and are thus actually measured and not just old data from memory.
I don't think that R234 is wrong - there were some separately measured voltages at R200 R201 that support that R234 is working OK. With a relacement resistor the numbers may be off a little, like maybe 100 mV, but not so much.
The numbers are more like a common offset of some 3 V for the raw ADC readings. We don't know exactly how the other test voltages are measurend, but this way it would make sense.
The question is a litlle if the offset does include a cal constant (maybe some factory cal) of some kind to effect the x1zero_2 number.
I tend to think there should be no such constant, as the other meters also show an offset of a few mV. That is more than the expected drift even over a long time for the amplifier. So if there would be a cal constant involved the zeros should be much better. For diagnostics it also makes sense to give raw reading with as little cal constants included as possible.
It is still a quite good values for the nominal values of the resistors - so the resistors seem to be rather high accuracy (e.g. better than 0.1%), but still not impossible.
So the offset is likely the reading of the ADC without any individually measured offset constant, just a common constant somewhere in the firmware.
The fast channel offset may be actually the difference to the precision channel. It would be really odd to have an offset at the amplifiers ouput only for the precision channel and not for the fast channel. A more ouput side offset would be more an ADC problem than an amplifier problem.
The R200/R201 measurements also supported that the amplifier was near zero with a shorted input.
It would than still be odd to give the other voltage readings also as raw values without offset correction, but who knows.
So the 10 V instead of 7 V would be because of the 3 V offset added and not a factor 1.4 in the scale factor.
A large offset at the ADC may also effect the linearity (also visible as DNL) of the ADC. For a quite check of the linearity ( more local, DNL like) one could use a slowly drifting votlage (like a large capacitor slowly discharged through a large resistor) and see if the measurend voltage gives a really smooth curve. The 1PLC data would be the more sensitive to the rundown part than higher PLC.
A 3 V offest at the ADC would also reduce the measurement range somewhat. So does the meter read OK to some +12 V or where even the upper limit is ?
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I just took another set of measurements on the R234. The attached picture indicates where the R234 voltages are coming from.
- the 7k3400 labelled side of the R234 measures a voltage of -7.09 V when the COM is applied to the middle lead
- the 10k000 labelled side of the R234 measures a voltage of +9.65 V when the COM is applied to the middle lead
With the shield and the cover removed, the following information is presented in the diagnostic mode: :scared:
X1ZERO_1 = -16.668 mVDC
X1ZERO_2 = +0.2954 mVDC
X10ZERO = +0.0295 mVDC
X100ZERO = +29.519 mVDC
7.2Vref = +1.0044 mVDC
-10Vref = -0.6897 mVDC
-1Vref = -0.0689 mVDC
-0.1Vref = -69.01 mVDC
INT_TEMP = +64.05 °C
This is insane. :-BROKE
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...
X1ZERO_1 = -16.668 mVDC
X1ZERO_2 = +0.2954 mVDC
X10ZERO = +0.0295 mVDC
X100ZERO = +29.519 mVDC
7.2Vref = +1.0044 mVDC
-10Vref = -0.6897 mVDC
-1Vref = -0.0689 mVDC
-0.1Vref = -69.01 mVDC
INT_TEMP = +64.05 °C
...
I restarted the unit and placed the shield on and the values/units have returned back to what they were before. The process was repeated several times. The values/units are not the same each time, especially for the 7.2Vref (see attached). The problem could be a loose connection near the voltage reference.
EDIT:
The unit seems to be indecisive about whether to use mVDC or VDC units. Notice that two zeros are missing from 7.2Vref when the units are in mVDC? This happens at random...
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Is it possible to bring the voltage map U001 in IDLE mode?
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C026 slows down some of the switches. ...
If you look at the schematic again, the patch slows down E_DCV only. Out of curiosity i removed the patch replacing R083 by a short. Now even with Autozero on the positive side looks clean. What a mess.
Concerning the bad display of internal voltages in diagnostic mode, for my instrument that issue disappeared after using the Reset command (first in diagnostic mode menu).
The MUX is in idle mode if you connect the control pin 27 to -18V. Before you need to separate it from the Guard buffer. Not easy unless you cut the pin. I pulled the pin from its hole to apply my mod.
Regards, Dieter
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Meanwhile i measured the channel resistance of two U001 JFETs and found 28 KOhm both for the DCV input and the 7.2V input. For comparison the MAX328 spec is 1 to 3.5 KOhm.
I think the MCU U300 outputs all necessary signals to replace U001 and U012 to U017 by 2x MAX328 without any glue logic. The channel select address bits are A=U300P26 B=U300P27 and C=U300P30. The two active high enable signals are E1=U300P24 and E2=U300P25. So it is about wiring in the two MAX328 correctly. For a test one can leave the old circuit in place and idle U001. Once the mod has been verified, the old circuit can go and the mod gets mounted in place of U001, with bodge wires to bring in the five MCU signals instead of the 14 enable signals of the hybrid. The footprint of the hybrid allows for DIL16 muxes with guard traces between their pins.
Regards, Dieter
Edit: Removed typo.
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I think the MCU U300 outputs all necessary signals to replace U001 and U012 to U017 by 2x MAX308 without any glue logic.
I don't quite understand why you try to replace a good hybrid MUX with a general purpose MAX308 with huge leakage current.
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Believe me, i also thought a lot about this question.
My answer is that all analog muxes nowadays use pairs of complementary mosfet channels. No more JFET muxes anymore. Also i think it will be a lot of work to educate that mux circuit into switching in an orderly fashion. But you can try, it is certainly possible. For example you can increase the break-before-make time interval by shifting the 2.5 V reference level of the comparators down to 1 V. Then you only need 16x RC delays in front of each comparator, e.g. 4K7 with 560 pF. And then you need to cure the control signal on pin 27, using another ten low leakage buffers.
With 2x MUX328 it becomes so easy. The MUX328 isn't general purpose, but especially designed for this application "metering front end". From it's datasheet i read that it's leakage starts at 1 pA at room temperature. That will increase somewhat at 38 or 39 °C inside the R6581T. As soon as i have a running prototype i will measure leakage current using the same method as above and report.
Regards, Dieter
Edit: Removed typo.
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The MUX308 isn't general purpose, but especially designed for this application "metering front end". From it's datasheet i read that it's leakage starts at 1 pA at room temperature...
No, it's one of the average performance MUX. MAXIM has another series of low leakage multiplexers: 326/327/328. I widely used them in impedance synthesizer, voltmeter - voltage calibrator, etc. The main problem is to minimize their parasitic thermoEMF.
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Sorry, that was a typo, will edit that. I ordered some MAX328 already a week ago and my prototype has those.
Here i have the existing logic. All this and the hybrid can be replaced by the MUX chips.
Regards, Dieter
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Replacing the JFET based MUX with MOFET based one is a rather big change. AFAIK there are a few meters with a broken MUX, that would warrant such an effort.
The JFET switching has its problems in the control and they are not easy to fix. Additional low leakage buffers for the other channels would be quite some effort - though only 3 (the divider, ohms sense hi and the smalles currents) would need to be really low leakage and GND would not need a buffer at all.
The low leakage version is the max328 (maxim) or MUX36S08 (Ti)
As there are only 11 signals needed (with no AC) one could consider 1 low leakage 4:1 mux for the 3 critical ones and one 8:1 for the less critical ones.
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Channel resistance 28K + protection resistor 9K = 37 KOhm times 200 pA of switching errors gives 7.4 uV, in other words 0.74 ppm of 10 V. In an 8.5 meter that's a serious problem. Nonlinearities of 0.5 ppm or so have been one of the major concerns with the R6581T. But i am not trying to sell anything, except i may have some spare hybrids soon..
Regards, Dieter
Edit: With the MAX328 mux the error calculation should be about 3.5K + 9K = 12.5 KOhm * 20 pA = 250 nV equivalent to 0.025 ppm of 10 V.
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Is the channel resistance really that higher. The 2N4117 is the highest resistance JFET I know of and this is more like 5 KOhms and thus 10 K for 2 in series. The FET resistance is linear and may show up higher if measured with a higher current.
The resistance at the input in combination with quite some input current can in deed be a problem. The current in AZ mode is not constant, but more like some spikes every 200 ms. So part of the transients can decay before the actual measurement and the zero reading phase see's another current spike. Worst case the input current effect would be nearly 4 times higher (the pulse effecting more the actual conversion and a similar effect for the zero reading) - at best, much of the switching spike has decayed before the conversion. There is quite some delay in the AZ mode and thus a chance that much of the input current spike as decayed, at least with a lower impedance signal source.
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With Keithley 2100 I got a MUX ON-resistance of about 18 kOhm.
As is well known, the R6581 is a successor to the older (T)R687X DMMs in which the multiplexer consisted of discrete sub-pA leakage 2N4117A FETs on a ceramic base. R6581 is not the only one that uses a hybrid chip. R6561 6.5-d nanovolt-DMM uses the same THD series MUX (Takeda Hybrid Device?), and the newest 7480T uses the similar MUX topology with SMD FETs on a ceramic base.
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So the MUX hybrid can be respinned by using MMBF4117, which is still available, is it that what you're saying? Or is the SOT23 version using something different?
-branadic-
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Meanwhile i replaced the MUX U001 and its helpers U012 to U017 by 2x MAX328. The mod worked right from the start.
As expected it behaves much more like an ideal switch. Leakage with "Autozero off" remains within -10 pA to 0 pA over the whole input voltage range -12 V to +12 V. Now the instrument input exhibits a resistive behaviour of about 3.5 TOhm.
With "Autozero on" the behaviour is also resistive and i can now test at -11 and -12 V input voltage. The measurement can be explained by charge pumping the input voltage into a capacitive load of 18 pF Now effective input resistance is 21 GOhm. If one can precharge the amplifier input to compensate consumption, the residual nonlinear leakage current will be less than 10 or 20 pA once more (except below -10 V). I will try and run the MAX328 from -18 V instead of -15 V to improve that.
The 2x MAX328 will remain. After heat-up i ran an external calibration "zero front" to remove a 3 uV offset. The instrument runs about 3 °C cooler now. There is a bodge wire to let the LM35 temperature sensor run from 5V instead of 15 V.
Regards, Dieter
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The max328 should have some additional unused channels. AFAIK the AZ mode switching is quite slow and it chould give enough time to add a precharge phase, at least for the main DC input. This would likely mean sending the control signals though some µC or logic and an unused input for the extra precharge phase. It may be still possible to implement thus with standard logic (set the lowest bit to 0 for some time, if the other 2 control bits are low).
The precharge for Ohms sense H would need an extra low bias buffer but it looks like the control lines would be the same.
A relatively ohmic 20 Gohm input impedance is not ideal, but still not that bad.
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Yes, the 20 GOhm cause roughly the 5 % tolerance in the specs for a 1 GOhm measurement.
There are four unused MAX328 inputs. Currently they are wired to ground. So i just need some time to do it.. For the logic it could be a small CPLD.
Regards, Dieter
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I performed some R6581T measurements (shielded, HI power, AZERO OFF, 100 NPLC, NULLED, external temperature: ~ 23.5 °C) today on a few precision resistors:
EDIT: Branadic recommended that I correct the significant figures for the measurements to reflect the R6581T.
CADDOCK USF370-1.00M-0.01%-5ppm
1000k range: 1.00001125 MΩ (assuming that it is measured correctly; internal temperature: 42.6 °C)
10M range: 1.000011 MΩ (0 ppm difference; internal temperature: 42.6 °C) measurement is the same as the 1000 k range
100M range: 1.00005 MΩ (35 ppm difference; internal temperature: 42.6 °C)
1000M range: 1.0025 MΩ (2449 ppm difference; internal temperature: 42.6 °C)
CADDOCK USF370-10.0M-0.01%-5ppm
10M range: 10.000268 MΩ (internal temperature: 43 °C)
100M range: 10.00116 MΩ (internal temperature: 43 °C)
1000M range: 10.0270 MΩ (internal temperature: 43 °C)
MPX 20 MΩ (https://www.eevblog.com/forum/metrology/mpx(mrh)-resistors/msg3544454/ (https://www.eevblog.com/forum/metrology/mpx(mrh)-resistors/msg3544454/))
100M range: 20.00077 MΩ (internal temperature: 42.5 °C)
1000M range: 20.0425 MΩ (internal temperature: 42.5 °C)
After performing these measurements, I decided to go into the diagnostic mode and check the values.
Oddly, all values were zero. When I checked the internal temperature, I got a reading of 71 °C (this cannot be right).
I swept through the reference values again and the units changed to °C, instead of voltage... The magnitudes were all zero.
Then I applied the reset and the reference values returned to the ones previously reported. This is very bizarre and likely a problem. Could this be a sign of artifacts in the memory or firmware?
Out of curiosity, I measured an Ohmite RX-1M1007FE (1 GΩ, 1 %) with the R6581T (shielded, HI power, AZERO ON, 100 NPLC, NULL OFF, external temperature: ~ 23 °C):
1.0010777 GΩ (well within tolerance; internal temperature: 42.6 °C)
A mean value of 1.003 GΩ was estimated with 3 separate uncalibrated instruments on May 7th. The recent measurement with the 'calibrated' R6581T seems fairly representative of the nominal resistance.
The AZERO was turned OFF and after 26 minutes, I remeasured the same resistor:
R6581T calibration data (external temperature: 23 °C):
1.0013695 GΩ (well within tolerance; stable reading for at least 20 minutes, internal temperature: 42.6 °C)
Apart from some basic voltage probing and using the reset function, I have done nothing to the R6581T mainboard. These were the results from the calibration performed during September:
1000.01150 kΩ (742A-1M) => 1000.00162 kΩ (10 ppm difference)
10.000048 MΩ (742A-10M) => 9.998563 MΩ (148 ppm difference)
100.00677 MΩ (9334A-100M) => 99.86580 MΩ (1410 ppm difference)
1000.0890 MΩ (9334A-1G) => 984.1064 MΩ (15981 ppm difference)
The discrepancies that were reported previously are not as great anymore ... :wtf:
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MPX 20 MΩ (https://www.eevblog.com/forum/metrology/mpx(mrh)-resistors/msg3544454/ (https://www.eevblog.com/forum/metrology/mpx(mrh)-resistors/msg3544454/))
100M range: 2.0000770 MΩ (internal temperature: 42.5 °C)
1000M range: 2.0042533 MΩ (internal temperature: 42.5 °C)
Maybe all the same 20,000077 megohms?
Or a 2 MΩ resistor?
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Sorry, serg-el. I meant 20 MΩ. I copied from scientific notation and forgot to carry the digit.
EDIT:
While we are here, I have remeasured the 1 GΩ Ohmite resistor again and it is reading 1.0017349 GΩ with AZERO ON (after 3 hours from the last measurement).
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The Ohmite RX-1M1007FE has been measured overnight with AZERO ON and it may be that the reason why the measurement has been drifting is because of a change in external temperature (24 °C -> 23 °C). The temperature plotted is the internal temperature of the R6581T. A power-law regression was used to represent both relationships to aid the eye, even though the model might not necessarily be valid.
Both the instrument and the passive component are influenced by temperature changes. The temperature coefficient of the Ohmite is supposed to be quite good (<< 50 ppm/°C). It seems likely that the Advantest is being influenced the most by temperature. The specifications indicate a 1000 ppm/°C for the 1 GΩ range. The total drift is about 1100 ppm overnight, which seems to make sense if a 1 °C external temperature change occurred. From this perspective, I'd say that the Advantest is functioning 'normally' on the 1 GΩ range?
This begs the question what has caused this range to work normally again? :-//
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The link tests a resistor in this series and shows a temperature coefficient of 600ppm/°C
https://ampnuts.com/everybody-lies/
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The link tests a resistor in this series and shows a temperature coefficient of 600ppm/°C
https://ampnuts.com/everybody-lies/
That is unfortunate. I was hoping to use RX-1M's as a performance indicator.
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The link tests a resistor in this series and shows a temperature coefficient of 600ppm/°C
https://ampnuts.com/everybody-lies/ (https://ampnuts.com/everybody-lies/)
That is unfortunate. I was hoping to use RX-1M's as a performance indicator.
On 2021-03-08, I measured the same RX-1M 1 GΩ resistor from 150 V to 1000 V with an R8340 and got a consistent value of 1004 MΩ. The R6581T seems to indicate a similar value.
Measuring a Nicrom 1 GΩ 400.5 Series resistor (http://www.high-voltage-resistors.com/high-voltage-resistors/high-voltage-resistors-400.pdf (http://www.high-voltage-resistors.com/high-voltage-resistors/high-voltage-resistors-400.pdf)), I get a mean resistance value of 998.3050 MΩ @ 42.6 °C internal temperature, which is very close to a measured value of 998.39 MΩ from 2021-03-14 with an R8340 ultra-high resistance meter when swept from 50 V to 750 V. The Nicrom 400.5 Series datasheet claims "0.1 %, 10 ppm/°C", but I very much doubt their claims.
The Advantest seems to be consistent with another instrument (R8340) at the 1 GΩ range. I will keep an eye on the Nicrom resistor today and see how it compares to the RX-1M. Both datasheets seem to have obnoxious claims about performance.
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The comments in that russian page are a bit polemic, though. That was a 500 GOhm part and it showed a nice temperature cycle with little hysteresis. In metrology it is normal procedure to numerically correct known TC, but you have to determine it first. If you read the text, he cleaned the part before testing it, while Ohmite recommended gloves, not cleaning.
Anyway, in your case the conclusion about the R6581T resistance measurement at 1 GOhm having a TC of about -1000 ppm/K appears valid. If you have a means of heating your test resistor without touching it, you can try to check the < 50 ppm/K spec.
Regards, Dieter
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I don't think the R6581 is really the right instrument for the very high value resistors. Such resistors are better measurend in a different mode, with a fixed and often higher voltage and than measuring the current. This can be done with some electrometers, though they have a limited accuracy due to there internal stability.
The AZ mode can have some internal parallel resistance. The charge pumping on the amplifiers input acts a little like some parallel resistance. The difficulty is that this is pulsed current and with some waiting time only a part of this is included. The settling depends on the resistor and external capacitance.
The cable capacitance can make a difference and slow down the recovery. The ACAL part seems to use the AZ mode, but with internal resistors and thus little capacitance and thus more effective waiting. The effective parallel restance from charge pumping would make the AZ mode slightly nonlinear. I don't think the meter takes this into account. This would be in the ACAL procedure and normal use.
Locically the non AZ mode would make more sense for the highest resistors, but there ACAL may be wrong. The 1 PLC AZ mode would be definitely a bad idea with high ohms.
There are quite a few settings to effect the ohms readings. The extra capacitor from the "protection" can be such a factor.
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I think the Advantest is not having a problem with leakage anymore? :-//
Something has seriously changed since the calibration data (September) and the only thing I have done is voltage probing around critical resistors and a few resets from the diag menu when things got funnier than they already are with the reference reports.
Attached is a simple comparison of a Nicrom 400.5 (0.1%, 10 ppm/°C, 1 GΩ) and an Ohmite RX-1M (1 %, 50 ppm/°C, 1 GΩ) resistor as a function of the internal temperature of the R6581T. The 4-wire Kelvin connection was done with a Keysight 11059A Kelvin probe set inside a large styrofoam box with shielding. Not the greatest test setup, but it did the job. Vibrations in the apartment likely caused the variations in the plot. The instrument was not turned off or changed between swapping the resistors. AZERO and 100 NPLC were on for the entire time. The room temperature remained around 23 ± 2 °C at most. The room temperature increased slightly from 23 to 24 °C today. The combined TCR of the Nicrom and the Advantest is pretty low over a 10-hour window.
When I first received the R6581T after the calibration, I checked the Ohmite and it was reading around 985 MΩ a month ago. The reading was similar to what the calibration lab reported. Now it is reading 998.9 MΩ, which is close to what I determined using an R8340 a few months ago. All my resistors have been handled carefully with tweezers and have always been kept in the packaging they arrived in or on clean printer paper between uses.
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When trying to implement precharge for the MAX328 input MUX, i understood how the instrument can generate reverse current at the input - opposite to resistive behaviour. That current may be generated by the guard driver and couples via the capacitance between guard and instrument input.
If the guard driver were perfect, input capacitance of the input amplifier would be zero and no precharge needed.
With the guard driver off, e.g. guard connected to Gnd, the amplifier input has a high capacitance and with Autozero the instrument will have a low input resistance (charge consumption).
With precharge and the slow guard driver the guard driver injects charge into the instrument input. This was observed with a precharge interval of 5 usec. The R6581T input amplfier precision channel needs about 100 usec to settle. So precharge takes away charge consumption and after that charge injection by the guard driver happens.
The instrument pauses about 7 msec after switching the input MUX before starting ADC conversion. Now a 1 GOhm times the 330pF "Protection" capacitor gives a time constant of 330 msec, so the pause is a bit short.
Regards, Dieter
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I remember seeing a selfmade discrete MUX for the 6581, don't remember where I found this image though...
-branadic-
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To a first appriximation the charge pumping action without precharge would act a little like an resistor parallel to the input. At first sight this looks a bit odd, but at least for the ACAL part, that seems to use the AZ mode, the extra resistance would be just in parallel to the shunt / 10 M divider resistor. That is used to measure the current sources. So for the ACAL part that extra input current would not be a principle problem. The extra input current from the gate current would still be a problem, as the -1 V point is likely not effected, but the -10 V usually is.
For the normal measurement the AZ mode would be bad without a precharge phase: some 20 Gohms in parallel would give a nonlinear error.
Ideally the SW could turn off Azero, even though the ACAL part was done with AZ. The calculated current from the ACAL part should also apply to the non AZ mode.
I don't think it helps very much to looks at the drift or TC. The resistors are not really that stable.
It may help to check if the same reistor measures the same in 2 ranges (e.g. 100 M in the 10 M and 100 M range. Here the non AZ case should be the the slightly better choice.
For the AZ mode one could check the linearity - chances are that the linearity is not that good anymore in the Gohms range (e.g. compare 1 G and 2x1 G parallel).
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When connecting -18 V instead of -15 V for the MAX328 i found that i had -19.3 V - a little to much for a MAX328. In the power supply board there is a zener and a 2SA1015 and i found the zener to be 20 V nominal. Replaced it by an 18 V zener i found and get -17.3 V, that's better. The idea is to improve input leakage at -8 to -12 V that i showed a week ago.
I think with a little more research the MAX328 mod can pave the way for a R6581T that works equally well with and without Autozero, and over the full -12 to +12 V range. It will be a replacement module for the MUX hybrid that has the 2x MAX328, a XC9536XL for timing control and an OPA140 as a precharge buffer for the OHMS_HI input. The existing DCV buffer gets used as precharge buffer for DCV input.
Regards, Dieter
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The image branadic posted shows desperate attempts to fix an instrument with design errors by replacing parts. What branadic calls a discrete MUX appears to me like a custom made replacement part with the exact 14 JFET switches and the 28 resistors of the original hybrid, except the replacement will suffer from thermal EMF more than the original. I guess the person wanted to check whether the original hybrid was damaged. But that couldn't solve the problems caused by bad design. Of course it's a bit late to correct the design problems of the R6581T. Yet one can try and mod the own instrument(s) to work as intended.
.
Above somebody proposed to take the guard signal from the fast channel or from the input of the amplifier. Now, while looking at Mickle T.s schematics, i think the fast channel cannot be used for this and there seems to be another nasty design problem: As the divider network R100 is reused for both channels, during precision measurements the fast channel amplifier runs without feedback. So U102 can output large random signals.
Regards, Dieter
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Using the fast channel for the guard would in principle be possible, but would require additional switching at the feedback, to run the fast channel as x1, when not in use. Even with a faster amplifier there would still be a limited slew rate.
In theory one could pic up the guard from the source side of the FETs, e.g. the emitter of Q111 or Q107 with some added offset shift. This signal will also follow the input, though with a little more error.
The more obvious part, that was tied before was to speed up U107. However this did not work so well - maybe the low U107 is part of the compensation and the diodes between the inputs are needed.
The strange point is that the R6581 already uses some low leakage CMOS switches (MAX327) in other places. The control of the MUX also is kind of compatible with a MUX chip. So it is a bit odd that they still used the JFET switching design when better parts where avialable. Chances are the JFET mux is a carry over from the predecessor.
It would have been not so difficult to avoid many of the problems with the input MUX. Of cause one is always smarter afterwards, as one can learn from the mistakes made. Here that is a lot to learn.
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Measurement setup: 2 pcs of DC-Cal Mini (both on 10V DC range); Solartron 7081-LTZ, checked to <0.1 ppm INL by four independent ways; 1M, 10M and 100M precision wirewound resistors (MRH).
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For the 1 V transfer the 6581T behaves normal with a relatively good match at -1 V and some error at +1 V. The ACAL procedure is done at the -1 V point and this better matching expected there.
The case with the 6581D is a bit odd: as the -1 V is off and +1 V is good. The expected way is the other way around. 3 ppm difference is quite a bit, though probably still in spec.
For the ohms test I am a bit surprized that there is not much of a difference between the AZ and non AZ mode. It the meter actually doing AZ in the high ohms, or is it possibly ignoring the setting and doing non AZ measurements ?
The difference seems to be still in specs, though only barely for the 10/100 M step.
The point's at 1/10 the FS are used for ACAL and some errors in the ACAL procedure would thus not show up here. Is it possible to do a linearity test for the high ohms, e.g. with 2 x 100 M measurend separately and in parallel ? The effect of a not so great input impedance due to charge pumping and the missing precharge phase would cause a linearity error from the parallel input impedance.
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Today i reprogrammed the CPLD to extend the precharge period from 5 usec to 150 usec (1800 clock cycles), so it covers the slow guard signal. The scope image shows the delayed LSB address bit of the MUX that selects LO or the precharge buffer while 0 and DCV when going to 1. The other trace is the guard signal from the precision channel. The leakage measurement shows Autozero mode now with an effective input resistance of 1.1 TOhm between -10 and +10 V. So i managed to get rid of 98 % of charge injection.
There is some more work to do at input voltages between -11 and -12 V. The precision channel of the input amplifier runs into some limit there, maybe caused by D115, with a recovery time of 500 usec or so.
Regards, Dieter
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This allready looks very good. D115 ( in the negative supply of the ouput OP) should not go into reverse at any time it is more there to lower the supply for the OP. The slightly higher input current from -11 to -12 V is not that bad.
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Above i mentioned that the unused channel of the input amplifier runs wild (without feedback). Probably they tried to limit the damage by working on the clipping levels, adding D112, D113, D115, D110, D120, R117 and R160. Some or all of those parts could go if one adds more switches to provide feedback for the unused channel. You can see from the scope image that the precision channel clips near -12 V. Without D115 that could be -12.7 V or so.
Regards, Dieter
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Hi-Ohms intercomparing update:
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Both amplifiers get the same input signals. So unless the offset of both channels is really identical, the unused channel would run to one extreme at the output and stay there. With limited CMRR and dirft especially from the fast channel there is a slim chance that this can change at some point. The more likely case is to have the amplifier all the time at the same limit.
I don't think the limited supply voltage is for the non active channel, as the ouput only goes to the open switch. Even the active channel should heve no problem with the full -15 V supply, as the fast channels seems to have the full -15 V. It could be a thing during turn on with the different supplies coming up one after the other.
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Are you saying i am repeating this without having done a measurement? Save your effort.
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Translated and compiled measurement's speed tables from R6581 user manual. It's some kind of "delays-from-hell" >:D
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The measurement times suggest that resistance from 10 Mohms on are allways without auto zero. At least the get the same speed.
This makes absolute sense.
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Above i reported that i measured the R6581T to pause about 7 msec before each 10 PLC ADC run in Autozero mode, so that gives 2x (200+7) = 414 msec - close to the 413 msec number in the table.
Regards, Dieter
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With shorter integration the waiting time seems to get shorter a little (e.g. some 2 ms at 1 PLC - could be asymmetric with less time at the zero signal). It still should be OK with the 150 µs precharge.
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Here's 03.
With this link, I was able to write the firmware to the AT27C4096 chip and my unit now reads "R6581D" and "Ver.A03". When the reprogrammable chips arrive, I will experiment a bit more.
There was no change to the diagnostic mode outputs
x1Zero_1 = -0.0167 VDC (10 V range)
x1Zero_2 = +2.9543 VDC (10 V range)
x10Zero = +295.254 mVDC (1000 mV range)
x100Zero = +29.435 mVDC (100 mV range)
7.2Vref = +10.04475 VDC (10 V range), actual: +7.07 V
-10Vref = -6.88804 (10 V range), actual: -9.83 V
-1Vref = -689.901 mVDC (1000 mV range), actual: -0.984 V
-0.1Vref = -69.106 mVDC (100 mV range), actual: -0.098 V
Int_temp = +70.5 °C, actual temperature is much less than this value
10mA = -6.909 mADC (10 mA range)
1000uA = -690.64 uADC (1000 uA range)
100uA = -69.082 uADC (100 uA range)
10uA = -6.905 uADC (10 uA range)
1000nA = +1967.28 nADC (1000 nA range)
100nA = +196.73 nADC (100 nA)
10nA = +285.41 nADC (100 nA)
I still have the same readings as before. Yesterday, I checked all the voltages outlined by MickleT's electrical schematics for the ADC and there were no outliers that I could tell.
Maybe the next thing I should try is the INT CAL to check if that does anything.
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shodan, i thought about buying one of these:
https://www.ebay.de/itm/282785079698?hash=item41d74de192:g:L9cAAOSwRWRbMWBv (https://www.ebay.de/itm/282785079698?hash=item41d74de192:g:L9cAAOSwRWRbMWBv)
What do you think?
Concerning the offsets observed by leighcorrigall: The x1zero_2 offset is large, about 3 V. For me the fact that x1zero_1 is small and x1zero_2 is large indicates that the problem should not be in the ADC. So i would check again around U100, where it selects one of the two preamplifier channels. I would do it in diagnostic mode. Hook a meter to the ADC input (e.g. one end of R150) and measure the change when switching betweenb x1zero_1 and x1zero_2. I remember you tried something like that before, but you have to repeat. It happens to all of us.
To be honest another possible cause may be a bad U214. That MUX configures the ADC for fast and precision modes. ADC configuration also depends on U100/4. I would try and use a scope to find out which one is bad. Optical inspection first, maybe some solder where it should not be..
If you think diagnostic mode is affected by calibration, you can connect a copper wire over all five input terminals (except the one for current) and run "external cal zero front".
Regards, Dieter
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Thank you, Dieter.
I think you could be right. Based on MickleT's excellent schematics:
U100 is a DG442DY https://datasheets.maximintegrated.com/en/ds/MAX326-MAX327.pdf (https://datasheets.maximintegrated.com/en/ds/MAX326-MAX327.pdf)
Functionality test: change the integration time
U214 is a DG442DY
Functionality test: change the integration time
I will test this tonight :-+
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Concerning the offsets observed by leighcorrigall: The x1zero_2 offset is large, about 3 V. For me the fact that x1zero_1 is small and x1zero_2 is large indicates that the problem should not be in the ADC. So i would check again around U100, where it selects one of the two preamplifier channels. I would do it in diagnostic mode. Hook a meter to the ADC input (e.g. one end of R150) and measure the change when switching between x1zero_1 and x1zero_2. I remember you tried something like that before, but you have to repeat it. It happens to all of us.
To be honest another possible cause may be a bad U214. That MUX configures the ADC for fast and precision modes. ADC configuration also depends on U100/4. I would try and use a scope to find out which one is bad. Optical inspection first, maybe some solder where it should not be.
...
Regards, Dieter
In diagnostic mode using a handheld DMM:
U100 - GD442DY - good condition visually
V+ & V- = 36.6 V (less than max)
V+ & GND = 21.7 V (high)
V- & GND = 14.5 V (normal)
x1Zero_1 (fast mode)
U100/1 (pins 2 & 3) = 12.59 V (OFF)
U100/2 (pins 6 & 7) = 0.003 V (ON)
U100/4 (pins 14 & 15) = 0.084 V (ON?)
x1Zero_2 (precision mode)
U100/1 (pins 2 & 3) = 0.003 V (ON)
U100/2 (pins 6 & 7) = 14.09 V (OFF)
U100/4 (pins 14 & 15) = 1.490 V (OFF)
U100 seems fine. I have not tested U100/3 because I do not know how.
U214 - GD442DY - good condition visually
V+ & V- = 30 V (less than max)
V+ & GND = 15 V (normal)
V- & GND = 14.9 V (normal)
x1Zero_1 (fast mode)
U214/1 (pins 2 & 3) = 0 V
U214/2 (pins 6 & 7) = 0.002 V
U214/3 (pins 10 & 11) = 0 V
U214/4 (pins 14 & 15) = 0 V
x1Zero_2 (precision mode)
U214/1 (pins 2 & 3) = 0 V
U214/2 (pins 6 & 7) = 0.068 V
U214/3 (pins 10 & 11) = 0.034 V
U214/4 (pins 14 & 15) = 0.034 V
Maybe I need to use a scope for U214.
These are the results for resistance mode (open 4-wire in the 10k range) I produced:
U100 - GD442DY
1 μs
U100/1 (pins 2 & 3) = 25 V (OFF)
U100/2 (pins 6 & 7) = 0.028 V (ON?)
U100/4 (pins 14 & 15) = 0 V (ON)
100 PLC
U100/1 (pins 2 & 3) = 0.022 V (ON?)
U100/2 (pins 6 & 7) = 20 V (OFF)
U100/4 (pins 14 & 15) = 0.68 V (OFF)
U214 - GD442DY
1 μs
U214/1 (pins 2 & 3) = 0 V
U214/2 (pins 6 & 7) = 0.07 V
U214/3 (pins 10 & 11) = 0.04 V
U214/4 (pins 14 & 15) = 0.05 V
100 PLC
U214/1 (pins 2 & 3) = 0 V
U214/2 (pins 6 & 7) = 0.07 V
U214/3 (pins 10 & 11) = 0.04 V
U214/4 (pins 14 & 15) = 0.05 V
Since the voltages were low for the U214 measurements and it was unclear whether the switches were ON/OFF, I tried in VDC mode (10 V range) while applying +10 V with a Keithley 238.
U214 - GD442DY
1 μs
U214/1 (pins 2 & 3) = 0.0 V
U214/2 (pins 6 & 7) = 0.037 V
U214/3 (pins 10 & 11) = 0.002 V
U214/4 (pins 14 & 15) = 0.001 V
100 PLC
U214/1 (pins 2 & 3) = 0.001 V
U214/2 (pins 6 & 7) = 0 V
U214/3 (pins 10 & 11) = 0.018 V
U214/4 (pins 14 & 15) = 0.018 V
Not much difference in magnitudes. Maybe the U214 is dead.
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When looking through your data, to me the most suspicious line would be
U100/4 (pins 14 & 15) = 1.490 V (OFF)
Maybe the slope amplifier U207 has a problem that shows up only in precision mode. In fast mode that amplifier runs without gain (G ~ 1 as determined by R219 and R137). When i measure TP202 in diagnostic mode with x1Zero_1 i get -0.02 V, with x1Zero_2 it is -0.37 V. In DCV mode with shorted inputs, i got
-3.2 mV at 10 usec,
-35 mV at 200 usec,
-0.18 V at 2 msec and
-0.37 V at 10 PLC integration time.
As the comparator threshold is at 0.15 V, the 1.490 V appears to be off scale. Notably it is almost exactly half the offset you are looking for.
Regards, Dieter
Edit: Correkt unit for 2 msec measurement
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It is normal that the votlages at the U214 switches are small. U214/1 is in series with a capacitor, so not much DC votlage expected.
U100 is likely not the culprot anyway as the DMM is essentially working and not totally failing. If U100 unit 1 or 2 is broken the expected failure would be more dramatic (like zero ouput). A failure of U100/4 would likely be more subtile, like poor DNL / INL.
The votlage measurend over U100-4 is effected by the average integrator voltage. This voltage does change just around 0 (e.g. between some -10 mV and +10 mV). So depending on amplifier offest the reading at 0 input can differ there. Just at zero the run-up patterns change between 2 regimes. So a different reading there may not be such a bad sign. It is still a point to look at.
Even with a scope it would be difficult to see directly if the switches U214 actually work. It would be more indirectly from lookig at the waveforms at the ADC.
At least I don't know what the 2 zero offset are exactly measuring. As this is for debugging / self test I would expect little math and thus directly the reading with a zero input, and thus without any offset as a cal constant.
3 V is a lot of offset. With so much offset at the ADC the DMM should have trouble with voltages higher than some +10 V.
A scope could indirectly help to get an idea if the ADC actually reads some 3 V or more like 0 V from the PWM ratio at U301-2 ( = HC74 flip flop to drive FET switches).
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Maybe the slope amplifier U207 has a problem that shows up only in precision mode. In fast mode that amplifier runs without gain (G ~ 1 as determined by R219 and R137). When I measure TP202 in diagnostic mode with x1Zero_1 I get -0.02 V, with x1Zero_2 it is -0.37 V. In DCV mode with shorted inputs, I got:
-3.2 mV at 10 usec,
-35 mV at 200 usec,
-0.18 mV at 2 msec and
-0.37 V at 10 PLC integration time.
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Thanks for walking me through this process, dietert1. It is a great learning experience.
Diagnostic mode
TP202 & TP40 (GND) = 0 V
x1Zero_1
TP202 & TP40 (GND) = -0.022 V
x1Zero_2, x10Zero, & x100Zero
TP202 & TP40 (GND) = -0.342 V
shorted DCV input (AUTO range)
-0.003 V @ 10 μs
-0.031 V @ 200 μs
-0.165 V @ 2 ms (inconsistent with your measurement)
-0.34 V @ 10 PLC
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As the comparator threshold is at 0.15 V, the 1.490 V appears to be off the scale. Notably, it is almost exactly half the offset you are looking for.
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How do I measure the comparator threshold? :)
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The comparator threshold is at pin 3 of U308 (the comparator).
It may be worth checking the supply of the comparator too. I faintly remember that some boards had a problem with fitler cap in that area that sometimes is installed with wrong polarity.
Chances are the voltage at TP202 may change quite a bit when applying a voltage to the input of some +-100 mV or so, but not much further change at +-1 V.
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I think the slope amplfier output voltages agree.
Next thing i would do is place a short across U214/1 (pins 2 to 3) while in x1Zero_2 diagnostic mode and see whether the offset vanishes. This is a better test whether U214/1 works as intended. One can do it with a screw driver or probe tip.
Next i would check the control signals of the lower current sources, "Rundown sources". If one of them is stuck (always on), that will certainly affect long integration time during precision mode much more than short integration times in fast mode.
Also one should check substrate voltage -3.3 V at output of U204/2, net "B".
Regards, Dieter
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... short across U214/1 (pins 2 to 3) while in x1Zero_2 diagnostic mode and see whether the offset vanishes. This is a better test of whether U214/1 works as intended. One can do it with a screwdriver or probe tip.
I tried to do this a few times. The voltage remains 2.95438 DCV on the 10 V range.
Also one should check substrate voltage -3.3 V at the output of U204/2, net "B".
I checked all the voltages presented on the ADC page a few days ago. They all seemed within a reasonable tolerance.
MOSFET SUBSTRATE B
U204/2 (pin 7 & GND4): -3.27 V
Next, I would check the control signals of the lower current sources, "Rundown sources". If one of them is stuck (always on), that will certainly affect long integration time during precision mode much more than short integration times in fast mode.
This will take a lot more time and care, but I will keep this in mind. To test the FETs, would I switch between 1 μs and 10 PLC?
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Apologies, but I am uncertain if I am interpreting your suggestion correctly. This is what I tried, Kleinstein.
The comparator threshold is at pin 3 of U308 (the comparator).
It may be worth checking the supply of the comparator too. I faintly remember that some boards had a problem with filter caps in that area that sometimes is installed with the wrong polarity.
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U308 is a HC164 manufactured by Texas Instruments https://www.ti.com/lit/ds/symlink/sn74hc164.pdf?ts=1636338788446 (https://www.ti.com/lit/ds/symlink/sn74hc164.pdf?ts=1636338788446). I do not know where it is located in MickleT's schematics. The IC is located near J300, which is close to the shielded transformer.
U308 pin 3 to GND5 (TP308): +5.04 V
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Chances are the voltage at TP202 may change quite a bit when applying a voltage to the input of some +-100 mV or so, but not much further change at +-1 V.
TP202 & GND4 (TP401):
KE238 voltage applied to the input of the R6581T (10 PLC at 10 V range)
+0.9 V: -0.339 V to -0.342 V (min and max values)
+0.5 V: -0.339 V to -0.342 V
+0.1 V: -0.339 V to -0.342 V
0 V: -0.339 V to -0.342 V
-0.1 V: -0.352 V to -0.362 V
-0.5 V: -0.359 V to -0.365 V
-0.9 V: -0.360 V to -0.366 V
KE238 voltage set to the input of the R6581T (1 μs at 10 V range)
anything between -0.9 V and +0.9 V: -0.000 V (no noise)
KE238 voltage set to the input of the R6581T (200 μs at 10 V range)
anything between -0.9 V and +0.9 V: -0.034 V (minor noise on the last digit)
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Apologies, but I am uncertain if I am interpreting your suggestion correctly. This is what I tried, Kleinstein.
The comparator threshold is at pin 3 of U308 (the comparator).
It may be worth checking the supply of the comparator too. I faintly remember that some boards had a problem with filter caps in that area that sometimes is installed with the wrong polarity.
...
U308 is a HC164 manufactured by Texas Instruments https://www.ti.com/lit/ds/symlink/sn74hc164.pdf?ts=1636338788446 (https://www.ti.com/lit/ds/symlink/sn74hc164.pdf?ts=1636338788446). I do not know where it is located in MickleT's schematics. The IC is located near J300, which is close to the shielded transformer.
Sorry for the confusion - U208 is the comparator :palm:.
For the 1 µs case the ADC is likely most of the time in the analog Zero phase (U213/1 closed) and for this a votlage near zero is correct. So I would see the zero reading there as a good sign.
The 200 µs case could be just a mixture of zero phase and actual run-up. So hard to make anything from that reading.
The change in DC voltage at TP202 is smaller than I though, but one can see that the 0 point is still more like the positive voltages. There is some jump between the 0 and -100 mV point. This is kind of normal. Depending on the offsets the jump can be also just at the other side of zero.
As far as I remember his jump should be at the point were the refrence on/of ration during run-up is 50:50. So from this point the ADC seem to work correctly and should not show a large offest. This makes me suspect that it could be a kind of software thing with some offset constant included. This may mean that the fast amplifier could be actually the one that is off. I don't kown if this was already tested: is the amplifier ouput in the fast mode actually near zero with the input shorted ?
I don't expect it to be off by much, but is the ouput of U504 (OP07 as GND buffer for the gain divider) actually near zero. A significant offset there could also cause unusual cal constants.
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Sorry for the confusion - U208 is the comparator :palm:.
For the 1 µs case, the ADC is likely most of the time in the analog Zero phases (U213/1 closed) and for this a voltage near zero is correct. So I would see the zero reading there as a good sign.
The 200 µs case could be just a mixture of zero phase and actual run-up. So hard to make anything from that reading.
The change in DC voltage at TP202 is smaller than I thought, but one can see that the 0 point is still more like the positive voltages. There is some jump between the 0 and -100 mV points. This is kind of normal. Depending on the offsets the jump can be also just at the other side of zero.
As far as I remember this jump should be at the point where the reference on/of ratio during run-up is 50:50. So from this point, the ADC seems to work correctly and should not show a large offset. This makes me suspect that it could be a kind of software thing with some offset constant included. This may mean that the fast amplifier could be actually the one that is off. I don't know if this was already tested: is the amplifier output in the fast mode actually near-zero with the input shorted?
I don't expect it to be off by much, but is the output of U504 (OP07 as GND buffer for the gain divider) actually near zero. A significant offset there could also cause unusual cal constants.
Not a problem, Kleinstein! I would have a lot more difficulty troubleshooting this instrument without you. :)
It would also be good of me to know German so that I could better communicate with you.
The U504 component is located in the front where the relays are but I do not know if there is a schematic for it because I couldn't find it anywhere.
Please let me know if this is correct:
1) Short the VDC front and set the integration time to 1 μs 200 μs at the 10 V range.
2) Apply DMM test leads to GND5 and pin 6 of U504 to test the offset.
With this setup, I measured 0.000 V at the U504 OUT.
As a continuation, I applied the GND5 to the following points and measured:
OFFSET N1 ( pin 1 ): 15.00 V
OFFSET N2 ( pin 8 ): 15.00 V
Alternatively, I connected one lead of the DMM to TP202 and performed the same test ( step 1 ) on U504:
OUT ( pin 6 ): 0.034 V
OFFSET N1 ( pin 1 ): 15.04 V
OFFSET N2 ( pin 8 ): 15.04 V
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... U208 is the comparator ...
U208 (MAX903) has the following voltages when compared to GND4:
VCC (pin 1): +4.82 V
IN- (pin 3): +0.152 V
VEE (pin 4): -4.82 V
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...
set the integration time to 1 μs 200 μs at the 10 V range.
...
I realized I set the integration time to an intermediate value when measuring the U504.
This time, I set it to 1 μs while shorting the front inputs and measuring from GND5:
OUT ( pin 6 ): -0.000 V
OFFSET N1 ( pin 1 ): 15.00 V
OFFSET N2 ( pin 8 ): 15.00 V
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...
-0.18 mV at 2 msec and
...
...
-0.165 V @ 2 ms (inconsistent with your measurement)
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So far, this measurement seems to be the only discrepancy found when compared to dietert1.
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That discrepancy at 2 msec integration time no longer exists as i corrected the wrong unit.
Using the scope i found that x1Zero_1 is fast mode with 100 usec integration time and about 10 usec runup cycle time while x1Zero_2 uses 10 PLC integration time and a 200 usec runup cycle.
Running the instrument in DCV mode with varying input levels, i can see the switches denoted "sx" are always on during runup while those denoted "+s1024" are used to balance the integrator. Outside of +/- 11 V runup "escapes", causing an extended first rundown interval. Runup modulation is about symmetric at 0 V input voltage. The scope image shows TP201 and TP202, detail near comparator switching in precision mode. Blue is the input to the comparator, shown with -0.15 V offset. The 50 mV step in the yellow curve is caused by resistance of U214/4 (e.g. 1.5 mA times 33 Ohm).
Regards, Dieter
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R213 seems to be functioning reasonably well.
+16.72 V
+1.041 V
-0.614 V
-9.83 V
...
Next, I would check the control signals of the lower current sources, "Rundown sources". If one of them is stuck (always on), that will certainly affect long integration time during precision mode much more than short integration times in fast mode.
...
Is there an easy approach for testing the rundown sources?
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Is there an easy approach for testing the rundown sources?
Yes, there is. DIAG MODE -> A/D CHECK.
But as far as I remember firmware sources, when turned on, the multimeter performs a tolerance check of all current sources in the QuickSelfTest procedure.
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Stuck rundown sources would result in additional DNL error. So a way to check that the small sources are working properly would be to check the DNL. The error would be larger with shorter integration, so the shorter integration would be more sensitive.
To cause a significant offset if would need the largest source to be off and this would cause a massive DNL error, at least for the shorter integration times.
A simple DNL (and more local INL part) test is to observe a smooth slowly changing voltage. This could be something like a 1-10 µF (could use more) capacitor discharging though some 10 M, whatched at some 1 ms (maybe also 100 µs and 1 µs to also cover the fast mode) integration time with no AZ.
To look at the curve one can either subtract the smooth fitted background curve (e.g. exponential decay, if needed limited to smaller sections) or look at the difference of consecutive readings. One should get a relatively smooth curve and DNL errrors would get visible as jumps or outliers.
One could check the 2 large current source, by looking at the outputs of U200 and U202: these should be relatively close to zero (e.g. +-10 mV range). Chances are this is OK, but it is relatively easy to check with just a DMM.
The step (TP202 as a function of input voltage) near zero for TP202 suggests that the ADC does not have a large offset, as the 50:50 modulation case seems to be near 0 V as intendent. The step would be more pronounced at TP201, but at least for me the measurements at TP202 are already
convincing. So I don't think the problem is with the ADC.
An offset at the ADC would lower the upper limt for the readings. By disign the upper limit is below 15 V (like 14 V). So with a 3 V offset the readings would be limited to less then 12 V, likely less than 11 V.
The upper and lower limites could also give some clues for the amplifier(s), especially if they are less than normal.
The amplifier in precision mode was checked, not sure about the amplifier in the fast mode.
Ideally there should be no extra SW constant to shift the readings, but who (maybe Mickle T) knows.
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Checking the rundown sources with a multimeter: One could try and measure the nets denoted as +S64 +S4 -S1 -S16 and -S256. They are R213 pins as well, except -S256. -S256 is accessible at the source of Q206. The mosfets drive the current sources either into the integrator input or into ground. All five voltages should be near zero with -S256 the largest.
With DCV, 10 V, 10 PLC and input short i get: +S64 = 5.6 mV, +S4 = 0.1 mV, -S1 = - 0.1 mV, -S16 = -1.7 mV, -S256 = -24.3 mV.
I also probed integrator output with a scope, see above. I could see runup and rundown with different slopes. Guess it requires some hours to find, record and measure each slope.
Regards, Dieter
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Checking the rundown sources with a multimeter: One could try and measure the nets denoted as +S64 +S4 -S1 -S16 and -S256. They are R213 pins as well, except -S256. -S256 is accessible at the source of Q206. The MOSFETs drive the current sources either into the integrator input or into ground. All five voltages should be near zero with -S256 the largest.
With DCV, 10 V, 10 PLC and input short I get: +S64 = 5.6 mV, +S4 = 0.1 mV, -S1 = - 0.1 mV, -S16 = -1.7 mV, -S256 = -24.3 mV.
...
These voltages are with respect to ground and with the R6581T set to VDC mode (10 PLC, 10 V range):
+S64 = 6.25 mV
+S4 = 0.45 mV
-S1 = -0.05 mV
-S16 = -1.5 mV
-S256 = -24.9 mV = Q206 (S)
The +S64 and +S4 have been confirmed a number of times. Are these results caused by the +17 V rail being +16.72 V or is it something else?
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The exact numbers depend on the ADC result and may vary a little. So they agree. I measured +S4 once more, using R213 Pin 7 as precision Gnd and this time i have 0.35 mV.
By the way, when i measure +S1024 at drain of Q201 i am getting 96 mV, while Sx at the drain of Q200 is -49 mV. A factor two is expected, since the positive source steers 1.5 mA, while the negative one steers 0.75 mA (again DCV, 10V range, 10 PLC, inputs shorted). In this sense one can expect +S4 to be 4x more than -S1.
I think in order to discover the origin of your "stealth offset" you should find a friend with a scope. More subtle errors like integrator input leakage or mosfet switch leakage won't reveal with a multimeter.
Regards, Dieter
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The exact numbers depend on the ADC result and may vary a little. So they agree. I measured +S4 once more, using R213 Pin 7 as precision Gnd and this time I have 0.35 mV.
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Good to know. Too bad I haven't found anything out of the ordinary except for the 7.2Vref so far.
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By the way, when I measure +S1024 at the drain of Q201 I am getting 96 mV, while Sx at the drain of Q200 is -49 mV. A factor of two is expected, since the positive source steers 1.5 mA, while the negative one steers 0.75 mA (again DCV, 10V range, 10 PLC, inputs shorted). In this sense, one can expect +S4 to be 4x more than -S1.
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+S1024 = 103.8 mV = Q201 (D)
Sx = -49.8 mV = Q200 (D)
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In this sense, one can expect +S4 to be 4x more than -S1.
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If I interpret what you said literally, then 4 x +S4 does not equal -S1.
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I think, in order to discover the origin of your "stealth offset", you should find a friend with a scope. More subtle errors like integrator input leakage or MOSFET switch leakage won't reveal with a multimeter.
Regards, Dieter
That is unfortunate. I do have a loaner. It is a surprisingly expensive computer interface by Analog Arts. :-//
SL917 http://www.analogarts.com/ (http://www.analogarts.com/)
I suppose I should begin learning how to use it.
By the way, does anyone know the exact purpose of R170?
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R170 is a trimmer at the precision amplifier. It effects the offset and TC of the amplier. As the offset is normally corrected digitally, the drift is the more important parameter. The adjustment range for the offset should be relatively small ( more like <<100 mV).
The adjustment for zero drift could be relatively time consuming, as it includes a change in temperarature.
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1 kOhm
(https://img.radiokot.ru/files/98285/thumbnail/2o43z0q4te.jpg) (https://img.radiokot.ru/files/98285/2o43z0q4te.jpg)
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That trimmer in the precision channel isn't the best design, thanks for the hint. These parts develop contact resistance over the years. In our instrument i am measuring 456 Ohm and 409 Ohm on its two sides while i get 856 Ohm for the total (in circuit). So contact resistance may be 4.5 Ohm with unknown temperature dependence. In our instrument i can replace the potentiometer by one 47 Ohm fixed resistor and a short.
In another instrument the trimmer may be OK or even worse, don't know.
If those mosfet switches SD215DE are all OK, they are similar to each other and the measured voltages proportional to the currents they steer. If +S1024 has 100 mV, then -S256 should have -25 mV, +S64 about 6 mV, -S16 about -1.5 mV, +S4 about 0.4 mV and -S1 about -0.1mV. There is a pattern.
I just happened to notice R236. I think its voltage is proportional to integrator input leakage. So here one wants to see null. One microvolt would indicate one nanoampere, already a lot.
Regards, Dieter
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dietert1, can you please let me know what the voltage output for your R6581 is at U209? I measure 16.72 V.
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I just got 16.66 V at the output of U209. U211 outputs -18.61 V and U210 outputs -9.80 V. Reference voltage is 7.05 V. The LTZ1000 heater gets 9.55 V (emitter of Q1 after about 5 minutes of heating). What else?
By the way i added 100 nF film capacitors to the reference processing stages. Leakage of those caps was checked and below 10 pA. Later i saw 10 nF caps in a HP 3458A schematic.
Regards, Dieter
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I just got 16.66 V at the output of U209. U211 outputs 18.61 V and U210 outputs -9.80 V. Reference voltage is 7.05 V. The LTZ1000 heater gets 9.55 V (emitter of Q1 after about 5 minutes of heating). What else?
...
Thanks, dietert1.
My values are very similar. I was hoping that there was going to be a difference here. The phantom offset is most troubling.
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100 nF caps at the reference amplifier make absolute sense. The noise in the 1-5 kHz range can add to the ADC noise, as the modulation during run-up acts like mixer and brings this frequency band to near zero. 2 x the reference noise may be already detectable.
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By the way i added 100 nF film capacitors to the reference processing stages.
Without comparative measurements, it looks more like a placebo.
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Did you check the voltage over R236 to be zero? That would be a first test for integrator input offset current.
The idea is like this: Integration time for x1Zero_1 is about 100 usec and for x1Zero_2 is 10 PLC = 200 msec. That gives a factor 2000. Integrator scaling changes by a factor 21.5 nF / 1.5 nF = 14 between the two modes, so x1Zero_2 is affected 2000 / 14 = 140 times more. Integrator input offset current might produce a large offset for the precision channel without disturbing the fast measurement.
Regards, Dieter
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An input current to the integrator would be relative to the current from R200. So the same scale factor would apply for both integration times. It would add some offset, like a costant offset voltage.
Things are a bit different for leakage at the U213/1 at the CAZ capacitor and thus the other input of the integrator. Here the effect would scale with the integration time and integrator capacitance.
This would be something a bit tricky to measure. Indirectly leakage at U213 or bias current of U205 would should up as a current pulse at R236 to0, as the current for the Zero compensation phase. A measurement with just a DMM is tricky. Even with a scope it is not easy.
Filtering the reference would be mainly because of the 1-5 kHz band of the reference noise (and some OP / resistor noise). For this 100 nF inparallel to some 10 K are sufficient to at least reduce this noise part. The effect is no expected to be large (e.g. - 5-10% for the noise), but the effort is also relatively low.
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My idea about the filter caps is to avoid rectification of pulses at the opamp input transistors. One way to absorb pulses that
may stem from nearby digital circuitry is a capacitive short to the low impedance opamp output. I think this is good design
practice, no need for detailed evaluation. A well designed circuit should have bandwidth limits defined by linear parts.
Concerning integrator offset current: During integrator reset it will flow through R236. In 10 PLC measurement integrator
reset is active for 7 msec. So the test is only 7 msec / 207 msec sensitive. Yet, to produce an offset of 3 V the offset current
would have to be about 0.75 mA * 3 V / 10 V = 0.225 mA, so one would expect 7 mV over R236 . It's a test of Q211,
U213/1, U205 and U206 that one can do with a multimeter. When i look there with a HP 3478A it shows 2 or 3 uV, likely
all thermal EMF.
Regards, Dieter
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...
Concerning integrator offset current: During integrator reset it will flow through R236. In 10 PLC measurement integrator reset is active for 7 msec. So the test is only 7 msec / 207 msec sensitive. Yet, to produce an offset of 3 V the offset current
would have to be about 0.75 mA * 3 V / 10 V = 0.225 mA, so one would expect 7 mV over R236. It's a test of Q211, U213/1, U205 and U206 that one can do with a multimeter. When I look there with an HP 3478A it shows 2 or 3 uV, likely all thermal EMF.
Regards, Dieter
Thanks for the new test, dietert1.
I shorted front inputs in voltage mode and set the integration time to 10 NPLC. The voltage drop across R236 was < 1 uV on a Keithley 2000. :-//
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Hmmm... Moving onto MickleT's constant current sink schematic.
I am measuring -9.61 between GND4 and TP400 (VS), which I think should be -22 V.
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Hmmm... Moving onto MickleT's constant current sink schematic.
I am measuring -9.61 between GND4 and TP400 (VS), which I think should be -22 V.
There seems to be a lot more problems:
GND4 & TP400 (VS) = -9.61 V (normally -22 V)
GND5 & U107 (pin 4) = -14.9 V (normally -27 V)
GND4 & U403 (pin 5) = -14.9 V (normally +15 V)
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The last two isn't a problem but only typos while converting to CAD schematics.
Instead of U107 must be U400, and U403 (pin 5) = -14.9 V is Ok too.
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The last two isn't a problem but only typos while converting to CAD schematics.
Instead of U107 must be U400, and U403 (pin 5) = -14.9 V is Ok too.
Thank you.
Q113 should be renamed to Q400 as well.
These are the values I get:
GND4 & U400 (pin 6) = GND4 & R402 = -10.15 V
GND4 & Q400 (pin 1) = -10.15 V
GND4 & Q400 (pin 2) = -9.61 V
GND4 & Q400 (pin 3) = -27.5 V
Could this transistor be dysfunctional?
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From the measurend voltages the transistor is working OK. The question is, why U400 only gives some 10.1 V.
Could it be U401/2 and U401/3 switched wrong for some odd reason.
In the schematis (V5), there seems so be a few more minor mistake with the supply to U410 and likely also U401, U402. Very likely V+ goes to +5 V and GND to GND of some type.
The voltage noted for pins 20 and 21 of R400 are not compatible with the resistor values given.
The naming for the U406-Q0 and Q1 signal as x1 and x2 is also odd, as the unused range with Q1 active would be more like 1/3 the currents.
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From the measurend voltages the transistor is working OK. The question is, why U400 only gives some 10.1 V.
Could it be U401/2 and U401/3 switched wrong for some odd reason.
In the schematis (V5), there seems so be a few more minor mistake with the supply to U410 and likely also U401, U402. Very likely V+ goes to +5 V and GND to GND of some type.
The voltage noted for pins 20 and 21 of R400 are not compatible with the resistor values given.
The naming for the U406-Q0 and Q1 signal as x1 and x2 is also odd, as the unused range with Q1 active would be more like 1/3 the currents.
I switched into resistance mode and it reads -21.6 V at TP400. No change occurs when varying the integration time or the ranges.
Maybe this area is working properly.
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With -21.6 V at TP400 things are pretty normal considering the slightly lower refvoltage in the meter. When not in Ohms mode (or some ACAL steps) the voltage at TP400 does not really matter. So it may as well enable Q1 insteadt of Q0 and set it to the otherwise unused mode.
So I think at least for the coase main part the Ohms source does woke properly. This still does not say much about details like leakage, e.g. at Q402-Q405 or D402 that changes with the external voltage the ohms source sees. This is hard to measure and could effect the linearity (and the ACAL results). In this repect I don't like the way the ohms source is build.
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martinr33 and TiN have said that their R6581's have similar diagnostic values as my own unit. This seems to be a common theme with this instrument. :palm:
Might be related to the firmware and never taken care of after a hardware revsion.
...
x1Zero_1 = -0.0167 VDC (10 V range)
x1Zero_2 = +2.9543 VDC (10 V range)
x10Zero = +295.254 mVDC (1000 mV range)
x100Zero = +29.435 mVDC (100 mV range)
7.2Vref = +10.04475 VDC (10 V range), actual: +7.07 V
-10Vref = -6.88804 (10 V range), actual: -9.83 V
-1Vref = -689.901 mVDC (1000 mV range), actual: -0.984 V
-0.1Vref = -69.106 mVDC (100 mV range), actual: -0.098 V
Int_temp = +70.5 °C, actual temperature is much less than this value
10mA = -6.909 mADC (10 mA range)
1000uA = -690.64 uADC (1000 uA range)
100uA = -69.082 uADC (100 uA range)
10uA = -6.905 uADC (10 uA range)
1000nA = +1967.28 nADC (1000 nA range)
100nA = +196.73 nADC (100 nA)
10nA = +285.41 nADC (100 nA)
...
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Does anyone else have a linearity problem with their instrument in the negative 10 V range? A Fluke 732A was used to source 1 V to the R6581T. I know the - 1 V on the 10 V range is problematic because the 1 V measurement on the 1000 mV range matches with the + 1 V on the 10 V range only. Both - 1 V and + 1 V on the 1000 mV range match, which is expected.
R6581T settings:
integration time: 100 NPLC
range: 10 DCV
AZERO: ON/OFF (there was no noticeable difference that I could tell at a given temperature)
I compared my own measurements of the Fluke 732A and an xDevs KX-ref (soaked for 1750 hours) with a calibration laboratory report (before and after calibration). See attached Figure. For the 0 V measurement, I shorted the front input of the R6581T and took measurements (for both AZERO cases) after waiting for a while. After TRANSCAT calibrated the instrument in September, I have not touched the INTCAL feature.
Thanks.
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The internal calibration checks the gain of the 1 V range at -1 V. So ideally the -1 V point should be good by design. The +1 V is no accurate by design - it is more a test for the linearity for the 1 V and 10 V range. Even though the possible error is visible when reading 1 V, the INL error is kind of the average from the positive an negative side.
A full linearity test would need a really good instrument (e.g. high end calibrator and / or good 3458).
The turn over test only checks a part of the INL, but is still relatively easy. Ideally one needs good switches for the polarity reversal without much extra thermal EMF error.
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Yesterday i replaced U107 OP07 by an OPA140. I think this will help for accuracy, especially in DCV, 1 V range.
The voltage divider R100 has an output impedance of about 4.4 KOhms in that range. This adds to the switch resistance of about 1 KOhm of U101 MAX327 (present with all three gains). As the OP07 is specified with input currents in the nA range, there are unknown offsets of about 1 uV to 5 uV. This order of magnitude estimate gives 1 uV = 10 ppm in the 100 mV range, 5 uV = 5 ppm in the 1 V range and 1 uV = 0.1 ppm in the 10 V range. These contributions are neither known very well nor stable.
With the pA input current of the OPA140 these errors are essentially gone. For stability i added a 100R resistor between the OPA140 output and the guard network. I measured 1180 pF between guard and Gnd (R6581T power off). A low impedance at instrument input may increase the capacitive load when powered on. I checked this configuration to be stable with all three gains of the fast channel.
Another small step of making the R6581T a 8.5 meter.
Next i will try to add another MAX327 between U101 and the amplifier channel inputs to run the unused amplifier channel with gain=1. Let's remove random signals in this section of the instrument and clipping with ground current injection at D120.
Regards, Dieter
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Replacing U107 and U504 - is the one of the first things I did with my DMMs. But in my case there was no any measurable improvement in low-V ranges. Mainly because OP07D is a low-noise / low-Ib version of OP07 and already has an excellent input current compensation (or may be due-to pre-selection in production).
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The R6581T has multiple design problems and removing/modding any of them won't show a significant improvement until you solved the last one. As long as one or two of them are left, it remains a 6.5 digit meter. Selecting an OP07 for pA input current would be more like a piece of art and might depend on illumination. The OPA140 is better than needed "by spec" and it has a similar power consumption. I didn't use a TL071 as it has about 20 times higher low frequency noise amplitude.
For U504, maybe one could add offset voltage trim. In the instrument i am working on, its offset voltage is about 70 uV. Or replace it by an OPA189 chopper. That mod probably destroys external calibration of lower voltage ranges.
Regards, Dieter
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The input bias from the OP07 U107 would add some offset voltage. However this would not be a problem as the offset would be essentially constant and is corrected in the normal auto zero cycle. The point would be more the common mode input resistance, and here the OP07 is quite good (some 160 GOhms typ - may vary with manufacturer) and here the nonlinear part of the resistance could have a small effect. The linear part only changes the internal gain a little and this gets corrected with ACAL.
AFAIR the incentive to change U107 was to make it faster and this way reduce the gate current spike a little. There may however be stability issues.
Another odd point is to use the output of U107 for the guard also for circuit parts at the very front. For some parts I would consider the output Of U009 more suitable.
U504 adds a little to the noise and offset / drift before AZ. Here the offset and drift of the OP07 is usually considerably better than the main amplifier. The noise is also not that bad, though there are lower noise (the relevant frequency would be something like 2.5 Hz) ones available.
A change of U504 should normally not effect the calibration (gain adjustment for the 10 V range). It would however effect the internal calibration and possible linearity corrections. Besides noise, the ouput cross over distortion of the OP07 could habe some effect on the linearity in the 100 mV range. A formal calibration with the paperwork would normally be considered void after such a change of cause.
One could check the possible nonlinear effect by loading the output of U504 when reading 0 in the 100 mV range.
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After removing the original JFET MUX with the strange feedback loop where switching depends on the switch output the guard driver speed does not matter anymore. For me the point was to remove the offsets caused by input offset currents. Those currents are extremely temperature dependent and they are so easy to remove that one could call the placement of OP07 a design error. There may be historical reasons, though.
Here i have a scope image of fast mode with 1 msec integration time and autozero, showing integrator output and guard driver output. Input voltage is 3.5 V.
Regards, Dieter
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Please! Can anyone provide the diagnostic data of R6581 True-RMS board?
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Amp_off +0.0008 - 0.0005
Vca_off -0.00226
Ac_ref1 -9.81724
Ac_ref2 +9.81230
Abs_dead1 +0.17970
Abs_dead2 +0.17504
Abs_off1 -0.17932
Abs_off2 +0.17510
10vf_1 +1.86881
10vf_2 +1.91763
10vf_3 +1.91175
10vf_4 +1.86854
Some readings are drifting. Everything related to 10vf_X, ref is stable to the last sign.
Add. You can measure noise at the 100 DC volt range with the input shorted? Config 100 nplc 8.5 digits az on.
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Thanks! I am trying to recover a completely dead R6581 with multiple resistor failures. At the moment, 7 open-circuit resistors have been found. The device comes to life and successfully passes self-test and internal calibration. However, I cannot find the reason for the huge temperature zero offset of the AC measurements.
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I think this multiple failure is a bit unusual, except somebody threw the instrument or it got hit hard. What does the metal enclosure look like?
Regards, Dieter
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Cumulative Measurements R6581
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I don't think these failures are due to mechanical stress.
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Mechanical stress may also happen when you freeze the instrument in an airplane cargo bay. I mean without traces on the metal enclosure. Did you think about the reason of the failures? Somebody connected the instrument to 220 VAC while setup for 110 VAC?
Regards, Dieter
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Exteme cold temperature could be an issue, also without a plane. Some chemical problem is also possible, maybe overly aggressive cleaning.
It is still strange to see resistors scatttered all over the circuit to go bad. This really does not look like a damage from overvoltage.
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Cumulative Measurements R6581
do you have raw data?
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All those resistors are driving zeners. If the input is unregulated supply voltage, it does look like damage from overvoltage. Anyway overvoltage is a possible explanation for multiple failure.
Regards, Dieter
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Cumulative Measurements R6581
do you have raw data?
You are welcome. Raw measurement data of short input R6581 with AZ on and AZ off with different PLCs.
https://cloud.mail.ru/public/miPE/s2kbDdSre
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All those resistors are driving zeners. If the input is unregulated supply voltage, it does look like damage from overvoltage. Anyway overvoltage is a possible explanation for multiple failure.
Regards, Dieter
I had problems with SMD Resistors not being able to stand inrush currents. The cause was the way those resistors are trimmed: the resistance paste is screen printed onto the substrate and then fired. The value of the resistance paste is selected so that the value is always lower than the nominal value of the resistor. Then the resistance is trimmed close to nominal value by cutting into the resistive layer between the two contact areas with a laser or by sand blasting. Depending on the tolerance of the fired paste, there will remain only a narrow strip of resistive material. In my case, after 10 or 20 inrush current surges, this remaining strip opened due to overload, but not on all lots of the circuit - this caused some head scratching. I solved this issue by specifying surge proof (german: "impulsfest") resistors. They are trimmed differently - either a labyrinth cut or an L cut. Problem solved.
Seems to me like a possible fault in this case. If surge proof SMD resistors are not readily available, plan B is to replace them by Mini or Micro MELF - those can withstand much higher current surges due to being trimmed with a helix cut.
Hope that helps.
Greetings,
Rainer
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The location of the resistors in the circuits powered by four independent voltage stabilizers, low power dissipation at 1/10 of the maximum, as well as the absence of other faulty components, almost exclude the possibility of damage to the resistors from overvoltage, power surge, ESD etc.
Different multimeters (R6581, R6581T), different users, different operating conditions... The common thing in these cases is the huge operating time of multimeters (~100000 h), and (possibly) the same resistor supplier with a low MTBF due to embrittlement of the protective coating and the occurrence of microcracks in conductive elements. Later, I will check with our university materials science laboratory.
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R6581Ts were used in industrial setups, so it may have been in continuous operation for 20 years or more without any power cycle nor selftest nor calibration. Still it's hard to believe it was used accumulating failed resistors inside, so the failures probably happened after it was retired. So it seems like multiple old and brittle resistors broke by some mechanical stress or power on surge.
Will check those resistors in our R6581Ts. I remember carbon resistors would show symptoms before failure, maybe the same is true for thick film parts.
Regards, Dieter
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Diagnostic summary table R6581, R6581D, R6581T
(https://img.radiokot.ru/files/98285/thumbnail/2pzy08s4zt.jpg) (https://img.radiokot.ru/files/98285/2pzy08s4zt.jpg)
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I suppose there is a possibility that I installed the R234 backwards, but I was careful to check the other people's reference pictures before installation. Tonight, I will check the voltages.
EDIT: Couldn't wait!
R230: 98.5 mV, 0.985 V, 9.85 V
R234: 9.659 V, 7.090 V (across the network: 16.75 V)
So far, the voltage magnitudes appear to be reasonable to me. :-//
The firmware version states: ".A01". Is there a newer version available?
Without desoldering the R234, would there be any irreversible consequences if I tried to short the R234 to create a parallel resistance for the purpose of testing the diagnostic response? Maybe there is an easier method or maybe I am overthinking this problem.
I still believe that I replaced the original resistor network correctly. There are other examples on the PCB where parts were populated backwards. Some other R6581T owners have said that their diagnostic mode throws random numbers similar to mine. I wonder if this resistor is the reason why.
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Diagnostic summary table R6581, R6581D, R6581T
(https://img.radiokot.ru/files/98285/thumbnail/2pzy08s4zt.jpg) (https://img.radiokot.ru/files/98285/2pzy08s4zt.jpg)
FYI, my DMM is a T model that displays D during boot after the firmware update.
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If R234 would be installed backwords, this would cause the 17 V reference and other derived voltage to be way to low (more like 13 V) - that should be obvious and easy to measure. So I don't think this is the problem.
The difficulty is that it is not clear what the diagnostic values actually represent and how much math (cal constants) is actually applied.
Somehow the diagnostic values when using the slow amplifier all seem to be some 3 V too high at the ADC. This could be an HW fault, or maybe also a wrong cal constant for a rarely used offset (e.g. zero for the non AZ mode).
I think I have asked this before: did the meter read +10 V and +11 V OK (not saturating early - so not about a few ppm off, but more like 100 mV or more) ? If there is really this 3 V offset also there, this would drive the ADC in saturation and should cause an early saturation at the upper end.
A point to check may be of for some reasone the amplifer sometimes oscillates during the self tests. So maybe monitor the voltage at the ADCin test point during the diagnostic mode.
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...
I think I have asked this before: did the meter read +10 V and +11 V OK (not saturating early - so not about a few ppm off, but more like 100 mV or more) ? If there is really this 3 V offset also there, this would drive the ADC in saturation and should cause an early saturation at the upper end.
A point to check may be of for some reason the amplifier sometimes oscillates during the self-tests. So maybe monitor the voltage at the ADC in test point during the diagnostic mode.
The instrument was calibrated and passed all test points with the exception of the high-ohms ranges. My R6581T measures the Fluke 732A 10 V source within a few ppm difference of a working 3458A. I do not recall if I checked 11 V, but I imagine it is fine as well.
The -1 V and +1 V measurements do not match well on the 10 V range. We are no closer to solving this problem either:
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3810377/#msg3810377 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3810377/#msg3810377)
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So there seem to be sveral problems:
1) the odd offset in the diagnostic readings
2) not accurate in the higher ohms readings ( I faintly remember this is not that unusual and others may hev similar problems)
3) Quite some error in the turn over test, and thus a linearity problem.
4) Not very repeatable in the calibration (repeated adjustment gives different results, or did they fudge in some extra shifts in the pos and neg ref readings to find some compromise the work at the cal points ? )
I think the 2 nd point could be just overly optimistic specs and this may not be directly related.
Such a massive linearity problem as shown in the turn over test could cause all kind of trouble in the ACAL procedure. So it would be pure luck to still pass the calibration tests. isn't the turn over error part of the tests ?
The linearity problem seen with the turn over test should be a real HW problem and not cause by odd combination of cal constants to tweak the response.
For the offset in the diagnostric values this offset does not seem to apply to normal AZ mode. So I am a bit inclined to see this as a soft problem and not hardware.
For HW diagnostic one would really need a scope - it is hard enough with a scope, but nearly hopeless without.
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...
For HW diagnostic one would really need a scope - it is hard enough with a scope, but nearly hopeless without.
I have a Keysight DSOX3014A with all licenses now. Last week, I was supposed to have someone I know to teach me how to use it but then he got a cold. One step at a time, I suppose.
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...
4) Not very repeatable in the calibration (repeated adjustment gives different results, or did they fudge in some extra shifts in the pos and neg ref readings to find some compromise the work at the cal points ? )
...
From what I understand, the calibration lab measured before adjustment and then after. They said that they struggled to get the -1 V reading working on the 10 V range after repeated calibrations. No other problems were reported except the high-ohms issues, which seem to be common with the design or overly-optimistic specifications.
On a related note, the y-axis (difference in ppm) of the previous link may have been reversed when I calculated the + to - difference at home. I cannot find the original spreadsheet at the moment.
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The first part would likely be to get used to the scope to get at least the basics. So look as some small, safe voltages first to get used to the scope and learn about the possible damaging traps: keep in mind the ground clip is generally grounded to PE. So usually only 1 ground clip, even if multiple probes are used. At least be careful with multiple ground connections. For the start there is no need to measure mains - the normally probes may not be OK for this. So better keep it safe and low voltage only.
After that diagnosing the DMM can be good practice to use the scope in real life.
With some additional help with the sope the diagnoses at the DMM is nice practice. Maybe start a new thread, to keep this interesting thread with the reversed schematics reasonable short and on topic.
Struggeling the get the -1 V point work sounds odd for a meter that does not have much adjustment points. It should be no more than an input short, a 10 V ref., maybe a -10 V reading as the exact reverse and a 10 K ref resistor (that should not effect the voltage part at all). So not really much to possible tweak - essentially only providing a slightly off -10 V >:D.
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Leigh asked me to extract the diagnostic values from my units. They are warming up now.
On two R6581 units, A02 software:
They both show about 10V (as does Leigh's unit) where they should show -7V according to others
They both show about -7V where they "should" show -10V
And yes, I double checked the software rev number.
The R6581T shows similar values, it is an A01 unit.
I cannot tell the age from the exterior.
Two units have grey rear sticker labels.
The third unit (a 6581, not a T) has silver rear labels.
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Here's a pic of my older R6581 (grey label). Indications are that it is late 1998. This unit has no serial number, grey rear labels and what I suspect to be an older style fan logo (italicized Pico Ace 25 logo).
[attach=1]
I could not find MickleT's excellent report on 6581 variants, but I noted that this unit has metal can resistors on the voltage reference board - no plastic.
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Here's a pic of my older R6581 (grey label). Indications are that it is late 1998. This unit has no serial number, grey rear labels and what I suspect to be an older style fan logo (italicized Pico Ace 25 logo).
(Attachment Link)
I could not find MickleT's excellent report on 6581 variants, but I noted that this unit has metal can resistors on the voltage reference board - no plastic.
Thanks for doing this, Martin.
While you are at it, what's the front panel max voltage? Is there a calibration sticker on from Advantest?
EDIT: My unit states that it is rated for 300 V max. The original Advantest calibration sticker is from 2005/08/01.
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Here we go. I have no calibration stickers in sight, and no sticky spots where one might have been. Other than a crumbling front terminal block on the older R6581 and faded displays on the 6581Ts, my units were in decent condition.
R6581 R6581T
Guard: 420V to ground 100V
DCV/ACV: 1100V to common 300V
DCI/ACI: 420V to ground 300V
4w Ohms high to common: 350V 300V
Guard to common: 100V 100V
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Hi Martin,
Can you please provide the full diagnostic figures for both units? serg-el et al. are keeping a comparison list. It would be interesting for me to know the exact figures.
Regards.
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I restored the principle of operation and circuit diagram of the R6581 AC converter. As I expected, its functional structure exactly matches the Advantest patent.
The RMS converter reminds me of that of a Keithley 2001 multimeter and consists of a discrete wideband full-wave absolute value calculator, a standard AD637 chip, and a programmable low-pass filter. To my surprise, the multimeter has the ability to choose the AC-DC conversion method: rectified mean detector or TrueRMS. Whether this feature is used in the firmware remains to be seen.
The input divider is divided into three parts: 10/100 mV, 1 V and 10/100/750 V. The input amplifier is non-inverting, built in the same way as in the HP3458A. Zero offset corrections are performed by an internal successive approximation calibration process using 6 channels of an 8-bit DAC. Divider frequency response correction is performed using a 12-bit DAC, one channel of an 8-bit DAC, and an AD734 precision analog multiplier. When correcting the frequency response, a square wave with a calibrated amplitude of + -0.1/1/10 V and a frequency of 20 and 40 kHz is used.
The digital control system is implemented mainly on the GAL22V and shift registers, and has a hell of a complicated circuit.
Question to the owners of the full version of R6581. How big is the reading error when measuring DC voltage (100 mV, 1 or 10 V) in AC+DC mode immediately after AC IntCal?
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I recently joined the R6581 owners club me too.
I bought the instrument, a R6581T, from the well-known online auction house as doesn't work instrument (display off).
The fault solution was at least strange: I swapped the cables that connect the cpu board with the display board and everything started working normally.
Note that I have measured both cables looking for any break tracks and i found nothing.
I had also cleaned the contacts previously with an ink eraser but I did not get any results, only by reversing the two cables the
instrument´s display turned on.
The instrument passes all the tests and performs the internal calibration, the vfd display is however very weak.
I did the dump of U113, the memory that contains the FPGA code, it is the only dump that cannot be found on the net for this
instrument: it may be that in the future it may be useful to someone.
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My C215 was mounted inverted also and running for years in this state didn't do it much good.
The capacitance value is now 6.4µF and the ESR is greater than 40ohm (C212 has an ESR < 3.5ohm instead).
I replaced it with a new one and took advantage of this to replace all the electrolytic capacitors in the power supply (even though they were still in good condition).
Thanks to serg-el for this discovery.
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I also replaced capacitor C215 in my new R6581. It had a capacitance of 7.2 uF and an ESR of 24 ohms.
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@Mickle T.
I thought that this capacitor (C215) was placed in an unimportant section of the instrument, I see instead that it is part of the power supply circuit of the comparator ADC.
I probably have an outdated version of your schematic because the positioning of the capacitors, in this section, does not correspond to reality.
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Shematics R6581 v.5
Read the topic carefully
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Advantest R6581 has excellent frequency response (up to at least 1 MHz), but, like all devices with the AD637 chip, mediocre temperature stability and significant low-signal non-linearity. These characteristics can be slightly improved by minimizing the temperature coefficient of the main amplifier's first stage and choosing an AD637 RMS converter with less deadband and better linearity.
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Nice improvement :-+
If only we would find the root cause for the DC linearity issue of the ADC.
-branadic-
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Here are my graphs of long-term stability. Sharp breaks in the voltage graphs - after internal calibration.
Returning to operating mode after a long shutdown takes an average of one week.
So this is not the kind of equipment that should be kept turned off.
Measured voltage measure based on LTZ1000, kindly provided by Mickle T. for comparison.
(https://img.radiokot.ru/files/98285/thumbnail/2kk5pcazij.jpg) (https://img.radiokot.ru/files/98285/2kk5pcazij.jpg)
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How do the experts blank the R6581T VFD?
When i send the command ":DISP OFF", the display remains on and shows "DISPLAY OFF" plus some indicators.
Regards, Dieter
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Yes, the gpib command does the same thing to me too.
I solved it with a hardware modification: I put a switch in series with the vfd filament.
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Because I am having problems with my unit, I decided to add sockets to the board while I remove suspected SOIC and DIP components.
The SOICs can be socketed with the following:
8-positions:
FTS-104-02-F-DV-TR
CLP-104-02-G-D
16-positions:
FTS-116-02-F-DV-TR or 62101621021 (alternative)
CLP-108-02-G-D
This might be useful for people trying alternative ICs on the unit with the minimum amount of dwell time on the board. Sorry for the bad photos, I couldn't get any better with my phone.
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Hmm,
D113 looks like being cracked.
regards Andreas
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Hmm,
D113 looks like being cracked.
regards Andreas
Is it? I cannot tell. U105 is where I suspect the source of noise is coming from, but I cannot seem to isolate it.
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D110 looks much better.
Also D112 does not look very good.
D113 is either very dirty or half of the part is missing.
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D110 looks much better.
Also, D112 does not look very good.
D113 is either very dirty or half of the part is missing.
I think they are just a bit dirty because I was replacing components still. Note that the R100 is missing.
After replacement, I performed a quick check by shorting the input and measuring the noise on the 100 mV range.
The instrument still seems to have a lot of noise when AZERO is OFF:
±1.5E-6 V (AZERO OFF, 100 PLC, 100 samples) --> noise is similar to what was found before component replacements
±5E-8 V (AZERO ON, 100 PLC, 100 samples)
Is this noise typical of a T model? Why is the AZERO an order in magnitude lower in noise?
Replacing U100, U101, R100 (TCR upgrade because why not), and U105 (suspect) from the precision channel did not seem to have any impact on the noise issue the unit is experiencing.
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I would not expect U105 to be a relevant source of noise, at least not when normally working. It is inside the loop of the main amplifier and noise from U105 would thus be corrected and attenuated quite a bit.
The main tricky part about the circuit around U105 is if there is some fast oscillation and maybe EMI trouble.
The higher noise in the non AZ mode is due to 1/f noise from the dual JFET (Q102).
1.5 µV looks indeed quite high, though the relevant frequency is also quite low and there may be some drift included.
100 Samples at 100 PLC would be something like frequencies from to 3 - 300 mHz.
A more comparable test would be 100 samples at 1 PLC and thus more like 0.3 to 30 Hz. Maybe take 300 readings and average 3 each to get even closer to the standard 0.1 to 10 Hz band.
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...
100 Samples at 100 PLC would be something like frequencies from 3 to 300 mHz.
A more comparable test would be 100 samples at 1 PLC and thus more like 0.3 to 30 Hz. Maybe take 300 readings and average 3 to get even closer to the standard 0.1 to 10 Hz band.
Hi Kleinstein, thanks again for your input.
Here goes my interpretation of your suggestion:
±2.2E-07 V mean of 3 sets of 300 samples x 3 (100 mV shorted input, AZERO ON, 1 PLC)
±3.7E-07 V mean of 3 sets of 300 samples x 3 (100 mV shorted input, AZERO OFF, 1 PLC)
When AZERO is OFF, the STATISTICS operation is much faster than when AZERO is ON. The noise of AZERO ON will not be captured with these comparisons above, so it would be useful to compare them to the previous set as well.
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Taking the mean of 3 sets makes things a bit more complicated. I thought about just averaging 3 consecutive samples to get effective 3 PLC and than 100 samples of this. The 3 sets may still make sense to than get 3 RMS values to see if the noise reading is scattering a lot.
The AZ mode naturally needs a little more than twice the time to complete, as there are 2 readings each and some extra time for settling.
The 370 nV_RMS would be about 2.3 µV peak to peak. This sounds about reasonabe for a JFET based low noise input amplifier. This is comparable to an LT1057 or AD711.
The 10 Hz noise specs for the U401 are 20 nV/Sqrt(Hz) at 200 µA and thus some 28 nV /Sqrt(Hz) for the pair.
So the 0.1-10 Hz noise looks reasonable. The 1/f noise part can anyway scatter between units.
Another way to check if the noise is reasonable would be for someone else test a different meter, maybe with 10 PLC readings, 100 samples RMS values to get a little deeper to the 1/f region.
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Could Q102 and Q104 be replaced without the need for matching? If so, what are the part numbers? I am not sure what is going on in the diagram. Is U401 the combination of Q102 and Q104? EDIT: U401 is a part number of Q102. How confusing.
Distributors:
https://www.trendsetter.com/u401-to-71-6l.html (https://www.trendsetter.com/u401-to-71-6l.html)
https://store.nacsemi.com/products/detail?part=U401-TO-71 (https://store.nacsemi.com/products/detail?part=U401-TO-71)
https://www.sierraic.com/U401TO71 (https://www.sierraic.com/U401TO71)
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The JFET pairs should be reasonably matched, but I don't think the requirements are vey high. There is a trimmer for the precision amplifier to trim the temperature drift in a certain range.
Before exchanging the FETs, one should check the voltages at the amplifier, e.g. to check the current.
Another point may be the trimmer setting and temperature drift of the amplifier. If the trimmer is set wrong the amplifier could have higher temperature sensitivity and temperature fluctuation look a lot like 1/f noise.
The trimmer effects both the offset and temperature drift. The important part here is the drift. The offset is corrected digitally anyway and is more like a way to "measure" the trimmer position to help with the TC adjustment.
A last chance could be using a slightly higher current for the FETs - there is a small chance to this way shift the active region in the FET and this way get a change in the 1/f noise or popcorn noise.
Another point may be the decoupling of the +27 V supply - an additional cap there may be wirth a try.
The non AZ mode is still usually not the best choice for low voltage DC. The AZ mode has it's reason mainly for fast measurements well below 1 PLC.
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...
Another point may be the trimmer setting and temperature drift of the amplifier. If the trimmer is set wrong the amplifier could have higher temperature sensitivity and temperature fluctuation look a lot like 1/f noise.
The trimmer effects both the offset and temperature drift. The important part here is the drift. The offset is corrected digitally anyway and is more like a way to "measure" the trimmer position to help with the TC adjustment.
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Is the temperature drift caused by the trimmer (R170) or something else? If I simply remove the trimmer or replace it with a low TCR trimmer, would this correct the temperature drift?
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The trimmer is not causing the temperature drift, but the trimmer can be used to adjust the temperature drift. At the same time it also effects the offset, but a low offset is not essential. So the correct setting of the trimmer is to get lowest temperature drift, not for zero offset.
The offset voltage is more a point to find back to an old setting.
The point would be to check the temperature drift (e.g. observe the non AZ reading while heating the transistor in a reasonable repeatabe way) and if needed adjust the trimmer to reduce the temperature sensitivity.
Because this adjustment is a bit tricky and time consuming, there is a chance that the old trimmer setting is not very good, or possibly adjusted to zero offset. The effect of the trimmer was noted before be Mickle T.
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My R6581T does not use the typical setup. See attached pictures. EDIT: the blue wire connects U107 to a floating pin of Q104 that is not terminated to the board. This floating pin is connected to the case as described in the datasheet. The floating pin is connected to the OP-07D output pin and must serve as a guard.
Q102: HOTS U401 F0412AC
Q104: HOTS 2N5912 F0436AF
The measurement drift and noise appear insensitive to my finger being applied to the top of either of these metal cans. EDIT: Q102 drift is subtle but can be observed over a few minutes through the noise.
I took a statistical average with my finger on the JFET (0.11 mV @ 31 °C) and compared it again without my finger (0.15 mV @ 24 °C). For repeatability, I performed the test again. 1.35E-04 V ± 9.82E-06 V @ 31 °C versus 1.63E-04 V ± 5.03E-06 V @ 23.6 °C. 1.43E-04 V ± 5.827E-06 V @ 31 °C versus 1.64E-04 V ± 2.94E-06 V @ 23.3 °C. Q102 introduces approximately -4 μV/°C drift when R170 is turned to the counter-clockwise limit.
When R171 is trimmed to the clockwise limit 8.635-03 V ± 1.653E-06 V @ 31 °C versus 8.611E-03 V ± 1.8393E-06 V @ 23.7 °C. For repeatability, 8.632-03 V ± 3.637E-06 V @ 31 °C versus 8.608E-03 V ± 2.3668E-06 V @ 23.7 °C. Q102 introduces approximately +3 μV/°C drift.
Settings: 100 mV range, input short, case open, 100 PLC, AZERO OFF, 100 samples.
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The offset that the meter is reading likely already includes a numeric correction of the offset (e.g. the zero reading during the turn on self test or the last time the auto zero mode was active). So the absolute offset voltage reading is not relevant. The absolute offset would be visible with a 2nd meter at the ADC input testpoint and maybe in the diagnostic mode.
Unless the offset is really large, so that it reduces the usefull range the offset should not matter.
Connecting the case of Q102 to the guard makes some sense. The version 5 of the schematics also show it this way.
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One can optimize the temperature drift by simply measuring the difference between RT and when a finger is placed on the metal can while varying the position of the coarse R170. If the trimmer was upgraded to have a greater number of turns, this process could essentially cancel the drift. The original trimmer seems reasonably chosen to do the job anyway. Attached is a simple linear interpolation exercise that I used to perform the optimization. Instead of using the resistance position as the dependent axis for linear interpolation, I used the measurement reading. This method provided greater precision when trimming. My trimmer needed to be positioned at approximately 55 % (i.e., when the readout is 4.07 mV by varying R170 @ 23 °C when the input is shorted) if I considered the clockwise position to be 0 %.
The orange circle is the optimal point that I had predicted using this method. I think the drift is not exactly zero because the case was open and I still have noise issues at the 100 mV range which interfere with the averages readings. The labels CC, M, and C represent the counter-clockwise limit, the middle reading, and the clockwise limit of R170, respectively.
Despite this rather entertaining detour, I do not think these coupled JFETs are the answer to my noise problem.
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Never mind, I take it back. The noise on the 100 mV range has improved somewhat since I replaced DC input components and optimized R170.
There still exists a baseline noise that is consistent on 100 mV, 1000 mV and 10 V ranges after replacing U100, U101, U105 and all of the electrolytes.
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For what conditions are the noise measurements ?
The noise looks a bit high for the AZ mode. In non AZ mode it can havily depends on the number of readings, as the RMS values may be more a drift than noise. The improvement does not look very large and noise measurements also tend to scatter somewhat.
The very low frequency noise in the non AZ mode is usually not a very important parameter, though with this special meter the switching spikes are quite large and thus maybe a little more need to use the non AZ mode in some cases (e.g. resistors > 10 M).
A small improvement in the noise of the 100 mV range is possible by upgrading U504 to something like OP27 or OPA209. However this would be more a thing for the AZ mode and hardly visible in the non AZ mode for longer times. This change was mentioned a long time before and AFAIK tested by Mickle T.
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For what conditions are the noise measurements ?
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Sorry, about that. The settings are the same benchmark as before:
100 PLC, 100 samples, AZERO OFF
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Interestingly, I just ran a reverse polarity test on the R6581T between 100 mV and 10 V ranges using a Fluke 732A. It appears that the polarity error is not exclusive to the 10 V range when measuring ±1 V. The error follows a power-law relationship with the input. Benchmark settings are the same as previously mentioned.
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The difference visible on polarity reversal has 2 components: An error from the ADC and an error in the offset voltage. With the lower ranges the offset error gets more and more relevant. Usually the turn over test needs to include a very careful offset correction and the result shown that the offset may well be an important factor in the measurements.
The way how the polarity swap is done can make a difference, as the cables and handling the cables can make a difference. I like to use 2 SPDT switches to do the turn over test. This gives 4 readings: 2 voltage readings and 2 zero readings for the offset. Ideally the test is repeated a few times to average out random errors and also drift/noise of the references. The variations between the repeats give an idea on the repeatability.
The switches may add some offsets, but as long as they are constant, they cancel out with the DMM's offset or can be seen as part of the reference.
For the noise in the non AZ mode 1 µV RMS is quite some noise, especially with such a low BW. Besides the main amplifier there may also be some contribution from thermal EMF at a few points. For comparison one could do a similar test in the current mode instead of a short. The 100 mA range should have a 1 Ohms shunt and thus 1 V/A and thus easy scaling. This would take out the input relais and protection resistors as possible source of thermal EMF.
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I just got off the phone with the calibration technician. He said that he tried everything to make the R6581T measure within tolerance:
- 2-wire mode instead of 4-wire for the 10 MΩ, 100 MΩ, and 1 GΩ range (they will update the accreditation data to reflect this)
- checked both HI and LO power settings (not much difference)
- used 100 PLC for the whole procedure
- OMH-COMP OFF
Apparently, the technician had no problem with the R6581T because it is similar to the Fluke 3458 and 8508.
He mentioned that while testing, he noticed something very strange about the -1 V reading on the 10 V range. He had to calibrate the DMM three to four times to get the instrument to read correctly. This might be key to diagnosing the problem... EDIT: This sounds like ACAL R230, which is located right next to R234.
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Interestingly, I just ran a reverse polarity test on the R6581T between 100 mV and 10 V ranges using a Fluke 732A. It appears that the polarity error is not exclusive to the 10 V range when measuring ±1 V. The error follows a power-law relationship with the input. Benchmark settings are the same as previously mentioned.
I believe I have reduced the reverse polarity error (i.e., an order of magnitude on the 100 mV and 1000 mV ranges) by replacing the following components: R230 (replaced with a Vishay Y1713V0591AV9L), U213 (swapped with a used MAX327CPE from the DC Input Amplification Section and socketed), and U209 (replaced with a new OPA177FP and socketed). I suspect that U213 was the cause.
Test comparison settings: NULL ON, ARZERO OFF, 100 PLC, 100 SAMPLES
Now, my only problem with the unit seems to be the noise issue on the 100 mV, 1000 mV, and 10 V ranges which is likely the cause of the remaining reverse polarity errors. Note the repeatability of the measure inputs. The instrument is hitting a ±1.1 μV noise floor on these ranges.
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There still exists a baseline noise that is consistent on 100 mV, 1000 mV and 10 V ranges after replacing U100, U101, U105 and all of the electrolytes.
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R230 should not effect the turn over error at all. This is only the divider for the auxiliary voltages used for the ACAL procedure. So if at all a rather poor resistor could effect the error / noise effect on ACAL. I would already consider the original resistor network more than good enough.
U209 (first OP to amplify the referene should also not have an effect on the turn over error and only a very small effect on the noise (not visible in non AZ mode).
U 213 = max327 low leakage switches could in theory have some effect on the INL (more the relatively wide spread problem with negative voltages and not so much the turn over test), if the U213/1 part (part of the intgrator reset circuit / analog AZ for the ADC) shows high leakage. With only a rather low voltage there, the leakage current would be small. 1 pA leakage over some 100ms would be some 3 µV for C208 and this may already become significant. I faintly rememer some tests about leakage to C208, so it could already be checked (e.g. larger value for C208 to reduce the effect of leakage) in the not successfull hunt for the INL error source.
It does not make much sense to look at the turn over error in the non AZ mode. If so one would need a repeated offset measurement. This
would likely mean polarity reversal with switches (or even latching relays) and several repeats with offset readings in the cycle. The non AZ mode is just not well suited for small DC voltages.
For the low frequency noise, it may make sense to also look at the noise in the AZ mode. This would also include possible thermal EMF effect from the relays at the input. If the AZ mode noise is OK, one could exclude these sources for the non AZ mode.
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The reverse polarity tests pictured above were performed directly before and directly after the replacement of U209, U213, and R230. I tested the unit 1 hour after startup, and then after an overnight warmup. Whether there is a logical explanation or not, I believe that the work in this area solved the problem. This problem was discovered by the calibration lab in August 2021 and tested several times after external calibration which confirmed the error. The new results have shown a significant reduction in the reverse polarity error that cannot be explained any other way. I also have shown repeated measurements of both positive and negative polarities for each input and range.
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...
It does not make much sense to look at the turnover error in the non-AZ mode. If so one would need a repeated offset measurement. This would likely mean polarity reversal with switches (or even latching relays) and several repeats with offset readings in the cycle. The non-AZ mode is just not well suited for small DC voltages.
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Good idea. I will try with AZERO mode ON soon :)
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It does not make much sense to look at the turnover error in the non-AZ mode. If so one would need a repeated offset measurement. This would likely mean polarity reversal with switches (or even latching relays) and several repeats with offset readings in the cycle. The non-AZ mode is just not well suited for small DC voltages.
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Good idea. I will try with AZERO mode ON soon :)
Here is the data presented again with AZERO ON and OFF after the hardware modifications. AZERO ON does reduce noise and reverse polarity error. In retrospect, I should have adjusted the NPLC so that both AZERO modes could be better compared.
I included measurements made with both the Fluke 732A (i.e., 1 V, 1.018 V, and 10 V) and Fluke 752A to achieve more sample points (i.e., 0.01018 V and 0.1018 V) but realized that the Fluke 752A introduces a lot of measurement error and noise at the low voltage range. Error bars are based on the standard deviation of the mean measurement at each input. The typical noise is < 0.5 μV, depending on the applied input, range, and sample rate. Benchmark settings: NULL ON, ARZERO ON/OFF (labelled), 100 PLC, 100 SAMPLES (for both AZERO ON and OFF).
Results indicate that somehow I corrected the hardware problem with my unit by changing the U209, U213, and R230 region of the analog board. The only other thing I did was clean the region afterwards with isopropyl alcohol.
This hardware modification resulted in a 0.8 ppm difference on the 10 V range for ±1 V input. The previously reported values by TRANSCAT (26-08-2021) show a difference of 4.2 ppm (as-left) and 9.4 ppm (as-found) on the 10 V range for ±1 V input. On 15-10-2021, I found that the difference was 8.9 ppm (i.e., +1.0000087 V and -0.9999998 V with AZERO ON at 100 PLC on the 10 V range) using the same Fluke 732A as reported today. On 01-11-2021, I found that the difference was 10.1 ppm (+1.0000107 V and -1.0000006 V with AZERO ON at 100 PLC on the 10 V range) using the same Fluke 732A as reported today.
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Does anyone know the resistance value of R240? It is located under the Vref board. My component is dead and I do not have a photo reference to identify the 3-digit EIA code. It could be 10X.
Thanks.
EDIT: R240 is 100 (i.e., 10 Ω). Credit to Martin33
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R240 is 10 Ohm.
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R240 is 10 Ohm.
Thank you, Mickle.
I must not be using the latest schematic. The version I have is dated 2019/10. Is there another version that is available from your website?
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Schematic updates are still in progress. Since I don't have my own website and ftp.xdevs.com is blocked for Russian IP addresses, the results will be traditionally uploaded to KO4BB.
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Drawing a complete circuit diagram of the AC block turned out to be longer than I thought. Therefore, I sketched a simplified diagram by hand for a general understanding of the principles of operation.
[attach=1]
This year I did a ton of experiments on the new R6581 to find out the factors behind the high non-linearity of the ADC. Previously, the input amplifier, power supply, filter capacitors were excluded from the list of suspects.
1) I dismantled both op-amps in the integrator and installed sockets for quick replacement.
[attach=2]
2) I completely replaced the integrator with the hybrid version used in the HP3458A.
[attach=3]
3) I installed panels for quick replacement of FET transistors. It is clearly seen that only the switches of the first source of the discharge current affect the nonlinearity.
[attach=4]
4) I did a few more different tests to rule out other passive and active elements of the ADC circuit.
[attach=5]
In fact, the only thing that can significantly affect (mostly worsening) the nonlinearity is a change in the slew rate of the second op amp of the integrator U206 and the inconsistency in the characteristics of transistors Q204 and Q205 of the first discharge current modulator. Assuming that there could be a problem with the selection of transistors Q204 and Q205 (SD215) in production, I decided to replace them with a quad version of them in the form of SD5400.
[attach=6]
Good news: Finally, the long-awaited non-linearity improvement! Moreover, not only the gap in the ADC conversion function at the zero point of the scale has been reduced, but the temperature stability of the nonlinearity has also improved.
Bad news: the improvement is not significant enough to take my multimeter out of the category of outsiders :)
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Wow, that's an amazing effort and result. If not you, who else could have solved the issue to most extent? Great job, well done :-+
Let us know more about the upgrade, did you use all 4 switches by paralleling them or only two of them, leaving the other two unconnected?
-branadic-
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The best effect was the use of all SD5400 transistors in the form of two pairs. However, after replacing Q204-Q205 with SD5400 paired transistors, the multimeter fails the amplifier FAST zero offset self-test. This offset is not due to the amplifier itself, but to a slight offset in the voltage controlled current source of the ADC with an integration time <=100 µs. The problem was solved by a jumper between the balancing pins 7-8 of the LT1220 FAST amplifier.
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Seeing a slight improvement from 2 switches in parallel suggest that the switch resistance could be an issue.
I am a bit surprised to see so much effect of the switches. Normally the current sources for the reference should compensate for much of the switch resistance.
For the transient part the speed of the current sources may be a factor too. So the fast OP-amp in the current sources could have an effec, possibly similar to the OP in the integrator.
A shift in the offset for the fast mode could also be from more charge injection with 2 switches in parallel. The fast mode of the ADC uses faster modulation and thus sees more of the charge injection.
Q204 and Q205 together work as a SPDT switch. If desparate for another alternative version to test, one could try a CMOS chip here (e.g. 1/3 74LV4053 or one of many single versions. AFAIK the nwer ADCMT 7481 still used a similar ADC, but with CMOS switch chips instead of the discrete MOSFETs.
-
After more than 4 years of studying the R6581 firmware, I found confirmation that almost all the problems that were discussed in this thread (ADC non-linearity, reverse error, errors in high-resistance measurement ranges, etc.) were known at the stage of device development and for their solution the firmware provides a factory setting mode (not to be confused with Debug Mode). The only problem is that the fact of the existence of this mode, the methods of its use (as well as access to it) is the proprietary information of Advantest / ADC Corporation. As far as I know, not a single commercial partner of ADC Corporation in Europe and the USA has access to this information, even under an NDA.
To confirm this thesis, the screenshot [attach=1] shows a code fragment of the ADC data stream handler, where you can see the calls to the non-linearity correction procedure using a piecewise linear function.
In total, in the factory setting mode [attach=2], 51 coefficients are set, covering all the most critical modes and measuring ranges of the device.
For example, my above adventures with the elimination of non-linearity could have been avoided even by simply turning off the factory correction mode, since, as ADC Corp. for all multimeters sets some average coefficients and does not test linearity individually.
Calculating the coefficients for the DCV function is not easy and requires a highly linear voltage calibrator. For the ACV function, I still cannot suggest a calculation method at all, since many coefficients are expressed in units of the scale of a multichannel DAC.
Unfortunately, the world economic crisis, multiplied by the replenishment in my family, forced me to suspend work on this topic until better times (perhaps for a year or two). But in general, I can say that I began to like the multimeter even more :)
-
Having a hidden "correction" with wrong parameters can be really confusing. Some of the changes to the hardware still had an effect, though not very large in comparison.
The SW part could explain a lot: the rather stable observed INL curve with the 6581T and the much better INL in there premium grade meters (likely with adjusted coeffcients).
-
Hi Mickle T.,
Thank you for your update! You may have caused R6581 owners to be very hopeful that the performance of this instrument can be improved. For example, I never figured out why sourcing 1 DCV on the 10 DCV range was out of tolerance even after replacing many suspicious components. Perhaps your software insight could correct this artifact.
Will you provide a tutorial on how to adjust calibration parameters in the future? I think the community would really benefit from your research. :-DMM
I am also curious to know if you observed any artifacts on the resistance and current ranges.
Regards.
-
Now it's getting interesting!
To summarize, all the effort put into this thread, changing and replacing many components proves a pretty robust design and many contributors already expected some linearization happing somewhere in the background. But you seem to have found it and proved it to work. Amazing. :-+
I would like to know more, since it's the better approach compared to post correction I presented.
-branadic-
-
Now that we have been teasered and are waiting for MickleT. to respond, I've looked through the firmware files myself (Notepad++ with HEX-Editor plugin). Here is what I've extracted as pure text. I'm not an expert, so maybe someone else wants to look into it and find something indicating the special service mode MickleT. mentioned?
ADVANTEST,R6581 ,0,A02 ADVANTEST,R6581D,0,A02
6581.DAT R6581.PNL R6581.DAT
R6581
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
"VOLT:DC" "VOLT:AC" "CURR:DC" "CURR:AC" "RES" "FRES" "FREQ" "PER"
+1.00E-01 +1.00E+00 +1.00E+01 +1.00E+02 +1.00E+03
+1.00E-02 +1.00E-01 +1.00E+00 +1.00E+01 +1.00E+02 +7.50E+02
+1.00E-07 +1.00E-06 +1.00E-05 +1.00E-04 +1.00E-03 +1.00E-02 +1.00E-01 +1.00E+00
+1.00E-04 +1.00E-03 +1.00E-02 +1.00E-01 +1.00E+00 +1.00E+01 +1.00E+02 +1.00E+03 +1.00E+04 +1.00E+05 +1.00E+06 +1.00E+07 +1.00E+08 +1.00E+09
3.00 4.00 5.00 6.00 7.00 8.00
+1.00000E-06 +2.00000E-06 +3.00000E-06 +4.00000E-06 +5.00000E-06 +6.00000E-06 +7.00000E-06 +8.00000E-06 +9.00000E-06
+1.00000E-05 +2.00000E-05 +3.00000E-05 +4.00000E-05 +5.00000E-05 +6.00000E-05 +7.00000E-05 +8.00000E-05 +9.00000E-05
+1.00000E-04 +2.00000E-04 +3.00000E-04 +4.00000E-04 +5.00000E-04 +6.00000E-04 +7.00000E-04 +8.00000E-04 +9.00000E-04
+1.00000E-03 +2.00000E-03 +3.00000E-03 +4.00000E-03 +5.00000E-03 +6.00000E-03 +7.00000E-03 +8.00000E-03 +9.00000E-03
+1.00000E-02 +2.00000E-02 +4.00000E-02 +6.00000E-02 +8.00000E-02
+1.00000E-01 +1.20000E-01 +1.40000E-01 +1.60000E-01 +1.80000E-01 +2.00000E-01 +4.00000E-01 +6.00000E-01 +8.00000E-01
+1.00000E+00 +1.20000E+00 +1.40000E+00 +1.60000E+00 +1.80000E+00 +2.00000E+00 +1.00000E-04 +1.00000E-03 +1.00000E-02
+1.00000E-01 +1.00000E+00 +1.00000E-06 +2.00000E-06 +3.00000E-06 +4.00000E-06 +5.00000E-06 +6.00000E-06 +7.00000E-06 +8.00000E-06 +9.00000E-06
+1.00000E-05 +2.00000E-05 +3.00000E-05 +4.00000E-05 +5.00000E-05 +6.00000E-05 +7.00000E-05 +8.00000E-05 +9.00000E-05
+1.00000E-04 +2.00000E-04 +3.00000E-04 +4.00000E-04 +5.00000E-04 +6.00000E-04 +7.00000E-04 +8.00000E-04 +9.00000E-04
+1.00000E-03 +2.00000E-03 +3.00000E-03 +4.00000E-03 +5.00000E-03 +6.00000E-03 +7.00000E-03 +8.00000E-03 +9.00000E-03
+1.00000E-02 +1.66666E-02 +3.33333E-02 +5.00000E-02 +6.66666E-02 +8.33333E-02
+1.00000E-01 +1.16666E-01 +1.33333E-01 +1.50000E-01 +1.66666E-01 +3.33333E-01 +5.00000E-01 +6.66666E-01 +8.33333E-01
+1.00000E+00 +1.16666E+00 +1.33333E+00 +1.50000E+00 +1.66666E+00 +1.00000E-04 +1.00000E-03 +1.00000E-02 +1.00000E-01
+1.00000E+00 +5.00000E-05 +1.00000E-04 +1.50000E-04 +2.00000E-04 +2.50000E-04 +3.00000E-04 +3.50000E-04 +4.00000E-04 +4.50000E-04 +5.00000E-04
+1.00000E-03 +1.50000E-03 +2.00000E-03 +2.50000E-03 +3.00000E-03 +3.50000E-03 +4.00000E-03 +4.50000E-03 +5.00000E-03
+1.00000E-02 +1.50000E-02 +2.00000E-02 +2.50000E-02 +3.00000E-02 +3.50000E-02 +4.00000E-02 +4.50000E-02 +5.00000E-02
+1.00000E-01 +1.50000E-01 +2.00000E-01 +2.50000E-01 +3.00000E-01 +3.50000E-01 +4.00000E-01 +4.50000E-01 +5.00000E-01
+1.00000E+00 +2.00000E+00 +3.00000E+00 +4.00000E+00 +5.00000E+00 +6.00000E+00 +7.00000E+00 +8.00000E+00 +9.00000E+00
+1.00000E+01 +2.00000E+01 +3.00000E+01 +4.00000E+01 +5.00000E+01 +6.00000E+01 +7.00000E+01 +8.00000E+01 +9.00000E+01
+1.00000E+02 +6.00000E-05 +1.20000E-04 +1.80000E-04 +2.40000E-04 +3.00000E-04 +3.60000E-04 +4.20000E-04 +4.80000E-04
+5.40000E-04 +6.00000E-04 +1.20000E-03 +1.80000E-03 +2.40000E-03 +3.00000E-03 +3.60000E-03 +4.20000E-03 +4.80000E-03
+5.40000E-03 +6.00000E-03 +1.20000E-02 +1.80000E-02 +2.40000E-02 +3.00000E-02 +3.60000E-02 +4.20000E-02 +4.80000E-02
+5.40000E-02 +6.00000E-02 +1.20000E-01 +1.80000E-01 +2.40000E-01 +3.00000E-01 +3.60000E-01 +4.20000E-01 +4.80000E-01
+5.40000E-01 +6.00000E-01 +1.00000E+00 +2.00000E+00 +3.00000E+00 +4.00000E+00 +5.00000E+00 +6.00000E+00 +7.00000E+00
+8.00000E+00 +9.00000E+00 +1.00000E+01 +2.00000E+01 +3.00000E+01 +4.00000E+01 +5.00000E+01 +6.00000E+01 +7.00000E+01
+8.00000E+01 +9.00000E+01 +1.00000E+02
+2.00000E-05
+3.00000E-05
+4.00000E-05 +5.00000E-05 +6.00000E-05 +7.00000E-05 +8.00000E-05 +9.00000E-05 +1.00000E-04
+2.00000E-04 +3.00000E-04 +4.00000E-04 +5.00000E-04 +6.00000E-04 +7.00000E-04 +8.00000E-04 +9.00000E-04
+1.00000E-03 +2.00000E-03 +3.00000E-03 +4.00000E-03 +5.00000E-03 +6.00000E-03 +7.00000E-03 +8.00000E-03
AC DC FAST MID SLOW FREQ PER OCOM CHEC VOLT CURR
-500 500 0 LOW HI IMM MAN EXT BUS LEV TLIN LINE TIM
+0.00000000E+00 +9.99999999E+05 +0.00000000E+00
+1.00000000E-03 +9.99999999E+05 +1.00000000E+00
+1.00000E+00 +1.00000E+05 +1.00000E+00 +9.90000E+37
MEM GPIB
-120 120 0 NEG POS INT16 INT32 NONE SMO AVER MEDI
2 100 10 NONE SCAL DEV DELT DB RMS DBM OTEM RTD
-9.99999999E+17 +9.99999999E+17 +1.00000000E+00
-9.99999999E+17 +9.99999999E+17 +1.00000000E+00
2 10000 10
+1.00000000E-17 +9.99999999E+17 +1.00000000E+00
-9.99999999E+17 +9.99999999E+17 +1.00000000E+00
-9.99999999E+17 +9.99999999E+17 +0.00000000E+00
-9.99999999E+17 +9.99999999E+17 +1.00000000E+00
-1.000E+02 +1.000E+02 +2.000E+01
+1.00000000E-17 +9.99999999E+17 +1.00000000E+00
IPTS ITS C F K
-9.99999999E+51 +9.99999999E+51 +0.00000000E+00
OFF FAIL PASS
2 10000 10
+9.00000000E+00 +1.10000000E+01 +1.00000000E+01
+9.00000000E+03 +1.10000000E+04 +1.00000000E+04
0 46 0 0 46 46 d ’ d d ’ ’ 100 146 100 100 146 146
203 200 200 203 203
300 303 300 300 303 303
400 406 400 400 406 406
500 518 500 500 518 518
600 662 600 600 662 662
0 25 0 0 25 25
0 29 0 0 29 29
1 10 1 1 10 5 1 5 1 1 5 5
FULL PRET
1
10000
1000
-9999
9999
0
-9999
9999
999
MAN EXT BUS
1
100000
1000
0
99999
0
0
99999
999
ASC REAL64 NONE HEAD SHE LIM 4WCH CHAN NULL DFIL FORM TIME FLO LOW FRON REAR 50Hz 60Hz COMM SPAC CRLF CRLF LF EOI LFEO
ANALOG OUTPUT
PRINTER
BCD OUTPUT
SCANNER
SCANNER
"No error" -100,"Command error" -101,"Invalid character" -102,"Syntax error" -103,"Invalid separator" -104,"Data type error" -105,"Get not allowed" -108,
"Parameter not allowed" -109,"Missing parameter" -110,"Command header error" -111,"Header separator error" -112,"Program mnemonic too long" -113,
"Undefined header" -114,"Header suffix out of range" -120,"Numeric data error" -121,"Invalid character in number" -123,"Exponent too large" -124,
"Too many digits" -128,"Numeric data not allowed" -131,"Invalid suffix" -140,"Character data error" -141,"Invalid character data" -144,"Character data too long" -148,
"Character data not allowed" -150,"String data error" -151,"Invalid string data" -154,"String data too long" -158,"String data not allowed" -160,"Block data error" -161,
"Invalid block data" -168,"Block data not allowed" -170,"Expression error" -171,"Invalid expression" -178,"Expression data not allowed" -200,"Execution error" -201,
"Invalid while in local" -202,"Setting lost due to rtl" -210,"Trigger error" -211,"Trigger ignored" -212,"Arm ignored" -213,"Init ignored" -214,"Trigger deadlock" -215,
"Arm deadlock" -211,"Trigger ignored(IDLE)" -211,"Trigger ignored(at Arm Layer)" -211,"Trigger ignored(at Arm Layer2)" -211,"Trigger ignored(at Trigger Layer)" -212,
"Arm ignored(IDLE)" -212,"Arm ignored(at Arm Layer)" -212,"Arm ignored(at Arm Layer2)" -212,"Arm ignored(at Trigger Layer)" -213,"Init ignored(IDLE)" -213,
"Init ignored(at Arm Layer)" -213,"Init ignored(at Arm Layer2)" -213,"Init ignored(at Trigger Layer)" -220,"Parameter error" -221,"Setting Conflict" -222,
"Data out of range" -223,"Too much data" -224,"Illegal parameter value" -224,"Illegal parameter value (lower limit>upper limit)" -230,"Data corrupt or stale" -241,
"Hardware missing" -252,"Missing media" -253,"Corrupt media" -254,"Media full" -255,"Directory full" -256,"File name not found" -257,"File name error" -258,
"Media protected" -260,"Expression error" -261,"Math error in expression" -311,"Memory error" -313,"Calibration memory lost" -314,"Save/recall memory lost" -315,
"Configuration memory lost" -330,"Self-test failed" -350,"Queue overflow" -410,"Query INTERRUPTED" -420,"Query UNTERMINATED" -430,"Query DEADLOCKED" -440,
"Query UNTERMINATED after indefinite response" +100,"Cannot execute in this function" +101,"Cannot execute in FAST mode" +102,"Cannot execute while storing" +102,
"Cannot execute while storing (FAST mode)" +103,"Cannot execute in the ALARM" +104,"Cannot execute in setting hardware" +105,"Cannot execute in this DMM" +110,
"Query data nothing" +111,"Invalid ASCII data" +112,"No recall data" +113,"End of file" +120,"Key buffer overflow" +121,"Input Queue overflow" +130,
"Math error (Duplicate execution)" +131,"Math data error" +140,"Bad battery of memorycard" +200,"Interface error (Accessory)" +201,"Accessory error" +210,
"Communication error (Analog)" +211,"Communication error" +220,"A/D check1 error" +221,"A/D check2 error" +222,"A/D check3 error" +223,"A/D check4 error" +224,
"A/D check5 error" +230,"Internal zero error" +240,"Internal Reference1 error" +250,"Internal Reference2 error" +251,"Internal Reference2 error" +252,
"Internal Reference2 error" +253,"Internal Reference2 error" +254,"Internal Reference2 error" +255,"Internal Reference2 error" +260,"Internal Reference3 error" +261,
"Internal Reference3 error" +262,"Internal Reference3 error" +263,"Internal Reference3 error" +264,"Internal Reference3 error" +265,"Internal Reference3 error" +266,
"Internal Reference3 error" +267,"Internal Reference3 error" +268,"Internal Reference3 error" +269,"Internal Reference3 error" +270,"Internal Reference3 error" +271,
"Internal Reference3 error" +272,"Internal Reference3 error" +273,"Internal Reference3 error" +274,"Internal Reference3 error" +275,"Internal Reference3 error" +276,
"Internal Temperature error" +280,"Level Trigger error" +281,"Level Trigger error" +282,"Level Trigger error" +283,"Level Trigger error" +290,
"Communication error (from panel to main)" +293,"D.P.RAM Read/Write error (Main)" +300,"Internal AC error" +301,"Internal AC error" +302,"Internal AC error" +303,
"Internal AC error" +304,"Internal AC error" +305,"Internal AC error" +306,"Internal AC error" +307,"Internal AC error" +308,"Internal AC error" +309,
"Internal AC error" +310,"Internal AC error" +311,"Internal AC error" +312,"Internal AC error" +313,"Internal AC error" +314,"Internal AC error" +315,
"Internal AC error" +316,"Internal AC error" +317,"Internal AC error" +318,"Internal AC error" +319,"Internal AC error" +320,"Internal AC error" +321,
"Internal AC error" +322,"Internal AC error" +323,"Internal AC error" +400,"A/D error" +410,"FAN error" +510,"Cannot execute External Calibration" +500,
"External Calibration Error No.0" +500,"External Calibration Error No.1" +500,"External Calibration Error No.2" +500,"External Calibration Error No.3" +500,
"External Calibration Error No.4" +500,"External Calibration Error No.5" +500,"External Calibration Error No.6" +500,"External Calibration Error No.7" +500,
"External Calibration Error No.8" +500,"External Calibration Error No.9" +500,"External Calibration Error No.10" +500,"External Calibration Error No.11" +500,
"External Calibration Error No.12" +500,"External Calibration Error No.13" +500,"External Calibration Error No.14" +500,"External Calibration Error No.15" +500,
"External Calibration Error No.16" +500,"External Calibration Error No.17" +500,"External Calibration Error No.18" +500,"External Calibration Error No.19" +500,
"External Calibration Error No.20" +500,"External Calibration Error No.21" +500,"External Calibration Error No.22" +500,"External Calibration Error No.23" +500,
"External Calibration Error No.24" +500,"External Calibration Error No.25" +500,"External Calibration Error No.26" +500,"External Calibration Error No.27" +500,
"External Calibration Error No.28" +500,"External Calibration Error No.29" +500,"External Calibration Error No.30" +500,"External Calibration Error No.31" +500,
"External Calibration Error No.32" +500,"External Calibration Error No.33" +500,"External Calibration Error No.34" +500,"External Calibration Error No.35" +500,
"External Calibration Error No.36" +500,"External Calibration Error No.37" +500,"External Calibration Error No.38" +500,"External Calibration Error No.39" +500,
"External Calibration Error No.40" +500,"External Calibration Error No.41" +500,"External Calibration Error No.42" +500,"External Calibration Error No.43" +500,
"External Calibration Error No.44" +500,"External Calibration Error No.45" +500,"External Calibration Error No.46" +500,"External Calibration Error No.100" +500,
"External Calibration Error No.101" +500,"External Calibration Error No.102" +500,"External Calibration Error No.103" +500,"External Calibration Error No.104" +500,
"External Calibration Error No.105" +500,"External Calibration Error No.106" +500,"External Calibration Error No.107" +500,"External Calibration Error No.108" +500,
"External Calibration Error No.109" +500,"External Calibration Error No.110" +500,"External Calibration Error No.111" +500,"External Calibration Error No.112" +500,
"External Calibration Error No.113" +500,"External Calibration Error No.114" +500,"External Calibration Error No.115" +500,"External Calibration Error No.116" +500,
"External Calibration Error No.117" +500,"External Calibration Error No.118" +500,"External Calibration Error No.119" +500,"External Calibration Error No.120" +500,
"External Calibration Error No.121" +500,"External Calibration Error No.122" +500,"External Calibration Error No.123" +500,"External Calibration Error No.124" +500,
"External Calibration Error No.125" +500,"External Calibration Error No.126" +500,"External Calibration Error No.127" +500,"External Calibration Error No.128" +500,
"External Calibration Error No.129" +500,"External Calibration Error No.130" +500,"External Calibration Error No.131" +500,"External Calibration Error No.132" +500,
"External Calibration Error No.133" +500,"External Calibration Error No.134" +500,"External Calibration Error No.135" +500,"External Calibration Error No.136" +500,
"External Calibration Error No.137" +500,"External Calibration Error No.138" +500,"External Calibration Error No.139" +500,"External Calibration Error No.140" +500,
"External Calibration Error No.141" +500,"External Calibration Error No.142" +500,"External Calibration Error No.143" +500,"External Calibration Error No.144" +500,
"External Calibration Error No.145" +500,"External Calibration Error No.146" +500,"External Calibration Error No.200" +500,"External Calibration Error No.201" +500,
"External Calibration Error No.202" +500,"External Calibration Error No.203" +500,"External Calibration Error No.300" +500,"External Calibration Error No.301" +500,
"External Calibration Error No.302" +500,"External Calibration Error No.303" +600,"Internal Calibration Error No.400" +600,"Internal Calibration Error No.401" +600,
"Internal Calibration Error No.402" +600,"Internal Calibration Error No.403" +600,"Internal Calibration Error No.404" +600,"Internal Calibration Error No.405" +600,
"Internal Calibration Error No.406" +600,"Internal Calibration Error No.407" +600,"Internal Calibration Error No.408" +600,"Internal Calibration Error No.409" +600,
"Internal Calibration Error No.500" +600,"Internal Calibration Error No.501" +600,"Internal Calibration Error No.502" +600,"Internal Calibration Error No.503" +600,
"Internal Calibration Error No.504" +600,"Internal Calibration Error No.505" +600,"Internal Calibration Error No.506" +600,"Internal Calibration Error No.507" +600,
"Internal Calibration Error No.508" +600,"Internal Calibration Error No.509" +600,"Internal Calibration Error No.510" +600,"Internal Calibration Error No.511" +600,
"Internal Calibration Error No.512" +600,"Internal Calibration Error No.513" +600,"Internal Calibration Error No.514" +600,"Internal Calibration Error No.515" +600,
"Internal Calibration Error No.516" +600,"Internal Calibration Error No.517" +600,"Internal Calibration Error No.518" +600,"Internal Calibration Error No.600" +600,
"Internal Calibration Error No.601" +600,"Internal Calibration Error No.602" +600,"Internal Calibration Error No.603" +600,"Internal Calibration Error No.604" +600,
"Internal Calibration Error No.605" +600,"Internal Calibration Error No.606" +600,"Internal Calibration Error No.607" +600,"Internal Calibration Error No.608" +600,
"Internal Calibration Error No.609" +600,"Internal Calibration Error No.610" +600,"Internal Calibration Error No.611" +600,"Internal Calibration Error No.612" +600,
"Internal Calibration Error No.613" +600,"Internal Calibration Error No.614" +600,"Internal Calibration Error No.615" +600,"Internal Calibration Error No.616" +600,
"Internal Calibration Error No.617" +600,"Internal Calibration Error No.618" +600,"Internal Calibration Error No.619" +600,"Internal Calibration Error No.620" +600,
"Internal Calibration Error No.621" +600,"Internal Calibration Error No.622" +600,"Internal Calibration Error No.623" +600,"Internal Calibration Error No.624" +600,
"Internal Calibration Error No.625" +600,"Internal Calibration Error No.626" +600,"Internal Calibration Error No.627" +600,"Internal Calibration Error No.628" +600,
"Internal Calibration Error No.629" +600,"Internal Calibration Error No.630" +600,"Internal Calibration Error No.631" +600,"Internal Calibration Error No.632" +600,
"Internal Calibration Error No.633" +600,"Internal Calibration Error No.634" +600,"Internal Calibration Error No.635" +600,"Internal Calibration Error No.636" +600,
"Internal Calibration Error No.637" +600,"Internal Calibration Error No.638" +600,"Internal Calibration Error No.639" +600,"Internal Calibration Error No.640" +600,
"Internal Calibration Error No.641" +600,"Internal Calibration Error No.642" +600,"Internal Calibration Error No.643" +600,"Internal Calibration Error No.644" +600,
"Internal Calibration Error No.645" +600,"Internal Calibration Error No.646"
PRI BC DACO FC FS MCP MRO MRD MST MSD MCI MFR MADL MCT IRFD IRPO IRO IRD INS ISE QCL PRE OSE OSR QSE QSR MSE TLD TL TES TRC TRD SCT SCC SCS SCP
ART ARN ARS INIC DFO FT TIME DATE IN LGU LF DS STAD BP LOP LO CO RTD TI AZ POH PDV FPT FPI OCHK *WAI *SRE *SAV *OPC
KOTT ISPS MRPO KRMS IRFZ KOTL IRNO KZMD KYMD KXMD OCMP LOMD KDEV IRFG *TST *RST HIMD KDBM *OPT ICAL *TRG *ESR *STB *CLS *RCL *ESE *IDN RTU TRT
TRS TRP TRN TLS MSR MSP MRP MNS FTR TIN SUB ERR STA RAT MIP AVN SCN ARP HIP INI PLC MDL AVE SCD FPC ICL ARD ARC DAO ABO KDB CAL DFE ICALOHT ICALDCT
ICALACT ST KZ KY KX SM SL RL IT BZ GT NL KN RE CS FL HI DL DI CF DA KDEVMD ICALOH KDBMMD Z ICALDC ICALAC R F E CALZR CALZF CALOH KDBMD CALDC NV
SUBM? SUBM FILTER? FILT FILTER APER? APER NPLC? NPLC
RANG: APERTURE COUPLING RANGE? DIGITS? RANGE: NPLCYCLES APERTURE? SUBMEASURE COUPLING? COUP NPLCYCLES? DIG RANG SUBMEASURE? SUBMEASURE: COUP? SUBM: FILT? RANGE DIG? DIGITS RANG?
COMP? COMPLETE? COUNT? COUNT
DELAY LAYER2: SOURCE? SOURCE: DEL? COMPLETE PASS SOUR? COUN DELAY? SOUR: COMP SOURCE LAY2: DEL PASS? COUN? SOUR
DELAY COMP? SOURCE? SOURCE: DEL? COMPLETE PASS SOUR? COUN DELAY? SOUR: COMP SOURCE DEL PASS? COUN? SOUR
STATE?
STAT STAT? STATE
EXTERNAL EXT? EXTERNAL? EXT: EXTERNAL: INT: EXT INTERNAL:
STATISTICS: LIMIT: FORMAT: FORMAT?
DFILTER DFIL: FORM DFILTER? STAT: NULL: FORM? DFILTER: FORM: DFIL LIM: FORMAT DFIL?
LENG? LENG
TEMP TEMP? LENGTH LENGTH?
RTD? RTD OTEMPERATURE: RMS? SCALING:
DEV? OTEM: STATE? RMS DB? STAT DBM? SCAL: DEVIATION DEV STATE DB STAT? DBM RTD: DEVIATION?
BEEP? BEEPER? BEEP UPP? UPP LOWER?
LOW STAT? STATE? LOW? PASS: BEEPER UPPER LOWER UPPER? STAT STATE
UPP UPPER MID? LOW LOWER MID UPP? UPPER? LOW? LOWER?
FRESISTANCE RESISTANCE VOLT: PERIOD VOLTAGE: CURRENT: CURR: FRES RES FREQ PER FREQUENCY
COUN? COUN
STAT? COUNT STAT STATE? STATE DATA? COUNT?
AC: DC:
APER? APER APERTURE
DIGITS? NPLCYCLES? DIG? RANGE NPLC? RANG? DIGITS NPLCYCLES RANG: DIG APERTURE? NPLC RANG RANGE? RANGE:
PROTECTION? PROTECTION APER? APER NPLC
RANGE: NPLCYCLES RANGE NPLC? APERTURE? RANG? DIGITS? RANG: APERTURE RANG RAT? DIGITS RATIO? RAT PROT? RATIO DIG? PROT NPLCYCLES? RANGE? DIG
ALL
BLOC? BLOCK
BLOC STRING STR STRING? STR? BLOCK?
AVER STAT? STAT
AVER? AVERAGE? STATE STATE? SMO SMOOTHING SMO? AVERAGE SMOOTHING?
NUMBER NUMB? NUMBER? POIN POINTS NUMB
POIN? POINTS? STATE STAT STATE? STAT? POIN POINTS
NUMBER NUMB? NUMBER? DATA? EEPROM: RAM NUMB
NUMBER NUMB? NUMBER? DATA? EEPROM: RAM NUMB
EEPROM: OHM
OHM: DCV? DCV: ZERO: OHM? DCV
FRONT
REAR FRON FRONT: REAR: FRON:
ELEMENTS? DATA ELEM DATA? ELEM? ELEMENTS
LEVEL COUP? COUPLING? SOURCE
RANGE: SOURCE? COUP APERTURE? APER? RANG: APERTURE APER LEV? COUPLING CURRENT: SOUR? LEV LEVEL? VOLT: SOUR VOLTAGE: CURR:
DELI: DELIMITER:
HOSEI: NUMB? EEPROM:
HOSEI NUMBER? RAM? TEMP? NUMBER RAM NUMB TEMPERATURE? HOSEI?
HOSEI: NUMB? EEPROM:
HOSEI NUMBER? RAM? TEMP? NUMBER RAM NUMB TEMPERATURE? HOSEI?
*WAI *SRE? *SRE *RST *OPC
*ESE *ESE? *IDN? *TST? *OPT? *TRG *SAV *ESR? *STB? *CLS *RCL *OPC?
CONTINUOUS CONT? CONTINUOUS? CONT
TERMINAL GUAR? GUAR
GUARD GUARD? TERM TERMINAL? TERM?
OHM:
ALL AC: OHM DCV: AC DCV
NUMB NUMBER
TEMPERATURE? RAM TEMP? NUMB? NUMBER? RAM? EEPROM:
OUTPUT: :OUTPUT: ROUTE: :ROUTE: TRAC: TRACE: :TRACE: STAT: :STAT: :STATUS: TSYS: :TSYS: :TSYSTEM: :TRIG: TRIGGER: ABOR :ABOR INIT: :INIT: INITIATE: INIT :INIT FORM? :FORM? :FORMAT? :FORM :FORMAT FORM: :FORM: INP: :INP: LFRE? :LFRE? :DISP? :DISP :CAL: ITEMPERATURE? :ITEMPERATURE? :PER: :CURRENT: *WAI *SRE? *SRE *OPC
FORM DISP :CALIBRATION: MMEMORY: CURRENT: RES: *RST :SYSTEM: PER: INITIATE DISPLAY? ARM: :DISPLAY *TRG VOLTAGE: *SAV *CLS *RCL CAL: :LFREQUENCY? *ESE :FORMAT: FRESISTANCE: :PERIOD: :RESISTANCE: CALIBRATION: SYSTEM: STATUS: DISPLAY FORMAT? LFREQUENCY? :INPUT: FORMAT: PERIOD: RESISTANCE: :SENSE: :FREQUENCY: :CONFIGURE? :FETCH? WR :CONFIGURE: :CALCULATE: INPUT: FORMAT :SYST: :ROUT: :OUTP: :VOLT: SENSE: FREQUENCY: :ZERO: :ABORT :CURR: :SENS: CONFIGURE? FETCH? :ITEM? CONFIGURE: :FRES: :FREQ: :MMEM: :CONF? :TRAC: :FETC? :CONF: :READ? :INITIATE: CALCULATE: SYST: :CALC: ROUT: OUTP: VOLT: ZERO: ABORT CURR: SENS: TRIG: DISP? ITEM? FRES: FREQ: MMEM: CONF? *TST? :MMEMORY: FETC? CONF: :RES: *OPT? READ? :INITIATE :DISPLAY? :ARM: *ESR? *STB? :TRIGGER: :VOLTAGE: CALC: *OPC? *ESE? *IDN? :FRESISTANCE: TSYSTEM:
TRANSFER PST DRECALL: DSTORE:
PRECALL CAT? DSTORE DEL: DRECALL TRAN INIT DEL FREE? DELETE: PREC DREC: DELETE DST: PSTORE CATALOG? DREC INITIALIZE DST
STATE?
AUTO? LIMIT LIM LIMIT? LIM? AUTO
OCOM? OCOMPENSATED? OCOM OCOMPENSATED POW APER? APER DIG
RANG: RANGE: PROTECTION DIG? PROTECTION? APERTURE NPLCYCLES POWER PROT APERTURE? NPLCYCLES? POWER? PROT? DIGITS POW? DIGITS? NPLC RANG RANGE NPLC? RANG? RANGE?
SOURCE: APER? APER DIG
RANG: RANGE: DIG? APERTURE NPLCYCLES SOUR POWER APERTURE? SOURCE NPLCYCLES? SOUR? POWER? POW SOUR: SOURCE? DIGITS POW? DIGITS? NPLC RANG RANGE NPLC? RANG? RANGE?
SCAN
CLOSE CLOSE? OPEN CLOS SCAN? CLOS? SCAN:
STAT? STATE?
STAT STATE
LFRE? ITEM? ZERO: PER: RES: CURRENT:
RESISTANCE: VOLTAGE: FRESISTANCE: FRES: PERIOD: FREQ: ITEMPERATURE? LFREQUENCY? VOLT: FREQUENCY: CURR:
PRESET OPER:
MEASUREMENT: QUE: PRES OPERATION: QUEUE: QUES: MEAS: QUESTIONABLE:
ENABLE?
EVENT? ENABLE ENAB EVEN? ENAB?
ENABLE?
EVENT? ENABLE ENAB EVEN? ENAB?
ENABLE?
EVENT? ENABLE ENAB EVEN? ENAB?
STATE STATE? STAT STAT?
VERS? BEEPER:
DATE BEEP: ERROR? TIME? TIME ERR? VERSION? DATE? GPIB:
PRET?
PRET PRETRIGGER PRETRIGGER?
NUMBER? POIN? POINTS? POIN POINTS BCON? CLEAR
STATE CLE DATA: STAT? BCON BCONTROL? NUMBER NUMB? BCONTROL: STATE? FAST: STAT BCONTROL NUMB BCON: DATA?
POIN? POINTS? NUMB? NUMBER?
ZERO? DATA? GAIN?
COMPLETE? COUNT? COUNT
DELAY COMP? SOURCE? SOURCE: DEL? COMPLETE PASS SOUR? COUN DELAY? SOUR: COMP SOURCE DEL PASS? COUN? SOUR
TIM? TIMER TIMER? TIM
SLOPE?
SLOP SLOP? SLOPE
RATE? STATE STATE? STAT STAT? RATE
TIM? TIMER TIMER? TIM
TIM? TIMER TIMER? TIM
DISP DISPLAY DISP? DISPLAY?
SLOPE SLOPE? SLOP SLOP?
LAYER: LEVEL?
LEVEL: LEV? FAST: LEV: LAY: LEVEL EXTERNAL: LEV EXT:
DC AC
DC: AC:
AUTO AUTO?
RANGE? RANG RANG? RANGE
RANGE? RANG RANG? RANGE
STATE STATE? STAT STAT?
CLE
CLEAR
NUMBER NUMB? NUMBER? DATA? EEPROM: RAM NUMB
NUMBER NUMB? NUMBER? DATA? EEPROM: RAM NUMB
DEF? NEW?
DEF? NEW?
REF? DEF? NEW?
REF? DEF? NEW?
PROTECTION
STORE
DEF? NEW?
DEF? NEW?
DEF? NEW?
NUMB?
NUMB NUMBER NUMBER? STORE
NUMB?
NUMB NUMBER NUMBER? STORE
STAT? STAT
OFFS? COLUMN? OFFSET STATE COL OFFSET? STATE? COL? OFFS COLUMN
STAT? STATE?
STAT STATE
STAT? STATE?
STAT STATE
BCD:
ANALOGOUT: PRINTER: PRIN: ANAL: BCDOUT:
UNIT? UNIT
FAIL PASS OFF
RTD OTEMPERATURE
DELT DB DELTA DEV SCAL RMS OTEM DEVIATION SCALING NONE DBM
SMO NONE AVER SMOOTHING AVERAGE
CRLF LFEO LFEOI LF EOI
CRLF
SPAC COMM COMMA SPACE
MID SLOW FAST
REAL
ASC ASCII
VOLTAGE CURR CURRENT VOLT
LOW FLOAT FLO
FREQUENCY PERIOD FREQ PER
FRON
REAR FRONT
DEF INF MAXIMUM INFINITE MINIMUM DEFAULT MAX MIN
MEM MEMORY GPIB
POSITIVE NEG POS NEGATIVE
TIM EXT EXTERNAL
IMM TIMER MAN IMMEDIATE MANUAL LEVEL BUS LEV
TIM EXT EXTERNAL
IMM TLINK TIMER MAN TLIN IMMEDIATE MANUAL LEVEL BUS LEV
TIM LINE EXT EXTERNAL
IMM TIMER MAN IMMEDIATE MANUAL LEVEL BUS LEV
DC AC
FAST
OCOMPENSATED OCOM
CHECK OCOMPENSATED OCOM CHEC
HI LOW
INT INTEGER
IPTS68
ITS ITS90 IPTS
PRET
FULL PRETRIGGER
EXTERNAL
EXT MANUAL BUS MAN
FORMAT DFILTER NULL 4WCHECK
DFIL SHEADER TIMESTAMP CHANNEL CHAN 4WCH HEADER HEAD LIMIT FORM NONE TIME LIM SHE
MAX DEF MIN MAXIMUM MINIMUM DEFAULT
DEF
MAX MEASUREMENT MIN MAXIMUM MINIMUM DEFAULT MEAS
K C F
IT = RATE = PLC 1 2 3 4 5 6 7 8 9 10 20 30 40 50 60 70 80 90 100 200 300 400 500 600 700 800 900
LEVEL = %
START-CH No STOP-CH No CLOSE-CH No
EXTERNAL INTERNAL
ZERO DCV OHM ALL ACV
FREE= BYTE
FILE .PNL .DAT
OFF ON
DATE NV
TIME NV
INT TEMP=
LINE = 50Hz 60Hz
SELECT FILE No NV
PANEL .PNL NV
STORE DATA (MAX: NV
COUNT = N = NV
PASS FAIL UP: MID: LOW:
SAMPLE =
key:NEXT DATA SAMPLE MAX MIN MAX-MIN › SIGMA UCL LCL
CONFIGURE MODE RECALL CONFIG MODE PUSH FUNCTION,COMMAND,etc KEY PUSH EXIT OR HOME KEY PUSH MATH KEY OFF ON SET PROTECT CONFIGURE DCV SET RATIO INTEG-TIME DIGITS PROTECT
RATIO CONFIGURE ACV SELECT FILTER SELECT COUPLING SELECT SUBMEASURE INTEG-TIME DIGITS FILTER
COUPLING SUBMEASURE FAST MID SLOW AC ACDC OFF FREQUENCY PERIOD SELECT POWER CONFIGURE 2W
SELECT UPPER LIMIT SELECT LOWER LIMIT CONFIGURE 4W
SELECT LIMIT SELECT MEASURE HI LOW INTEG-TIME DIGITS MEASURE
RANGE-LIMIT POWER PROTECT ì RANGE-LIMIT POWER 10 100 1000 10k 100k 1000k 10M 100M 1000M NORMAL OHM-COMP NORMAL OHM-COMP WIRE-CHECK
CONFIGURE DCI INTEG-TIME DIGITS CONFIGURE ACI ì COUPLING SUBMEASURE SELECT FREQ,PERIOD CONFIGURE FREQ CONFIGURE PERIOD SELECT SOURCE FREQUENCY PERIOD GATE-TIME LEVEL COUPLING
SOURCE VOLTAGE CURRENT SET GATE-TIME 100˜S 1mS 10mS 100mS 1S
key:CHANGE INTEGRATION TIME
key:CHANGE RATE TIME
key:CHANGE GPIB ADDRESS
key:CHANGE NUMBER
key:CHANGE NUMBER
SELECT DIGITS 4Œ 5Œ 6Œ 7Œ 8Œ 4Œ 5Œ 6Œ 7Œ 4Œ 5Œ 6Œ
SELECT MENU ACCESSORY:NONE BEEPER
ACCESSORY:2WSCANNER BEEPER
ACCESSORY:4WSCANNER BEEPER
ACCESSORY:ANALOG
BEEPER
ACCESSORY:BCD BEEPER
ACCESSORY:PRINTER BEEPER
CALIBRATION DATA-FORMAT
DISPLAY GPIB INTERNAL-TEMP
LINE-FREQ MEMORYCARD RESETë ì
TEST TIME SET ANALOG OUTPUT CONFIG ANALOG OUT 119999999 SELECT OFFSET ADJUST VOLUME(1V) COLUMN OFFSET UNIT-CAL
key:SELECT COLUMN
SET BCD OUTPUT SET PRINTER SET SCANNER CONFIGURE SCANNER CHANNEL OPEN SCANNER OPEN CLOSE SET BEEPER CONFIG DATA-FORMAT SELECT DATA-FORMAT SET ELEMENTS DATA-FORMAT ELEMENTS ASCII REAL64 NONE HEADER:
NONE HEADER: COMP:
SUBMEAS-HEAD: COMP:
WIRE-CHECK: CHANNEL:
NULL: DFILTER:
FORMAT: TIMESTAMP:
SET DISPLAY SELECT CALIBRATION YES NO EXTERNAL INTERNAL ZERO-FRONT ZERO-REAR DCV OHM ALL DCV OHM AC ALL DCV OHM EXT CAL ZERO-FRONT EXECUTE ? EXT CAL ZERO_REAR EXECUTE ? EXT CAL DCV
EXECUTE ? EXT CAL OHM EXECUTE ? INT CAL ALL EXECUTE ? INT CAL DCV EXECUTE ? INT CAL OHM EXECUTE ? INT CAL AC EXECUTE ? CONFIGURE GPIB SELECT MODE SELECT LANGUAGE ADDRESS MODE LANGUAGE ADDRESSABLE
TALK-ONLY SCPI ADVANTEST MEMORYCARD SETUP INITIALIZE OK ? DELETE FILE DELETE ALL FILES ? FREE INITIALIZE TRANSFER
DELETE FILE ALL YES NO MEMORYCARD ACCESS MEMORYCARD CONFIGURE STORE
SELECT DEVICE SELECT BUFFER CNTL SELECT TRIG SOURCE CONFIGURE RECALL DATA RECALL MODE DEVICE SOURCE INTERNAL MEMORYCARD DATA PANEL BUFFER-FULL PRETRIGGER MANUAL EXTERNAL BUS INTERNAL MEMORY MANUAL AUTO
SELECT MATH FUNC SELECT FORMAT SET SCALING SELECT UNIT CONFIGURE OHM-TEMP SET STATISTICS SET COMPARATOR SELECT DFILTER SELECT ITS CONFIGURE RTD DFILTER FORMAT COMPARATOR
STATISTICS NONE SCALING DEVIATION DELTAë ì dB RMS dBm OHM-TEMP RTD X Y Z STORE key : MEASUREMENT DATA C F K TEMP LENGTH OFF ON READ UPPER LOWER SET-PASS BEEPER OFF FAIL PASS NONE SMOOTHING
AVERAGING IPTS68 ITS90 ITS UNIT CONFIGURE ARM CONFIGURE SCAN CONFIGURE TRIG SET PASS SET COMPLETE CONFIGURE SLOPE SELECT SLOPE CONFIG TRIG SYSTEM
SET INITIATE SET COUNT SET LAYERDISP TRIG SCAN ARM INITIATE SLOPE
LEVEL LAYERDISP FAST-MODE
HALT SOURCE PASS DELAY COUNT
COMPLETE IMMEDIATE MANUAL EXTERNAL
BUS LEVEL TIMER ì BUS LEVEL TIMER TLINK
BUS LEVEL TIMER LINE EXTERNAL-TRIG LEVEL-TRIG NEGATIVE POSITIVE PUSH TRIG KET CONTINUOUS-OFF CONTINUOUS-ON INFINITE NUMBER
SET FAST MODE CONFIG FAST MODE RATE DATA-COUNT TRIGGER FAST MODE SELECT INPUT FRONT REAR SELECT GUARD FLOAT LOW
1000 V Range 750 V Range 100 V Range 10 V Range 1000mV Range 100mV Range 10mV Range
10 Range 100 Range 1000 Range 10k Range 100k Range 1000k Range 10M Range 100M Range 1000M Range
10nA Range 100nA Range 1000nA Range 10˜A Range 100˜A Range 1000˜A Range 10mA Range 100mA Range 1000mA Range
mHz Hz kHz MHz
nS ˜S mS S
STORE:INTERNAL STORE:MEMORYCARD STORE SMOOTH AVERAGE
SCALING %DEVIAT DELTA dB RMS dBm OHMTEMP RTD
STATISTICS COUPLING:AC COUPLING:ACDC
MEASURE:OHM COMP WIRE:OK
OPEN:I-HI OPEN:V-HI OPEN:V-LO OPEN:VI-LO WIRE:NOT
SOURCE:VOLTAGE SOURCE:CURRENT E-09 E-06 E-03 E+00 E+03 E+06 E+37
990000000 mVDC VDC B/A
mVAC VAC
2W k 2W M 2W
nADC ˜ADC mADC ADC
nAAC ˜AAC mAAC AAC
mHz Hz kHz MHz
nSEC ˜SEC mSEC SEC
***** SET *****
DISPLAY OFF
OVERLOAD OVERFLOW
EXT CALIBRATING INT CALIBRATING STORING CAL DATA ZERO_FRONT ZERO_REAR DCV REF7.2 OHM REF10k DCV ACV DCI ACI OHM AC 4W HI 4W LO 2W HI 2W LO
FREQ INTERNAL OFFSET AC/DC GAIN TEMP
LAYER IDLE ARM SCAN TRIG
X= Y= Z= R= L= UP= LO= INPUT LIMIT OVER DIAG MODE RESET SRAM DRAM DISPLAY KEY ë ì TRANSFER A/D INTERNAL ë ì CURRENT AC OPTION
A_1 CHECK MƒA_2 CHECK AƒM_1 CHECK AƒM_2 CHECK MƒA_1 MƒA_2 AƒM_1 AƒM_2
A/D_1 CHECK A/D_2 CHECK A/D_3 CHECK A/D_4 CHECK A/D_5 CHECK A/D_1 A/D_2 A/D_3 A/D_4 A/D_5
INTERNAL CHECK 1Zero_1 1Zero_2 10Zero 100Zero 7.2Vref -10Vref -1Vref -0.1Vref Int_temp
CURRENT CHECK 10mA 1000uA 100uA 10uA 1000nA 100nA 10nA
AC CHECK AMP_OFF VCA_OFF AC_REF1 AC_REF2 ABS_DEAD1
ABS_DEAD2 ABS_OFF1 ABS_OFF2 10VF_1 10VF_2 10VF_3 10VF_4
OPTION CHECK ANALOGOUT PRINTER BCD SCANNER
SCANNER CHECK OPEN CLOSE
NUMBER : NAME : NONE CONFIGURE 2W 4W
UP DOWN MENU ERR? NULL AZERO STORE RECALL MATH TRIGGER î (UP ARROW) ì (LEFT ARROW) ë (RIGHT ARROW) í (DOWN ARROW) HOME EXIT ENTER FRONT/REAR LO-G 1980 01 01 00 00 00
PNL .DAT
R6581 RevA00 R6581D RevA00 R6581 FUNCTION: DCV ACV DCI ACI 2WOHM 4WOHM FREQ PERIOD 2WO 4WO FRQ PER
AC ACDC
DACV ACDCV ACI ACDCI
RANGE: AUTO 10mV 100mV 1000mV 10V 100V 750V 1000V
10nA 100nA 1000nA 10uA 100uA 1000uA 10mA 100mA 1000mA
10OHM 100OHM 1000OHM 10kOHM 100kOHM 1000kOHM 10MOHM 100MOHM 1000MOHM
IT= 1uSEC 2uSEC 3uSEC 4uSEC 5uSEC 6uSEC 7uSEC 8uSEC 9uSEC 10uSEC 20uSEC 30uSEC 40uSEC 50uSEC 60uSEC 70uSEC 80uSEC 90uSEC 100uSEC 200uSEC 300uSEC 400uSEC 500uSEC 600uSEC 700uSEC 800uSEC 900uSEC 1mSEC 2mSEC 3mSEC 4mSEC 5mSEC 6mSEC 7mSEC 8mSEC 9mSEC 10mSEC 100mSEC 1SEC
1PLC 2PLC 3PLC 4PLC 5PLC 6PLC 7PLC 8PLC 9PLC 10PLC 20PLC 30PLC 40PLC 50PLC 60PLC 70PLC 80PLC 90PLC 100PLC
OFF ON
PASS FAIL PAS FAL ERR
DIGITS: 3.5 4.5 5.5 6.5 7.5 8.5
:PROTECT: RATIO: FILTER: FAST MID SLOW
SUBMEAS:
OHM MEAS: OHM COMP WIRE CHK OK IHI VHI VLO VIL NOT
INPUT SOURCE: VOLTAGE CURRENT
LEVEL= AZERO: NULL: NULL= NUL
:DFILT: NONE SMOOTHING AVERAGING MEDIAN NON SMO AVE MED
SMOOTH= AVERAGE= FORMAT: SCALING DEVIATION DELTA dB RMS dBm OHM TEMP RTD SCL DEV DEL TMP
X= Y= Z= DEV= dB= RMS= dBm= TEMP= LENGTH= ITS: IPTS68 ITS90
UNIT: C F K
COMPARATOR: COMP UP= COMP LO= COMP UP: COMP MID: COMP LO: FAST MODE: FAST MODE DEV: MEMORY GPIB
FAST MODE RATE:
SCANNER: START CH: STOP CH: STORE MODE:0x 0123456789abcdef START No STOP No SAMPLE= NV
COUPLING: RANGE LIMIT UP: RANGE LIMIT LO: POWER: VOLT RANGE: CURR RANGE: COMP BEEP: COMP OUT
STATISTIC: STATIS= COMMA SPACE CRLF LF EOI LFEOI GPIB STRING:
GPIB BLOCK:
BEEP: LO GUARD: LOW FLOAT
INPUT: FRONT REAR
DATA FORMAT: DATA ELEMENT:0x ASCII REAL64
LAYER DISP: INITIATE CONTINUOUS: IMMEDIATE MANUAL BUS EXTERNAL LEVEL TLINK LINE TIMER
INFINITE ARM PASS: ARM SOURCE: ARM DELAY= ARM COUNT= ARM TIMER= ARM COMPLETE: SCAN PASS: SCAN SOURCE: SCAN DELAY= SCAN COUNT= SCAN TIMER= SCAN COMPLETE: TRIG PASS: TRIG SOURCE: TRIG DELAY= TRIG COUNT= TRIG TIMER= TRIG COMPLETE: TRIG SLOPE EXT: TRIG SLOPE LEVEL: POSITIVE NEGATIVE
TRIG LEVEL= INTERNAL MEMORY BUFFER CTRL: PRETRIG FULL
PRETRIG:
DATA POIN= RECALL POINT= MEMORYCARD SCANNER SCAN= BCD: PRINTER: ANALOGOUT: COLUMN= OFFSET:
For those who are curious where to find that part in the code MickleT. showed, here is a snippet:
DCV_Data_Processing XREF[1]: FUN_0000c7d0:0000c89a(*)
0000a974 4e 56 00 00 link.w A6,0
0000a978 48 e7 0c 00 movem.l { D5 D4},-(SP)
0000a97c 3a 2e 00 0a move.w (arg_2,A6),D5w
0000a980 38 2e 00 0e move.w (Tint_idx,A6),D4w
0000a984 2c 39 00 move.l (DAT_0023a49c).l,D6
23 a4 9c
0000a98a 2e 39 00 move.l (DAT_0023a4a0).l,D7
23 a4 a0
0000a990 41 f9 00 lea (0x4f6c20).l,A0
4f 6c 20
0000a996 4e b9 00 jsr math_sub.l undefined math_sub(void)
08 e3 d2
0000a99c 41 f9 00 lea (0x4f6c30).l,A0
4f 6c 30
0000a9a2 4e b9 00 jsr math_mul.l undefined math_mul(void)
08 e6 34
0000a9a8 41 f9 00 lea (0x4f6c28).l,A0
4f 6c 28
0000a9ae 4e b9 00 jsr math_sub.l undefined math_sub(void)
08 e3 d2
0000a9b4 23 c6 00 move.l D6,(Measurement_result).l
23 a4 bc
0000a9ba 23 c7 00 move.l D7,(Measurement_result_).l
23 a4 c0
0000a9c0 0c 45 00 03 cmpi.w #3,D5w
0000a9c4 66 0c bne.b loc_A9D2
0000a9c6 0c 44 00 2e cmpi.w #46,D4w
0000a9ca 6d 06 blt.b loc_A9D2
0000a9cc 4e ba 02 94 jsr ADC_Linearization undefined ADC_Linearization(void)
0000a9d0 60 0a bra.b loc_A9DC
Edit:
On RadioKot (https://radiokot.ru/forum/viewtopic.php?p=4252259#p4252259) MickleT. posted some info about his findings of R6581 firmware:
So these are some kind of "cheat codes" :)
My hope to find signature files, like the libraries themselves, faded away every year and today has completely died out. The Japanese did not exactly take the source from Plauger's floppy disks, but some rather close version, which they supplemented with pieces from other libraries and their own creativity. As a result, we got a monster, in which there are four types of string copying operations alone (with and without a terminator, with direct order of arguments and reverse, with result and void).
So I gave up on automation and manually parsed the most critical of STDIO, SDTLIB, MATH and STRINGS. At the moment, in the firmware of my experimental R6581, out of 2677 functions, 600-odd pieces have been identified and data structures of the same order have been parsed. I understand perfectly well that this is a drop in the ocean, and that I have not yet been closely involved in the analysis of low-level exchange protocols with iron (due to the lack of a "wide" logic analyzer), but in the end it's just fun
Here are the cunning Japanese! In Advantest R6581, I did find a "bookmark" :)
When I deciphered the structure of the SCPI and ADC command keyword fields and isolated the procedures responsible for these commands in the code, I found that out of 484 procedures, 53 pcs. are not described in the manual and become available via the GPIB interface only after the protection flag is removed by a special command. These "secret" procedures are divided into several classes and have completely different command syntax, ranging from the simplest WR to monsters, such as CALIBRATION:INTERNAL:DCV:HOSEI:NUMBER or CALIBRATION:EXTERNAL:ZERO:FRONT:EEPROM:DEF? By the way, "HOSEI" here is a reference to a famous Japanese university.
As a result, you can get low-level access to the ADC and all analog nodes, as well as calibration constants of different levels (in RAM, EEPROM) and functions. All this happens completely transparent to the main operation of the device. That is, for example, we send the control word 0x4800 (ADC Reset), and garbage or OVERLOAD flickers on the display for a moment, because. the tasks for reading and displaying results received incorrect data.
I have not come across the R6551 firmware yet, but there is reason to believe that it can also contain this kind of service commands.
Note that these posts date back to September 2010, so he was working on the firmware for quite a while.
-branadic-
http://www.bitsavers.org/pdf/hunterAndReady/ (http://www.bitsavers.org/pdf/hunterAndReady/)
-
Since we haven't yet received any further detail santas 'lil helper and me started the journey on reverse engineering the firmware using Ghidra to find the secret commands, but it's a challenge on its own. So I wanted to ask, is anyone out there (with an R6581) and assembler skills (for M68000) willing to jump in and to support us?
-branadic-
-
Here is the command list we seem to have found so far.
[] indicate optional command adds, that can be ignored. We know from MickleT.'s post that most of the secret commands are still missing here.
::ABORt
:ARM:COMPlete
:ARM:COMPlete?
:ARM:COUNt
:ARM:COUNt?
:ARM:DELay
:ARM:DELay?
:ARM:LAYer2:COMPlete
:ARM:LAYer2:COMPlete?
:ARM:LAYer2:COUNt
:ARM:LAYer2:COUNt?
:ARM:LAYer2:DELay
:ARM:LAYer2:DELay?
:ARM:LAYer2:PASS
:ARM:LAYer2:PASS?
:ARM:LAYer2:SOURce
:ARM:LAYer2:SOURce?
:ARM:LAYer2:SOURce:TIMer
:ARM:LAYer2:SOURce:TIMer?
:ARM:PASS
:ARM:PASS?
:ARM:SOURce
:ARM:SOURce?
:ARM:SOURce:TIMer
:ARM:SOURce:TIMer?
:CALCulate:DFILter
:CALCulate:DFILter?
:CALCulate:DFILter:AVERage
:CALCulate:DFILter:AVERage?
:CALCulate:DFILter:SMOothing
:CALCulate:DFILter:SMOothing?
:CALCulate:DFILter:STATe
:CALCulate:DFILter:STATe?
:CALCulate:FORMat
:CALCulate:FORMat?
:CALCulate:FORMat:DB
:CALCulate:FORMat:DB?
:CALCulate:FORMat:DBM
:CALCulate:FORMat:DBM?
:CALCulate:FORMat:DEViation
:CALCulate:FORMat:DEViation?
:CALCulate:FORMat:OTEMperature:LENGth
:CALCulate:FORMat:OTEMperature:LENGth?
:CALCulate:FORMat:OTEMperature:TEMP
:CALCulate:FORMat:OTEMperature:TEMP?
:CALCulate:FORMat:RMS
:CALCulate:FORMat:RMS?
:CALCulate:FORMat:RTD
:CALCulate:FORMat:RTD?
:CALCulate:FORMat:RTD:UNIT
:CALCulate:FORMat:RTD:UNIT?
:CALCulate:FORMat:SCALing:X
:CALCulate:FORMat:SCALing:X?
:CALCulate:FORMat:SCALing:Y
:CALCulate:FORMat:SCALing:Y?
:CALCulate:FORMat:SCALing:Z
:CALCulate:FORMat:SCALing:Z?
:CALCulate:FORMat:STATe
:CALCulate:FORMat:STATe?
:CALCulate:LIMit:BEEPer
:CALCulate:LIMit:BEEPer?
:CALCulate:LIMit:LOWer
:CALCulate:LIMit:LOWer?
:CALCulate:LIMit:PASS:LOWer
:CALCulate:LIMit:PASS:LOWer?
:CALCulate:LIMit:PASS:MID
:CALCulate:LIMit:PASS:MID?
:CALCulate:LIMit:PASS:UPPer
:CALCulate:LIMit:PASS:UPPer?
:CALCulate:LIMit:STATe
:CALCulate:LIMit:STATe?
:CALCulate:LIMit:UPPer
:CALCulate:LIMit:UPPer?
:CALCulate:NULL:DATA?
:CALCulate:NULL:STATe
:CALCulate:NULL:STATe?
:CALCulate:STATistics:COUNt
:CALCulate:STATistics:COUNt?
:CALCulate:STATistics:DATA?
:CALCulate:STATistics:STATe
:CALCulate:STATistics:STATe?
:CALibration:EXTernal
:CALibration:EXTernal?
:CALibration:EXTernal:DCV
:CALibration:EXTernal:DCV?
:CALibration:EXTernal:DCV:DATA?
:CALibration:EXTernal:DCV:EEPROM:DEF?
:CALibration:EXTernal:DCV:EEPROM:NEW?
:CALibration:EXTernal:DCV:EEPROM:REF?
:CALibration:EXTernal:DCV:NUMBer
:CALibration:EXTernal:DCV:NUMBer?
:CALibration:EXTernal:DCV:RAM
:CALibration:EXTernal:EEPROM:PROTECTION {ON|1|OFF|0}
:CALibration:EXTernal:EEPROM:STORE
:CALibration:EXTernal:OHM
:CALibration:EXTernal:OHM?
:CALibration:EXTernal:OHM:DATA?
:CALibration:EXTernal:OHM:EEPROM:DEF?
:CALibration:EXTernal:OHM:EEPROM:NEW?
:CALibration:EXTernal:OHM:EEPROM:REF?
:CALibration:EXTernal:OHM:NUMBer
:CALibration:EXTernal:OHM:NUMBer?
:CALibration:EXTernal:OHM:RAM
:CALibration:EXTernal:ZERO:FRONt
:CALibration:EXTernal:ZERO:FRONt:DATA?
:CALibration:EXTernal:ZERO:FRONt:EEPROM:DEF?
:CALibration:EXTernal:ZERO:FRONt:EEPROM:NEW?
:CALibration:EXTernal:ZERO:FRONt:NUMBer
:CALibration:EXTernal:ZERO:FRONt:NUMBer?
:CALibration:EXTernal:ZERO:FRONt:RAM
:CALibration:EXTernal:ZERO:REAR
:CALibration:EXTernal:ZERO:REAR:DATA?
:CALibration:EXTernal:ZERO:REAR:EEPROM:DEF?
:CALibration:EXTernal:ZERO:REAR:EEPROM:NEW?
:CALibration:EXTernal:ZERO:REAR:NUMBer
:CALibration:EXTernal:ZERO:REAR:NUMBer?
:CALibration:EXTernal:ZERO:REAR:RAM
:CALibration:INTernal:AC
:CALibration:INTernal:AC:EEPROM:DEF?
:CALibration:INTernal:AC:EEPROM:NEW?
:CALibration:INTernal:AC:HOSEI
:CALibration:INTernal:AC:HOSEI?
:CALibration:INTernal:AC:HOSEI:NUMBer
:CALibration:INTernal:AC:HOSEI:NUMBer?
:CALibration:INTernal:AC:HOSEI:STORE
:CALibration:INTernal:AC:NUMBer
:CALibration:INTernal:AC:NUMBer?
:CALibration:INTernal:AC:RAM
:CALibration:INTernal:AC:RAM?
:CALibration:INTernal:AC:TEMPerature?
:CALibration:INTernal:ALL
:CALibration:INTernal:DCV
:CALibration:INTernal:DCV:EEPROM:DEF?
:CALibration:INTernal:DCV:EEPROM:NEW?
:CALibration:INTernal:DCV:HOSEI
:CALibration:INTernal:DCV:HOSEI?
:CALibration:INTernal:DCV:HOSEI:NUMBer
:CALibration:INTernal:DCV:HOSEI:NUMBer?
:CALibration:INTernal:DCV:HOSEI:STORE
:CALibration:INTernal:DCV:NUMBer
:CALibration:INTernal:DCV:NUMBer?
:CALibration:INTernal:DCV:RAM
:CALibration:INTernal:DCV:RAM?
:CALibration:INTernal:DCV:TEMPerature?
:CALibration:INTernal:OHM
:CALibration:INTernal:OHM:EEPROM:DEF?
:CALibration:INTernal:OHM:EEPROM:NEW?
:CALibration:INTernal:OHM:NUMBer
:CALibration:INTernal:OHM:NUMBer?
:CALibration:INTernal:OHM:RAM
:CALibration:INTernal:OHM:RAM?
:CALibration:INTernal:OHM:TEMPerature?
*CLS
:CONFigure?
:CONFigure:CURRent:AC
:CONFigure:CURRent:DC
:CONFigure:FREQuency
:CONFigure:FRESistance
:CONFigure:PERiod
:CONFigure:RESistance
:CONFigure:VOLTage:AC
:CONFigure:VOLTage:DC
:DISPlay
:DISPlay?
*ESE
*ESE?
*ESR?
:FETCh?
:FORMat
:FORMat?
:FORMat:DATA
:FORMat:DATA?
:FORMat:ELEMents
:FORMat:ELEMents?
*IDN?
:INITiate
:INITiate:CONTinuous
:INITiate:CONTinuous?
:INPut:GUARd
:INPut:GUARd?
:INPut:TERMinal
:INPut:TERMinal?
:MMEMory:CATalog?
:MMEMory:DELete
:MMEMory:DELete:ALL
:MMEMory:DRECall
:MMEMory:DRECall:NUMBer
:MMEMory:DRECall:NUMBer?
:MMEMory:DRECall:POINts
:MMEMory:DSTore
:MMEMory:DSTore:POINts
:MMEMory:DSTore:POINts?
:MMEMory:DSTore:STATe
:MMEMory:DSTore:STATe?
:MMEMory:FREE?
:MMEMory:INITialize
:MMEMory:PRECall
:MMEMory:PSTore
:MMEMory:TRANsfer
*OPC
*OPC?
*OPT?
:OUTPut:ANALogout:COLumn
:OUTPut:ANALogout:COLumn?
:OUTPut:ANALogout:OFFSet
:OUTPut:ANALogout:OFFSet?
:OUTPut:ANALogout:STATe
:OUTPut:ANALogout:STATe?
:OUTPut:BCDout:STATe
:OUTPut:BCDout:STATe?
:OUTPut:PRINter:STATe
:OUTPut:PRINter:STATe?
*RCL
:READ?
:ROUTe:CLOSe
:ROUTe:CLOSe?
:ROUTe:OPEN
:ROUTe:SCAN
:ROUTe:SCAN?
:ROUTe:SCAN:STATe
:ROUTe:SCAN:STATe?
*RST
*SAV
[:SENSe:]CURRent:AC:APERture
[:SENSe:]CURRent:AC:APERture?
[:SENSe:]CURRent:AC:COUPling
[:SENSe:]CURRent:AC:COUPling?
[:SENSe:]CURRent:AC:DIGits
[:SENSe:]CURRent:AC:DIGits?
[:SENSe:]CURRent:AC:FILTer
[:SENSe:]CURRent:AC:FILTer?
[:SENSe:]CURRent:AC:NPLCycles
[:SENSe:]CURRent:AC:NPLCycles?
[:SENSe:]CURRent:AC:RANGe
[:SENSe:]CURRent:AC:RANGe?
[:SENSe:]CURRent:AC:RANGe:AUTO
[:SENSe:]CURRent:AC:RANGe:AUTO?
[:SENSe:]CURRent:AC:SUBMeasure
[:SENSe:]CURRent:AC:SUBMeasure?
[:SENSe:]CURRent:AC:SUBMeasure:STATe
[:SENSe:]CURRent:AC:SUBMeasure:STATe?
[:SENSe:]CURRent:DC:APERture
[:SENSe:]CURRent:DC:APERture?
[:SENSe:]CURRent:DC:DIGits
[:SENSe:]CURRent:DC:DIGits?
[:SENSe:]CURRent:DC:NPLCycles
[:SENSe:]CURRent:DC:NPLCycles?
[:SENSe:]CURRent:DC:RANGe
[:SENSe:]CURRent:DC:RANGe?
[:SENSe:]CURRent:DC:RANGe:AUTO
[:SENSe:]CURRent:DC:RANGe:AUTO?
[:SENSe:]FREQuency:APERture
[:SENSe:]FREQuency:APERture?
[:SENSe:]FREQuency:COUPling
[:SENSe:]FREQuency:COUPling?
[:SENSe:]FREQuency:CURRent:RANGe
[:SENSe:]FREQuency:CURRent:RANGe?
[:SENSe:]FREQuency:LEVel
[:SENSe:]FREQuency:LEVel?
[:SENSe:]FREQuency:RANGe:AUTO
[:SENSe:]FREQuency:RANGe:AUTO?
[:SENSe:]FREQuency:SOURce
[:SENSe:]FREQuency:SOURce?
[:SENSe:]FREQuency:VOLTage:RANGe
[:SENSe:]FREQuency:VOLTage:RANGe?
[:SENSe:]FRESistance:APERture
[:SENSe:]FRESistance:APERture?
[:SENSe:]FRESistance:DIGits
[:SENSe:]FRESistance:DIGits?
[:SENSe:]FRESistance:NPLCycles
[:SENSe:]FRESistance:NPLCycles?
[:SENSe:]FRESistance:POWer
[:SENSe:]FRESistance:POWer?
[:SENSe:]FRESistance:RANGe
[:SENSe:]FRESistance:RANGe?
[:SENSe:]FRESistance:RANGe:AUTO
[:SENSe:]FRESistance:RANGe:AUTO?
[:SENSe:]FRESistance:RANGe:LIMit
[:SENSe:]FRESistance:RANGe:LIMit?
[:SENSe:]FRESistance:SOURce
[:SENSe:]FRESistance:SOURce?
[:SENSe:]FRESistance:SOURce:STATe
[:SENSe:]FRESistance:SOURce:STATe?
[:SENSe:]ITEMperature?
[:SENSe:]LFREquency?
[:SENSe:]PERiod:APERture
[:SENSe:]PERiod:APERture?
[:SENSe:]PERiod:COUPling
[:SENSe:]PERiod:COUPling?
[:SENSe:]PERiod:CURRent:RANGe
[:SENSe:]PERiod:CURRent:RANGe?
[:SENSe:]PERiod:LEVel
[:SENSe:]PERiod:LEVel?
[:SENSe:]PERiod:RANGe:AUTO
[:SENSe:]PERiod:RANGe:AUTO?
[:SENSe:]PERiod:SOURce
[:SENSe:]PERiod:SOURce?
[:SENSe:]PERiod:VOLTage:RANGe
[:SENSe:]PERiod:VOLTage:RANGe?
[:SENSe:]RESistance:APERture
[:SENSe:]RESistance:APERture?
[:SENSe:]RESistance:DIGits
[:SENSe:]RESistance:DIGits?
[:SENSe:]RESistance:NPLCycles
[:SENSe:]RESistance:NPLCycles?
[:SENSe:]RESistance:OCOMpensated
[:SENSe:]RESistance:OCOMpensated?
[:SENSe:]RESistance:POWer
[:SENSe:]RESistance:POWer?
[:SENSe:]RESistance:PROTection
[:SENSe:]RESistance:PROTection?
[:SENSe:]RESistance:RANGe
[:SENSe:]RESistance:RANGe?
[:SENSe:]RESistance:RANGe:AUTO
[:SENSe:]RESistance:RANGe:AUTO?
[:SENSe:]RESistance:RANGe:LIMit
[:SENSe:]RESistance:RANGe:LIMit?
[:SENSe:]VOLTage:AC:APERture
[:SENSe:]VOLTage:AC:APERture?
[:SENSe:]VOLTage:AC:COUPling
[:SENSe:]VOLTage:AC:COUPling?
[:SENSe:]VOLTage:AC:DIGits
[:SENSe:]VOLTage:AC:DIGits?
[:SENSe:]VOLTage:AC:FILTer
[:SENSe:]VOLTage:AC:FILTer?
[:SENSe:]VOLTage:AC:NPLCycles
[:SENSe:]VOLTage:AC:NPLCycles?
[:SENSe:]VOLTage:AC:RANGe
[:SENSe:]VOLTage:AC:RANGe?
[:SENSe:]VOLTage:AC:RANGe:AUTO
[:SENSe:]VOLTage:AC:RANGe:AUTO?
[:SENSe:]VOLTage:AC:SUBMeasure
[:SENSe:]VOLTage:AC:SUBMeasure?
[:SENSe:]VOLTage:AC:SUBMeasure:STATe
[:SENSe:]VOLTage:AC:SUBMeasure:STATe?
[:SENSe:]VOLTage:DC:APERture
[:SENSe:]VOLTage:DC:APERture?
[:SENSe:]VOLTage:DC:DIGits
[:SENSe:]VOLTage:DC:DIGits?
[:SENSe:]VOLTage:DC:NPLCycles
[:SENSe:]VOLTage:DC:NPLCycles?
[:SENSe:]VOLTage:DC:PROTection
[:SENSe:]VOLTage:DC:PROTection?
[:SENSe:]VOLTage:DC:RANGe
[:SENSe:]VOLTage:DC:RANGe?
[:SENSe:]VOLTage:DC:RANGe:AUTO
[:SENSe:]VOLTage:DC:RANGe:AUTO?
[:SENSe:]VOLTage:DC:RATio
[:SENSe:]VOLTage:DC:RATio?
[:SENSe:]ZERO:AUTO
[:SENSe:]ZERO:AUTO?
*SRE
*SRE?
:STATus:MEASurement:ENABle
:STATus:MEASurement:ENABle?
:STATus:MEASurement:EVENt?
:STATus:OPERation:ENABle
:STATus:OPERation:ENABle?
:STATus:OPERation:EVENt?
:STATus:PRESet
:STATus:QUEStionable:ENABle
:STATus:QUEStionable:ENABle?
:STATus:QUEStionable:EVENt?
:STATus:QUEue:CLEar
*STB?
:SYSTem:BEEPer:STATe
:SYSTem:BEEPer:STATe?
:SYSTem:DATE
:SYSTem:DATE?
:SYSTem:ERRor?
:SYSTem:GPIB:DELImiter:BLOCk
:SYSTem:GPIB:DELImiter:BLOCk?
:SYSTem:GPIB:DELImiter:STRing
:SYSTem:GPIB:DELImiter:STRing?
:SYSTem:TIME
:SYSTem:TIME?
:SYSTem:VERSion?
:TRACe:BCONtrol
:TRACe:BCONtrol?
:TRACe:BCONtrol:PRETrigger
:TRACe:BCONtrol:PRETrigger?
:TRACe:CLEar
:TRACe:DATA?
:TRACe:DATA:NUMBer?
:TRACe:DATA:POINts?
:TRACe:FAST:DATA?
:TRACe:FAST:GAIN?
:TRACe:FAST:ZERO?
:TRACe:NUMBer
:TRACe:NUMBer?
:TRACe:POINts
:TRACe:POINts?
:TRACe:STATe
:TRACe:STATe?
*TRG
:TRIGger:COMPlete
:TRIGger:COMPlete?
:TRIGger:COUNt
:TRIGger:COUNt?
:TRIGger:DELay
:TRIGger:DELay?
:TRIGger:PASS
:TRIGger:PASS?
:TRIGger:SOURce
:TRIGger:SOURce?
:TRIGger:SOURce:TIMer
:TRIGger:SOURce:TIMer?
*TST?
:TSYStem:EXTernal:SLOPe
:TSYStem:EXTernal:SLOPe?
:TSYStem:FAST:RATE
:TSYStem:FAST:RATE?
:TSYStem:FAST:STATe
:TSYStem:FAST:STATe?
:TSYStem:LAYer:DISPlay
:TSYStem:LAYer:DISPlay?
:TSYStem:LEVel
:TSYStem:LEVel?
:TSYStem:LEVel:SLOPe
:TSYStem:LEVel:SLOPe?
*WAI
:WR {#TRG;|#RST;|#RDT;|<packet>|#H<hex_packet>}
-branadic-
-
Eureka! Or should I say HOSEI?
-branadic-
-
We have some first data of different units:
branadic R6581D:
0 +1.20000000E-06, 1 +1.20000000E-06, 2 +5.00000000E-07, 3 -8.00000000E-07, 4 -2.10000000E-06, 5 +1.00000000E-05, 6 +4.00000000E-05, 7 +3.00000000E-05, 8 +1.00000000E-05, 9 +1.00000000E-05,10 +2.00000000E-07,11 -2.00000000E-07,12 -1.90000000E-07,13 -4.00000000E-07,14 -4.00000000E-07,15 +1.00000170E+00,16 +1.00000590E+00,17 +1.00000200E+00,18 +9.99991500E-01,19 +1.00000360E+00,20 +1.00000370E+00,21 +1.00000350E+00,22 +1.00002500E+00,23 +9.98850000E-01,24 +9.96000000E-01,25 1999/10/16 11:49
martin unit1 R6581:
0 +1.20000000E-06, 1 +1.20000000E-06, 2 +5.00000000E-07, 3 -8.00000000E-07, 4 -2.10000000E-06, 5 +1.00000000E-05, 6 +4.00000000E-05, 7 +3.00000000E-05, 8 +1.00000000E-05, 9 +1.00000000E-05,10 +2.00000000E-07,11 -2.00000000E-07,12 -1.90000000E-07,13 -4.00000000E-07,14 -4.00000000E-07,15 +1.00000060E+00,16 +1.00000020E+00,17 +1.00000000E+00,18 +9.99998000E-01,19 +1.00000250E+00,20 +9.99997000E-01,21 +1.00000320E+00,22 +1.00003500E+00,23 +9.99350000E-01,24 +9.98000000E-01,25 1999/07/07 11:11
martin unit2 R6581:
0 +1.20000000E-06, 1 +1.20000000E-06, 2 +5.00000000E-07, 3 -8.00000000E-07, 4 -2.10000000E-06, 5 +1.00000000E-05, 6 +4.00000000E-05, 7 +3.00000000E-05, 8 +1.00000000E-05, 9 +1.00000000E-05,10 +2.00000000E-07,11 -2.00000000E-07,12 -1.90000000E-07,13 -4.00000000E-07,14 -4.00000000E-07,15 +1.00000108E+00,16 +9.99999900E-01,17 +1.00000000E+00,18 +9.99999000E-01,19 +1.00000300E+00,20 +1.00000530E+00,21 +1.00000340E+00,22 +1.00001000E+00,23 +9.99440000E-01,24 +9.96300000E-01,25 2002/10/16 15:42
martin unit3 R6581T:
0 +1.20000000E-06, 1 +1.20000000E-06, 2 +5.00000000E-07, 3 -8.00000000E-07, 4 -2.10000000E-06, 5 +1.00000000E-05, 6 +4.00000000E-05, 7 +3.00000000E-05, 8 +1.00000000E-05, 9 +1.00000000E-05,10 +2.00000000E-07,11 -2.00000000E-07,12 -1.90000000E-07,13 -4.00000000E-07,14 -4.00000000E-07,15 +1.00000110E+00,16 +1.00000300E+00,17 +1.00000700E+00,18 +1.00000200E+00,19 +1.00000450E+00,20 +1.00000700E+00,21 +1.00000200E+00,22 +1.00003000E+00,23 +9.99500000E-01,24 +9.98000000E-01,25 2004/01/27 13:00
Looking at the first 0 ... 14 constants they are all identical for the 4 units, as proposed by MickleT.
Constant 15 is different so I guess that is some factory +10V scaling constant?
-branadic-
-
The constants 15/16 has at least a relatively large number of digits and could be an scale factor, possibly seprate for the positive and negative side. The values are still rather close to 1 and not enough to compensate the LTZ1000 variability. For the overall gain I would expect a value like the 7.xx V reference value.
-
Is this table part of the 51 long table MickleT described? But he had 16 points for the nonlinearity correction, you have 15 (0 .. 14). And the numbers don't match either.
Regards, Dieter
-
We have some first data of different units:
branadic R6581:
0 +1.20000000E-06, 1 +1.20000000E-06, 2 +5.00000000E-07, 3 -8.00000000E-07, 4 -2.10000000E-06, 5 +1.00000000E-05, 6 +4.00000000E-05, 7 +3.00000000E-05, 8 +1.00000000E-05, 9 +1.00000000E-05,10 +2.00000000E-07,11 -2.00000000E-07,12 -1.90000000E-07,13 -4.00000000E-07,14 -4.00000000E-07,15 +1.00000170E+00,16 +1.00000590E+00,17 +1.00000200E+00,18 +9.99991500E-01,19 +1.00000360E+00,20 +1.00000370E+00,21 +1.00000350E+00,22 +1.00002500E+00,23 +9.98850000E-01,24 +9.96000000E-01,25 1999/10/16 11:49
martin unit1 R6581:
0 +1.20000000E-06, 1 +1.20000000E-06, 2 +5.00000000E-07, 3 -8.00000000E-07, 4 -2.10000000E-06, 5 +1.00000000E-05, 6 +4.00000000E-05, 7 +3.00000000E-05, 8 +1.00000000E-05, 9 +1.00000000E-05,10 +2.00000000E-07,11 -2.00000000E-07,12 -1.90000000E-07,13 -4.00000000E-07,14 -4.00000000E-07,15 +1.00000060E+00,16 +1.00000020E+00,17 +1.00000000E+00,18 +9.99998000E-01,19 +1.00000250E+00,20 +9.99997000E-01,21 +1.00000320E+00,22 +1.00003500E+00,23 +9.99350000E-01,24 +9.98000000E-01,25 1999/07/07 11:11
martin unit2 R6581:
0 +1.20000000E-06, 1 +1.20000000E-06, 2 +5.00000000E-07, 3 -8.00000000E-07, 4 -2.10000000E-06, 5 +1.00000000E-05, 6 +4.00000000E-05, 7 +3.00000000E-05, 8 +1.00000000E-05, 9 +1.00000000E-05,10 +2.00000000E-07,11 -2.00000000E-07,12 -1.90000000E-07,13 -4.00000000E-07,14 -4.00000000E-07,15 +1.00000108E+00,16 +9.99999900E-01,17 +1.00000000E+00,18 +9.99999000E-01,19 +1.00000300E+00,20 +1.00000530E+00,21 +1.00000340E+00,22 +1.00001000E+00,23 +9.99440000E-01,24 +9.96300000E-01,25 2002/10/16 15:42
martin unit3 R6581T:
0 +1.20000000E-06, 1 +1.20000000E-06, 2 +5.00000000E-07, 3 -8.00000000E-07, 4 -2.10000000E-06, 5 +1.00000000E-05, 6 +4.00000000E-05, 7 +3.00000000E-05, 8 +1.00000000E-05, 9 +1.00000000E-05,10 +2.00000000E-07,11 -2.00000000E-07,12 -1.90000000E-07,13 -4.00000000E-07,14 -4.00000000E-07,15 +1.00000110E+00,16 +1.00000300E+00,17 +1.00000700E+00,18 +1.00000200E+00,19 +1.00000450E+00,20 +1.00000700E+00,21 +1.00000200E+00,22 +1.00003000E+00,23 +9.99500000E-01,24 +9.98000000E-01,25 2004/01/27 13:00
Looking at the first 0 ... 14 constants they are all identical for the 4 units, as proposed by MickleT.
Constant 15 is different so I guess that is some factory +10V scaling constant?
-branadic-
Sorry I don't understand where and how you got these data dumped, via SCPI commands or by reading the EEPROM directly on the board?
-
These constants were obtained just by sending the proper GPIB commands. The units R6581D and R6581T don't have the AC option, to make that clear.
My assumption is, that the first 15 constants (0 ... 14) are directly used for linearization, while constant 15 is indirectly used, a scaling factor for the +10V value, hence why it is close to 1. Is that more clear? Look also on the plot
(https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=1566868;image)
-branadic-
-
This is a correlation plot, where the y values are from branadics table and the x values are from MickleTs table. Can those same GPIB commands be used to modify the y values? I thnik this guesswork needs some experimental confirmation like MickleT presented.
Regards, Dieter
-
Meanwhile, MickleT. did confirm our findings and to some extend the interpretations.
-branadic-
-
I'm in the process of calculating new INL coefficients. First steps was to calculate the readings before correction, similar to virtually turning the INL correction off. The results look consistant now.
Next step, use this results and recalculate new coefficients as a starting point.
-branadic-
-
At least the positive side looks better without the linearity "corrections". The negative side still looks about the same and the discontinutiy around zero is still there.
So the software part only seems to be part of the problem and the main problems (negative side, break at around -4 V) and the jump near zero still exists.
-
I had a little fun with Octave playing with the coefficients and here is what I could achieve so far.
Just for clarification, blue are measure values with the original coefficients inside the meter, green is their mean, red is what the mean would have looked like if the coefficients would have been turned off, cyan is what the mean would have looked like with the new coefficients I've found.
This is quite an improvement, but essentially an optimization problem with a few dependencies between the different segments, so I'm not saying that I have already found the best coefficients yet, but some that do quite a good job. But there is plenty of room for fine-tuning. It is worth mentioning that the positive side wasn't corrected at all. For comparison the original and new coefficients:
Original Coefficients
H0 = 1.20000000E-06;
H1 = 1.20000000E-06;
H2 = 5.00000000E-07;
H3 = -8.00000000E-07;
H4 = -2.10000000E-06;
H5 = 1.00000000E-05;
H6 = 4.00000000E-05;
H7 = 3.00000000E-05;
H8 = 1.00000000E-05;
H9 = 1.00000000E-05;
H10= 2.00000000E-07;
H11=-2.00000000E-07;
H12=-1.90000000E-07;
H13=-4.00000000E-07;
H14=-4.00000000E-07;
H15=1.00000170;
New Coefficients
H0 =+0.00000000E-00;
H1 =+0.00000000E-00;
H2 =+0.00000000E-00;
H3 =+0.00000000E-00;
H4 =+0.00000000E-00;
H5 =+7.40000000E-05;
H6 =+1.00000000E-04;
H7 =+9.00000000E-05;
H8 =+7.00000000E-05;
H9 =+7.00000000E-05;
H10=-1.00000000E-06;
H11=-2.90000000E-06;
H12=+5.00000000E-07;
H13=-6.00000000E-07;
H14=+5.00000000E-07;
H15=+1.00000170;
-branadic-
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Anybody has the file CommandMatrix_R6581.pdf ?
The link https://www.adcmt.com/techinfo/product/end_of_sale/pdf/CommandMatrix_R6581.pdf (https://www.adcmt.com/techinfo/product/end_of_sale/pdf/CommandMatrix_R6581.pdf) doesn't work anymore and I can't find the file in archive.org :-\
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Anybody has the file CommandMatrix_R6581.pdf ?
The link https://www.adcmt.com/techinfo/product/end_of_sale/pdf/CommandMatrix_R6581.pdf (https://www.adcmt.com/techinfo/product/end_of_sale/pdf/CommandMatrix_R6581.pdf) doesn't work anymore and I can't find the file in archive.org :-\
I have this but it's in Japanese.
Please remove the txt extension in file names after downloading and unzip them with 7z.
Part 1:
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Part 2.
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Thanks gamalot, much appreciated! :)
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That pdf is the correct one? It's just the chapter 9 ripped from the user manual.
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That pdf is the correct one? It's just the chapter 9 ripped from the user manual.
Thanks for pointing this out, I didn't even notice it was just the chapter 9 of the user manual.
But that's not uncommon for Japanese companies, who like to break up technical documentation into pieces for download.
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Just picked up a no-power R6581T off eBay for a good price. The problem was that it had no fuse, which was quickly fixed.
I have this intermittent error printed as: +220, "A/D check1 error"
I was hunting this down until the unit powered on with no issues. Ran internal cal and self-test and now it was working fine. Plugged up my 10v reference and it read close but off by about 300uV which is to be expected since I just ran the cal with the top off and no warm-up. Powered the unit off once or twice and again no issues. Let the unit sit off while I went to go eat and came back maybe 3 hours later to be given the same error message again as before. Supply voltages all look correct coming from the marked silkscreen at the PSU inter-board connector.
Just curious if anyone else has run into this error code before I run down a rabbit hole. Date codes on the chips seem to put this unit around the ~1997 vintage.
When running the diag procedure on boot I get weird values for the INTERNAL readout:
- x1Zero_01 : -0.02xx V
- x1Zero_02 : 2.9485xxx V
- x10Zero : 294.76xxx mV
- x100Zero : 29.47xxx mV
- 7.2Vref : 10.02929xx V
- -10Vref : -6.88504xx V
- -1Vref : -687.893xx mV
- -0.1Vref : -68.82xxx mV
- Int_temp : ~65 C - Seems correct, responded appropriately to external heating
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The values are incorrect. So far no one has been able to find where the problem is.
See the table of serviceable multimeters.
https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3932453/#msg3932453 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg3932453/#msg3932453)
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+220, "A/D check1 error" means inconsistent charging and discharging timings of the integrator by standard current sources.
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+220, "A/D check1 error" means inconsistent charging and discharging timings of the integrator by standard current sources.
No kidding, I was just looking at that capacitor that is commonly installed reverse polarity thinking that can't be it, so I delayed fixing it. I'll report back if that fixes it along with checking those resistors.
Thanks, Mickle, your contribution to this undocumented unit has been substantial :)
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Does anybody understand the logic behind the 120/300V Max voltage marking on the front panel of the R6581T ?
I spent some time comparing the analog section of the R6581 and R6581T (using pictures) and they are identical. I believe the firmware is also the same.
So technically the max voltage of the R6581T should be the same as the R6581 ?
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R6581T-R6581 difference:
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Interesting thank you Mickle.
My reference for the R6581 was the pictures of post #1 of this thread: https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg895286/#msg895286 (https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/msg895286/#msg895286)
In those pictures the R6581 doesn't have any protection over the resistor (heatshrink?) and a capacitor and resistor over the relay (like on your picture). Maybe they also changed the design of the R6581 over time ?
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Mickle, I also just spotted that on your picture, the R6581 is protected by a series of 4 x 22K resistor and not 2.2K like the R6581T ?
So in the pictures of post #1 it would be a R6581T and not R6581 ? :-//
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...
When running the diag procedure on boot I get weird values for the INTERNAL readout:
- x1Zero_01 : -0.02xx V
- x1Zero_02 : 2.9485xxx V
- x10Zero : 294.76xxx mV
- x100Zero : 29.47xxx mV
- 7.2Vref : 10.02929xx V
- -10Vref : -6.88504xx V
- -1Vref : -687.893xx mV
- -0.1Vref : -68.82xxx mV
- Int_temp : ~65 C - Seems correct, responded appropriately to external heating
...
Hi Bobert,
Those values are very similar to my own R6581T. Not sure how to fix them either! I have tried a lot of physical modifications/probing that you can read about above.
Perhaps you can share your EEPROM data as described by Mickle T's 'service manual.' We might identify similarities.
We will get through this.
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..., the R6581 is protected by a series of 4 x 22K resistor and not 2.2K like the R6581T ?
Yes, it's a chain of 4 blocks of 4 22k resistors in parallel. I think that this modification of the protection circuits appeared later, due to the frequent failure of devices at the time of switching the DCV range.
Since the R6581T was designed as a system voltmeter for calibrating the low-voltage analog modules of the T2000 test system, no modifications were required. Hence the voltage range of 120/300 V.
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..., the R6581 is protected by a series of 4 x 22K resistor and not 2.2K like the R6581T ?
Yes, it's a chain of 4 blocks of 4 22k resistors in parallel. I think that this modification of the protection circuits appeared later, due to the frequent failure of devices at the time of switching the DCV range.
Since the R6581T was designed as a system voltmeter for calibrating the low-voltage analog modules of the T2000 test system, no modifications were required. Hence the voltage range of 120/300 V.
After pulling my RT809H out of storage I was able to read and save the data from EPROM1, however, EPROM0 is either corrupted or the EEPROM itself is dead, as it was completely empty and set to 0xFF...
Edit: Yep I fried the EPROM0 wrongfully assuming it was the same type of ROM as EPROM1 :-+. Got an ATMEL AT27C4096-55JI equivalent on the way that I will flash again from the A02 bins someone posted previously.
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..., the R6581 is protected by a series of 4 x 22K resistor and not 2.2K like the R6581T ?
Yes, it's a chain of 4 blocks of 4 22k resistors in parallel. I think that this modification of the protection circuits appeared later, due to the frequent failure of devices at the time of switching the DCV range.
Since the R6581T was designed as a system voltmeter for calibrating the low-voltage analog modules of the T2000 test system, no modifications were required. Hence the voltage range of 120/300 V.
Thank you for the information. It might be interesting documenting that modification. I for one, would be interested to implement it on my R6581T.
Your help is always appreciated Mickle, thank you :)
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Input protection by power resistors is a bit oldfalshioned. One possible mod is an active current limiter with two back-to-back HV mosfets, that can block 1000 V at a small current, like 5 mA (equivalent to 200 KOhm). Under normal operating conditions, its resistance will be 100 or 200 Ohms, so the mod can also reduce noise.
A schematic can be found in Kleinsteins DIY multimeter thread.
Regards, Dieter
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Even the top-end Fluke 8508A uses the classic 3x 5kOhm resistor chain protection without any significant performance degradation.
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At 1 KV that makes 1000 V x 1000 V / 15000 Ohm = 66 W of heat. Bad. Probably they avoid that by using some input relay or mosfet switch. Or they spec a lower limit, similar to 6581T
Regards, Dieter
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Or they spec a lower limit, similar to 6581T
From what I was able to gather, looking at different pictures, the R6581T input is similar to original R6581. As Mickle mentioned, probably because of high failure rate :-//, they decided to do a fix and switch the resistors and added some protection on the relay (K008). Now since this is a manual fix they don't bother doing that on the R6581T.
So technically, the R6581T should be able to support 1Kv at least as good as the original R6581. That being said I would personally play safe and avoid autoranging with high voltage.
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The protection with relatively low resistors (like 15K) only works in combination with a realy to turn off the input once overload is detected. A problem here is that most of the shelf relays are not rated to turn off some 1000 V with close to 100 mA of current flow. So there is a chance to get a damage from the arc not stopping when turning off the relay.
Another problem is that to turn off reliably one would essentially use a NO contact and thus have the relay coild powered under normal operation and this causes heat that can cause an thermal EMF error. The choice of a suitable relay is far from easy.
A slight step up could be the use of a PTC as part of the resistor chain, so that even if the relay fails to open the resistors would not overheat too much, at least reducing the damage.
The use of active elements like MOSFETs (depl. mode or with photovoltaic drive) is also not without a problem: the maximum voltage is limted (rarely much above 1000 V) and they tend to fail short, if they fail. That type of protection is used with some Keithley meters (2000, 2001,2002). Ideally it would also be combined with some secondary protection like a PTC / fusible resistor.
From what I was able to gather, looking at different pictures, the R6581T input is similar to original R6581. As Mickle mentioned, probably because of high failure rate :-//, they decided to do a fix and switch the resistors and added some protection on the relay (K008). Now since this is a manual fix they don't bother doing that on the R6581T.
So technically, the R6581T should be able to support 1Kv at least as good as the original R6581. That being said I would personally play safe and avoid autoranging with high voltage.
I would more like consider the 1 kV rating for the early R6581 to be a dubious. So better don't use them for high voltage.
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From what I was able to gather, looking at different pictures, the R6581T input is similar to original R6581. As Mickle mentioned, probably because of high failure rate :-//, they decided to do a fix and switch the resistors and added some protection on the relay (K008). Now since this is a manual fix they don't bother doing that on the R6581T.
So technically, the R6581T should be able to support 1Kv at least as good as the original R6581. That being said I would personally play safe and avoid autoranging with high voltage.
I would more like consider the 1 kV rating for the early R6581 to be a dubious. So better don't use them for high voltage.
On the 100 and 1KV range, the signal goes through the HV divider so no problem there. As you described the problem is related to switching and the improvement were located on K008 and R008 - R0011.
(https://www.eevblog.com/forum/metrology/advantest-r6581-8-5-digit-dmm-mini-teardownrepair/?action=dlattach;attach=1585882;image)
P.S: Thanks Mickle for the schematic, this is awesome :-+
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...
When running the diag procedure on boot I get weird values for the INTERNAL readout:
- x1Zero_01 : -0.02xx V
- x1Zero_02 : 2.9485xxx V
- x10Zero : 294.76xxx mV
- x100Zero : 29.47xxx mV
- 7.2Vref : 10.02929xx V
- -10Vref : -6.88504xx V
- -1Vref : -687.893xx mV
- -0.1Vref : -68.82xxx mV
- Int_temp : ~65 C - Seems correct, responded appropriately to external heating
...
Hi Bobert,
Those values are very similar to my own R6581T. Not sure how to fix them either! I have tried a lot of physical modifications/probing that you can read about above.
Perhaps you can share your EEPROM data as described by Mickle T's 'service manual.' We might identify similarities.
We will get through this.
Hi Leigh,
Just want to confirm if your DMM is making it past the self-check? I intend on ordering a JBC tweezer station that I have been putting off until I really needed it, and I think now is the time. If all else fails, I will do some sweeping replacements of passive components in the ADC section.
I got some replacement ROMs to reprogram my self-induced failure of EPROM0 before continuing with measurements.
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Hello ,
I haven't read all the correspondence, but there's a long talk here.
I need support with Fluke 8508A, can you give me some ideas?
The device gives error 9005.4 In guard error line, it also gives a lot of error in Ohm, DCV and other steps. But the device did not give an error when it warmed up.
I fixed this error caused by the A4 card, now everything is fine and the self test is completed without any problems.
When I want to do a adjustment calibration for ACV, I get the below error message during 100mV 60 Khz calibration. (AC 200mV range)
Can you comment on this topic?
ERROR DURING HFTRIM CAL - 2003
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Advantest R6581 and Fluke 8508A are very different beasts.
HFTRIM CAL 2003 error is listed in Datron 1281 Service Manual.
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To improve the TC of the meter a so called copper mod around R234 is mentioned. To my understanding this mod involves to cut a leg of R234 and to insert in series a resistor made out of copper wire. Does anybody have any further details about this mod?
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Download this package:
http://www.ko4bb.com/getsimple/index.php?id=download&file=Advantest/Advantest_R6581_Multimeter_Service_Manual_Schematics.rar (http://www.ko4bb.com/getsimple/index.php?id=download&file=Advantest/Advantest_R6581_Multimeter_Service_Manual_Schematics.rar)
You will find images in the folder Modding\TC fix
-branadic-
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Thanks for the prompt replay!
I'v already reviewed those pictures, but there are no details how this copper resistor is constructed and of what resistance it should be.
I understand that R234 in combination with the OpAmp is used to boost the Ref voltage and any variation in the ratio changes the Ref voltage.
Do I aim to adjust the ratio to optimal 7K32/10K or to a specific Ref voltage? Or does the added copper resistor compensate the TC, but then what value should it have?
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Now I got your question.
The resistance you aim for varies from meter to meter and its t.c.. So there is no general fixed resistor value to aim for, but individual measurement and adjustment. Instead you need a second multimeter and a large thermal chamber. Put your R6581 into the thermal chamber and run a temperature sweep. Measure the ref voltage of the R6581 with the second multimeter.
Now it depends 1. whether your ref voltage has positive or negative t.c. to answer the question to which leg to add the "copper resistor" and 2. what the absolut value is to calculate the required copper resistance and eventually the diameter plus the length of the wire needed. There is this tool I link to below that might help you to understand the temperature compensation.
https://www.eevblog.com/forum/metrology/adr1399-reference/?action=dlattach;attach=1467001 (https://www.eevblog.com/forum/metrology/adr1399-reference/?action=dlattach;attach=1467001)
-branadic-
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One does not really need a 2nd meter for test. I would even prefer an external stable reference (7 or 10 V) and use the 6581T to measure that fixed reference. So the TC adjustment for the whole meter including the ADC gain and not just for the amplified reference.
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That is a valid possibility, but has one disadvantage that is, while you could compensate for voltage readings in the 10 V range this way things could get worse for resistance or current readings.
-branadic-
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That is a valid possibility, but has one disadvantage that is, while you could compensate for voltage readings in the 10 V range this way things could get worse for resistance or current readings.
-branadic-
That's true, but usually the resistance and current ranges are not that stable anyway.
The restance and current ranges still contain the ref. and ADC part, just additional components (gain and the current source or shunts).
A first point is checking how bad the TC actually is. There is still a chance that it is not worth correcting an only small TC (e.g. if < 0.5 ppm/K). The temperature effect can also be nonlinear and the added copper can only correct for a linear part.
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Recently i have been using a Keithley 2700 with a 7706 scanner to characterize UPW25 precision resistors. Those resistors are specified for TC < 5 ppm/K. I found that the meter contributes about -2 ppm/K for resistance measurement. So its internal reference resistors are pretty good. Yet the meter exhibits a complex reaction to temperature change: Not only a linear TC but also some differential contribution. I mean a deviation proportional to the speed of temperature change. A typical time scale is two hours until these additional deviations vanish.
So this means either the resistors to test or the meter has to be inside a thermal chamber. The K2700 fits into a HN-2 incubator, so that's an easy one. And with those 77xx plugins it's easy to monitor the internal temperature. I won't try to mod the meter, but understand the deviations and subtract them in data analysis.
Regards, Dieter
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I understand the reasoning and recommended testing approach to tune the TC of a specific meter. Thanks for the pointers.
Maybe I'm missing something, but I'm wondering what was the initial approach from Advantest. If I recall correctly the different models R6581, R6581D and R6581T are HW wise almost the same (apart from the small differences previously discussed) and it's assumed that for the higher grade models the critical components have been selected with tighter tolerance and maybe even lower TC. But this would mean that no specific TC tuning was done on the HW. I would assume that it's less likely that there is a software TC tuning of a specific unit. Probably Mickle T. would have found it.
I have currently two R6581T meters and when I did a test to monitor the same 10V reference, both meters drifted in opposite direction for about less than 1ppm within a few hours time. The temperature in the room is quite stable within ~1°C per day variation and I've measured the 10V reference with two calibrated 3458A (one with opt02) and know that the short term variation over ~10h of time is less than <0.1ppm. Over the weekend I added a driver for the meter to my MTE automation and I'll collect some data and try to share it when I have some more time to have something more scientific.
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From what you wrote one can understand that the voltage measurements of your R6581Ts may have a TC of 1 or 2 ppm/K - a good result. And i doubt you can derive a 0.1 ppm observation using HP3458A meters. If i remember correctly they spec about 0.6 ppm in 24 hours or so - and certainly with requirements concerning temperature and humidity.
A 8.5 meter is made from similar parts like 7.5 or 6.5 meters so it has similar uncertainties. To do metrology at the 1 ppm level or below requires a good meter but also equipment and parts not present in a DVM.
Regards, Dieter
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But this would mean that no specific TC tuning was done on the HW. I would assume that it's less likely that there is a software TC tuning of a specific unit. Probably Mickle T. would have found it.
I have reversed the entire R6581 firmware and can say that there is no TC software tuning in this multimeter :-\
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Your comments are greatly appreciated!
I understand that I'm moving on very thin ice and I don't have enough data to claim something, nor do I own the necessary equipment for doing this. At the moment I'm a bit exploring in which direction I should/want to go and was wondering about the TC stability of the R6851T meters I have and possible improvement. A bit to explore the borders of my R6581T meters.
I've attached below plots of my two meters sampling the same 10V source with 100NPLC over night. In the x axis we have samples. The test setup on my bench is shown in another picture. The sampling was started after about ~5h warm up and an internal calibration of the meters. The temperature in the room is stable to within +/-1°C, I did not have time this morning to download the data of the temp/humidity logger. Maybe the captured data is useful for others. I started this morning another acquisition, let's see how stable it's over the day.
I do not want to go offtopic, but for reference I've attached two plots of my voltage source as measured with the 3458As. The setup was left to warm up for about ~5h and an ACAL was performed. The temperature and humidity in the room is controlled and maintained. The voltage source was primarily connected to the A3458A (Agilent with op02, last cal ~1.5y) and than leads have been switched to the K3458A (Keysight, without opt02, 2 months old) and than back again to the A3458A to capture some more data points. This is why there are small dips in voltage. Data was captured manually and I've left out the warm up phase of the reference from the plots. Reference is LTZ1000CH based. I think overall it works better than I've expected and with respect to the short time stability I was more thinking of ~30min. I do not have long term data, but I'm planning to repeat the measurements at some point.
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Multimeters need ~ 3 days to stabilize after a long shutdown.
The hard drops down for #2 are performing an internal auto-calibration.
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What is the difference between 6581D and 6581T?
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R6581T - is a technological multimeter. It used only for ADVANTEST T2000 IC/SoC/ASIC test system, but not in metrology laboratories. R6581T don't have any official specs or manuals.
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R6581T - is a technological multimeter. It used only for ADVANTEST T2000 IC/SoC/ASIC test system, but not in metrology laboratories. R6581T don't have any official specs or manuals.
Thanks! Except for different sales purposed, have anyone figured out what, if any differences there may be? Functions seems same. Could one have higher grade and tighter specification components or something?
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R6581T - is a technological multimeter. It used only for ADVANTEST T2000 IC/SoC/ASIC test system, but not in metrology laboratories. R6581T don't have any official specs or manuals.
Thanks! Except for different sales purposed, have anyone figured out what, if any differences there may be? Functions seems same. Could one have higher grade and tighter specification components or something?
Hello,
Some of the questions that you are asking have already been discussed. It may be useful to search this topic for the answers before posting.
Regards.
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While measuring one of my LTZ references @25°C in a thermal chamber over a longer periode with my R6581D I noticed that there is quite some t.c. visible. Therefor the internal temperature was logged together with the voltage readings. It turned out this t.c. is due to the meter itself and about 0.8ppm/K. A measurement of the t.c. of the internal reference itself revealed, that this t.c. is not due to the reference, but something else. Time to upgrade R6581!
Several improvements are documented here:
http://bbs.1ppm.cn/topic/23/advantest-6581 (http://bbs.1ppm.cn/topic/23/advantest-6581)磨机-zy的得意杰作
http://bbs.38hot.net/forum.php?mod=viewthread&tid=28698&highlight=6581 (http://bbs.38hot.net/forum.php?mod=viewthread&tid=28698&highlight=6581)
It just so happened that pipelie organized a group buy to replace R234 which boosts the zener voltage to 10V and R200 as part of the voltage to current converter.
R234 original: Alpha Electroncis SLD (7k34 X F 10k0)
R234 replacement: Vishay VHD200, hermetically sealed
R200 original: Alpha Electronics SS103F20k00 XF
R200 replacement: Vishay 300193ZT
The resistors arrived on friday so the weekend was used to replace them. Unfortunately there is no drop in replacement for R200, so the leads of the 300193ZT needs to be bend slightly into the correct position, while the VHD200 fit perfectly.
Now that the replacement is done it‘s time to let the meter settle with the new components installed, which is said to be about a month and see how this modification turns out.
Not to hide anything, removing the networks is a real pita and needs careful work and a lot of solder to heat up all pins equally. The vias are also very small and hard to clean. So unless you are well experienced in such work I would not recommend it, as you can damage a lot.
I use drill needles to finally remove last solder pieces inside the vias while heating the pad.
Also note that after that modification the meter needs calibration. To be continued ...
-branadic-
Thank Pipelie！Can we organize a group buy again?
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...
Thank Pipelie！Can we organize a group buy again?
A group buy from Vishay got a lot more difficult. A MOQ of 25 is needed to place an order on their high end products. There might be a work around, but it's something new this year.
That said, I would be interested in a group buy myself.
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...
Thank Pipelie！Can we organize a group buy again?
A group buy from Vishay got a lot more difficult. A MOQ of 25 is needed to place an order on their high end products. There might be a work around, but it's something new this year.
That said, I would be interested in a group buy myself.
I would also be interested :)
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I'm interested as well :)
Depending on price, probably two sets.
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I have found a R6581D for sale with asking price of 700 USD. I could need some help from the expert panel here and people with experience using R6581 if this is good or not.
The seller know very little about multimeters, and not possible to test before buying except for telling him to make photos. With his limited insight is probably too much of an ask to tell him to measure voltage of a battery with it for instance. I asked for photos of the display as this typically is a critical component and asked for one photo each after pressing DCV, 2W and 4W resistance. I then got attached pictures and based on these I try to figure out the general health of the multimeter. Nothing was connected to the input of the meter.
DCV show 0.0000 in 1000V range. A bit odd that it do not auto-range down to a lower range and then show some voltage and could indicate a problem.
Question: Do R6581 remember manual range selection after a power down? if so that could explain.
2W resistance show Overload in 1000M ohm range. This seems to be what to expect, or do anyone typically see something else?
4W resistance is looks troublesome and broken.. 0.000000 ohm at 10 ohm range... Or is this some normal behavior?
If broken (which it kind of seems it is) do anyone recognize there problems?
The meter being broken may not have to mean that i do not want to buy it and it would be an interesting repair project. I have completed a couple already. Despite no official service manual people in this thread have made an excellent view analyzing it so that ought to help. At lease it have a very good display, so if repair fails that could be sold to someone who need a new.
Any other thoughts on buy vs no buy on thisone? Having read though this thread (and other) about R6581 I am well aware of its shortcomings.
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Question: Do R6581 remember manual range selection after a power down?
Yes it does.
2W resistance show Overload in 1000M ohm range. This seems to be what to expect, or do anyone typically see something else?
It's Ok.
4W resistance is looks troublesome and broken.. 0.000000 ohm at 10 ohm range... Or is this some normal behavior?
It's a normal behavior too.
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Question: Do R6581 remember manual range selection after a power down?
Yes it does.
2W resistance show Overload in 1000M ohm range. This seems to be what to expect, or do anyone typically see something else?
It's Ok.
4W resistance is looks troublesome and broken.. 0.000000 ohm at 10 ohm range... Or is this some normal behavior?
It's a normal behavior too.
Awesome! Thanks a lot! And thanks for all work you have put into analyzing the 6581 and sharing your findings.
The meter still have original factory seal for warranty and was factory calibrated in 2006. So seems like it should be a decent purchase.
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Would anyone have 2 VFDs for the advantest available? We are working on 2 units, and they're broken
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Would anyone have 2 VFDs for the advantest available? We are working on 2 units, and they're broken
I have been waiting for one to come up for about 10 months now, so far no luck, at this rate I will have to design a replacement display module.
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Advantest R6581 VFD can be easily emulated on a graphical LCD or OLED.
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I have absolutely no idea how to do it yet, it is something I would have to spend a lot of time figuring out as I don't know where to sample the data, or even how the data in contstructed to convert it for display.
I was thinking I could do a video about it once I get to that point and get something working, maybe even design a PCB for it or something.
The display on mine is still working but very dim, so i'm not desperate enough to start that project yet in the hope I can one day find a replacement display instead, but I am pretty sure I will need to make something soonish.