Sorry, but these are switching errors of the input MUX caused by wrong control signals. For example when switching from LO input to negative DCV input after Autozero. Since the Guard signal comes from the slow amplifier output, it remains at Gnd level for up to 200 usec after switching and current flows into the gate of the DCV input JFET. This forward diode current flows from the Guard buffer to the instrument input. Only when the amplifier has settled, the DCV input JFET gets gate voltage near zero as it is meant to be.
The mod i proposed above produces correct control signals, at least for DCV with Autozero. The Guard pin of the input MUX needs to go negative and/or settle to the correct voltage during the break-before-make time interval. We cannot use the MUX output to determine that voltage level as it is undetermined during break-before-make. Each input except LO needs to have a buffer similar to the AD549 of the DCV input. Then we can select the MUX control signal Pin 27 from those buffered signals and the switching errors will be gone.
Anyway, it is a good idea to check the basic input leakage. As you wrote, there will be no or little switching errors near zero input voltage.
Regards, Dieter
Edit: Also the JFET switches of the input MUX don't work well when both input and output are high impedance. There is that 330 pF cap C008 to help a little. I will probably try and replace the MUX hybrid by 2x MAX328 low leakage mosfet mux chips plus some glue logic. The comparators used for level shifting can go, as well as the heat generated by the 14x 100 K resistors inside the hybrid.