Author Topic: How to minimize ground leakage current in DMM  (Read 1150 times)

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Offline nano_user

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How to minimize ground leakage current in DMM
« on: October 17, 2018, 02:07:21 pm »
Hello everyone, I have a problem: I'm designing a DMM and I don't know how to organize the connection of the earth. How to minimize leakage currents from a connected to earth measuring line? For example capacitors with large leakage currents and over devices are connected to the same ground. If i don't connect measuring line to earth, there will be a large common-mode voltage. To clarify the problem, I attach a strongly simplified circuit: the signal from the source is enter to the input of the instrumentation amplifier, but some of the current flows through the capacitor to a negative power supply.
The problem is that I need an input impedance of the order of GOhm, and in the circuit hundreds of capacitors are connected to earth and there are PCB and many other leakage currents. Isolation amplifier can not apply, they have poor accuracy. I'm interested, how this problem (hight input impedance and low leakage) is solved in high-precision DMM for LO input line (i know about driven guard for HI input etc, but LO input :-//...) Thanks in advance for the answers  :)
 

Offline TiN

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Re: How to minimize ground leakage current in DMM
« Reply #1 on: October 17, 2018, 02:14:52 pm »
Typically most (if not all) high precision DMMs have whole analog sections isolated/floating and signal is sent to earth-referened domain and I/O interface/display/storage devices digitally over the isolators.

Perhaps you can also have differential front end inputs, if you don't mind changing issue to common mode rejection and matching.
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Online Gyro

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Re: How to minimize ground leakage current in DMM
« Reply #2 on: October 17, 2018, 06:16:29 pm »
Guarding is the other method - although it goes hand-in-hand with isolated floating front end and floating supplies. Many high precision meters have a Guard terminal which connects to guard traces surrounding PCB circuitry etc. It normally extends to a separate (second) guard shield within the mains transformer separating the isolated input section from the digital section and protective earth shield.

The Guard terminal is then able to be driven from a lower impedance node, isolating the input High and Low input terminals from common mode voltages and currents.
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Offline nano_user

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Re: How to minimize ground leakage current in DMM
« Reply #3 on: October 17, 2018, 07:07:12 pm »
I know about 3-wire measurements and separation into floating inguard and outguard with digital part, but the inguard ground is also very large in area and contains many components through which leakage occurs... I just thought maybe there are ground buffering methods, or something like power following (I don’t know how to say in English, when the voltage level of inguard ground is set equal to the "LO" input potential, and the remaining supply potentials are formed relative to it).
 

Offline nano_user

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Re: How to minimize ground leakage current in DMM
« Reply #4 on: October 17, 2018, 07:12:17 pm »
That is, the problem floating supply and guarding does not completely solve - I surrounded HI input with guard rings, but from the LO input, connected to the ground, the current flows through unprotected polygons and tracks and components inside the inguard part to inguard supply and other wires.
 

Offline TiN

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Re: How to minimize ground leakage current in DMM
« Reply #5 on: October 19, 2018, 04:56:20 am »
That's why you strategically use star for LO and make sure current injections to signal LO are minimal.

Also meters and calibrators where it's critical have circuits for ground current cancellation to correct for offsets.
And HI guard is protected by multiple guard drivers, not just one for whole PCBA.

For parametric analyzers this issue often battled by GNDU 4-quadrant source module, that is like SMU unit, but always drives output to 0 V potential, compared to all other SMU channels. In Agilent 4142B this special SMU can sink or source 1.5A of current at 0V, and have remote sense and own guard, so you always have high quality 0V reference at the DUT device, when all other SMUs inject signal into different terminals. But this is rather extreme case and usually not needed in DMM, which is not sourcing lot of power into DUT.
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Offline MiDi

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Re: How to minimize ground leakage current in DMM
« Reply #6 on: October 19, 2018, 10:25:35 am »
I think you messed up with terms for earth and GND in first post.
Earth is connected via power socket to central earth point of building, the neutral at some point is connected to earth.
GND in general is just a reference point for the circuit and could sit at any voltage referred to earth.

You have to break earth loops for inputs of dmm to avoid earth currents flowing through the measurement leads.
Not only for DC (this is the easiest part) -> floating GND for DC/AC for input section - as stated earlier.

There are mainly two paths for AC coupling to earth: power supply stray capacitance and stray capacitance of GND-plane.
Shielding/Guarding can reduce this stray capacitances if implemented correctly.
Battery powered PS helps to isolate further.

If you have to measure high impedance sources, than the stray capacitance of the leads have to be accounted too - besides leakages and bias currents of input.
 

Offline David Hess

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Re: How to minimize ground leakage current in DMM
« Reply #7 on: October 20, 2018, 12:06:03 am »
Even ancient digital multimeters use non-galvanic coupling between the input conditioning and ADC and the rest of the instrument with a high isolation power supply for the ADC and input conditioning so the only leakage is through insulators.  Old multimeters use magnetic isolation for the data and control signals but modern ones often use optical isolation.

The above does nothing of course for common mode capacitance between LO and earth ground which will be 10s to 100s of picofarads.  Almost all multimeters put up with this but in theory, a differential input multimeter could be made which might be thought of as two multimeters with their isolated LO input tied together.

Low leakage designs place the galvanically isolated ADC and input signal conditioning on a separate substrate; it is just easier that way.
 


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