Electronics > Metrology

Analog frontends for DMMs approaching 8.5 digits - Discussions

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It feels like going off into the weeds, and a bit unnecessary. But several configurations are possible with lowish effort (eg. pick your poison).

- lt1021/7V as primary, for quick setup and tests and avoid a complex ltz1000 circuit completely (most useful).
- ltz1000 as primary, and lt1021 as optional plausibility/check reference (like Datron 4950/ 1271) (easy, given lt1021 already available).
- 2x ltz1000 (like Datron 1281). (aid to identify drift/divergence, possibly valuable)

For the start I would not worry too much about a 2nd reference.  It is pretty low on the priority list, especially not needed for the 1st test. There it is more about having the option to start with less than an LTZ reference for the 1st tests.  Besides the boad space it would also be about having a free channel at one of the MUX. With only a voltmeter there are likely some free input paths anyway. With a full DMM with current ranges it depends.

I would not recommend the 1021 soic.. It is a low cost vref (good for 4 digits imho), with potentially large hysteresis in epoxy, etc. With your high-end front end and your 8+digits goal there are two "cheaper" vrefs I would think of only - the ADR1001 (you get 7V, 5V (-5V), 10V out of it without messing with any expensive resistors, planned release Q4/2023 afaik) and the 399/1399 as the "second" reference. The expensive LTZ1000A solution as your external ultra stable reference..

I managed to do a board with sufficiently few silly mistakes, to make it worthwhile to add components and do some tests,

Some waveform pics of precharge/AZ switching running in a state-machine -

first pic - uses a contrived sin-wave as signal input.  And shows the digital pre-charge switch ctrl-line level shifted to the signal/boot voltage. It seems to work quite well over the +-10V input rage.
second pic - shows a test modulation of the precharge / AZ switching scheme.  the precharge-switch selects the signal for the hi-sample, and then switches to boot to shield/protect the signal, when the AZ mux switches to take the lo sample.

The mux organization is changed a bit to handle all the inputs.
The two hi-mux's select the continuous signal of interest, then follows the pre-charge to select signal or boot, then the AZ muxes between the precharge-output and lo/zero signal.

I want to add a mode to test the pre-charge switching to reveal charge-injection bias in the same fashion as the previous tests done with the standalone '4053.
To do this a charge-capacitor (depicted on U402) can be switched onto the signal, so that AZ/PC switching can accumulate a charge, to be measured after a fixed duration/number of cycles.
This would form a useful self-diagnostic test, to run without any operator action.
The DC-source could also generate the signal inputs with a DC bias (eg. -10V,0V,+10V) to validate.

I chose to try surface copper-fills for soic-8 guarding rather than ring traces. At BOOT potential for hi muxes/precharge swtich, and gnd for az switch.
This is simpler due to how related signals get grouped by the 1ofN muxes, compared with discrete jfets placed about the board.
But it can be changed if needed.
I don't think the extra capactance due to the increased copper surface area is an issue. R405 can unload the BOOT driver output if needed.
The trick is to route signal placement carefully, to avoid any capacitive-coupling to the wrong copper fill.

Some schematic comments are more self-notes and are not reliable.

The scope waveforms look good so far.
The signal switching still does not look ideal: there are quite some CMOS switches in the critical signal path and thus possibly a higher leakage current than needed. Instead of parallel MUX chips and using the OE pin one could better cascade them, so that the less critical signals (e.g. the ref. levels, temperature,..) go through one more chip and only 1 mux chip for the leakage critical paths.

With the MUX before the precharge circuit and bootstrapp buffer the bottstrapping of the zener clamps is only working when the DCV input is actually selected. With a different input selected the input could see a little extra input current. It is not ideal, but also not too bad as the input can be isolared via the FETs from the protection and the extra relay

It is a bit strange to have 2 x PV coupler in series. Most of the PV couplers give some 6-9 V out and thus sufficient to turn on the FETs. The voltage is already limited by the forward direction of the photodiodes.
The ohms sense inputs should have something like fusible resistors at the input, before the GDTs. So in case the GDTs conduct the resistors act as a fuse.

Connecting the ACAL signals directly to the input is nice to include all the protection, but it kind of defeats the protection. So ACAL would need the user to isolate the input.
For the ACAL part for the divder (+-10 V or GND to the divider) one could use the same relay as to connect the divider. So the divider would either see the input or the ACAL signal.
The ACAL signals for the normal input already have a path through the CMOS mux chips.
The Ohms ACAL signal would go directly to the amps part - so the relay K401 is not absolutely needed. It can still help to avoid the leakage to the FETs effecting the input inpedance.
The capacitor at the input to check for input bias current is a good idea. One may not need than much capacitance. To measure up to some 100 pA a capacitance of some 1-10 nF is sufficient.


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