Electronics > Metrology
Analog frontends for DMMs approaching 8.5 digits - Discussions
julian1:
I managed to do a board with sufficiently few silly mistakes, to make it worthwhile to add components and do some tests,
Some waveform pics of precharge/AZ switching running in a state-machine -
first pic - uses a contrived sin-wave as signal input. And shows the digital pre-charge switch ctrl-line level shifted to the signal/boot voltage. It seems to work quite well over the +-10V input rage.
second pic - shows a test modulation of the precharge / AZ switching scheme. the precharge-switch selects the signal for the hi-sample, and then switches to boot to shield/protect the signal, when the AZ mux switches to take the lo sample.
The mux organization is changed a bit to handle all the inputs.
The two hi-mux's select the continuous signal of interest, then follows the pre-charge to select signal or boot, then the AZ muxes between the precharge-output and lo/zero signal.
I want to add a mode to test the pre-charge switching to reveal charge-injection bias in the same fashion as the previous tests done with the standalone '4053.
To do this a charge-capacitor (depicted on U402) can be switched onto the signal, so that AZ/PC switching can accumulate a charge, to be measured after a fixed duration/number of cycles.
This would form a useful self-diagnostic test, to run without any operator action.
The DC-source could also generate the signal inputs with a DC bias (eg. -10V,0V,+10V) to validate.
I chose to try surface copper-fills for soic-8 guarding rather than ring traces. At BOOT potential for hi muxes/precharge swtich, and gnd for az switch.
This is simpler due to how related signals get grouped by the 1ofN muxes, compared with discrete jfets placed about the board.
But it can be changed if needed.
I don't think the extra capactance due to the increased copper surface area is an issue. R405 can unload the BOOT driver output if needed.
The trick is to route signal placement carefully, to avoid any capacitive-coupling to the wrong copper fill.
Some schematic comments are more self-notes and are not reliable.
Kleinstein:
The scope waveforms look good so far.
The signal switching still does not look ideal: there are quite some CMOS switches in the critical signal path and thus possibly a higher leakage current than needed. Instead of parallel MUX chips and using the OE pin one could better cascade them, so that the less critical signals (e.g. the ref. levels, temperature,..) go through one more chip and only 1 mux chip for the leakage critical paths.
With the MUX before the precharge circuit and bootstrapp buffer the bottstrapping of the zener clamps is only working when the DCV input is actually selected. With a different input selected the input could see a little extra input current. It is not ideal, but also not too bad as the input can be isolared via the FETs from the protection and the extra relay
It is a bit strange to have 2 x PV coupler in series. Most of the PV couplers give some 6-9 V out and thus sufficient to turn on the FETs. The voltage is already limited by the forward direction of the photodiodes.
The ohms sense inputs should have something like fusible resistors at the input, before the GDTs. So in case the GDTs conduct the resistors act as a fuse.
Connecting the ACAL signals directly to the input is nice to include all the protection, but it kind of defeats the protection. So ACAL would need the user to isolate the input.
For the ACAL part for the divder (+-10 V or GND to the divider) one could use the same relay as to connect the divider. So the divider would either see the input or the ACAL signal.
The ACAL signals for the normal input already have a path through the CMOS mux chips.
The Ohms ACAL signal would go directly to the amps part - so the relay K401 is not absolutely needed. It can still help to avoid the leakage to the FETs effecting the input inpedance.
The capacitor at the input to check for input bias current is a good idea. One may not need than much capacitance. To measure up to some 100 pA a capacitance of some 1-10 nF is sufficient.
julian1:
--- Quote from: Kleinstein on July 03, 2023, 07:21:34 am ---The signal switching still does not look ideal: there are quite some CMOS switches in the critical signal path and thus possibly a higher leakage current than needed. Instead of parallel MUX chips and using the OE pin one could better cascade them, so that the less critical signals (e.g. the ref. levels, temperature,..) go through one more chip and only 1 mux chip for the leakage critical paths.
--- End quote ---
I debated whether to have the two muxes in series or parallel. My feeling was that keeping the input series-resistance the same for the various inputs (even if dedicated to secondary importance signals) was the lesser evil. Particularly as it might affect the distribution of charge-balance during PC switching. Although thinking some more, the secondary-importance signals will be lower-impedance inputs anyway (refs, TIA, TEMP etc) so it matters less.
3458a has many parallel jfets for input muxing, although that probably reflects the component choices available at design time (no low leakage/multiple-throw switches) .
If the parallel hi-mux organization was kept, an additional relay could work to switch between them. This would remove all potential leakage from secondary inputs, unless actually selected.
max328 should probably be used for the muxes. But their price is annoying, and couldn't be justified for initial tests
It's not clear if a charge-cap for charge-injection tests, or leakage tests as you suggest, could work without another parallel mux/relay. .
--- Quote ---With the MUX before the precharge circuit and bootstrapp buffer the bottstrapping of the zener clamps is only working when the DCV input is actually selected. With a different input selected the input could see a little extra input current.
It is not ideal, but also not too bad as the input can be isolated via the FETs from the protection and the extra relay
--- End quote ---
I hadn't considered this. DCV could be at +-11V from user terminal input, with the selected mux input at 0V and BOOT at the same voltage.
That isn't very good for leakage.
Even with the protection fets switched off, fet leakage is in the order of nA, so they won't help much.
--- Quote ---It is a bit strange to have 2 x PV coupler in series. Most of the PV couplers give some 6-9 V out and thus sufficient to turn on the FETs. The voltage is already limited by the forward direction of the photodiodes.
--- End quote ---
I found the measured PV voltages to be a bit on the low-side - around 6V with a single opto-coupler.
From memory, I made a judgement to use two, based on an actual RDS(on) measurement of the fets at the driven gate voltage, but don't remember the detail. Cost of the extra part is marginal, although maybe it looks too unorthodox.
--- Quote ---Connecting the ACAL signals directly to the input is nice to include all the protection, but it kind of defeats the protection. So ACAL would need the user to isolate the input.
--- End quote ---
Yes. I really like the idea of feeding in signals right at the front. And am not sure about duplicating them again at the input muxes. Being able to run ACAL/diagnostics without the user having to worry about the state of terminal connections would be nice. So perhaps more relays are justified.
--- Quote ---For the ACAL part for the divder (+-10 V or GND to the divider) one could use the same relay as to connect the divider. So the divider would either see the input or the ACAL signal.
--- End quote ---
This means one doesn't get the DC-source (+-10V, GND) right at the input, that could be useful calibrate/do self-diagnostic tests for the protection/fet leakage. But it frees a relay that could isolate the input terminals to keep protection active, and so the operator doesn't have to do it, during acal.
And it could isolate the terminal input, when non-DCV inputs are selected via the muxes.
schematic pic added for clarity.
julian1:
With user functions, acal, and test-diagnotics there are a lot of mode combinations.
It is tempting to err on the side of caution, and add extra relays as needed, not to screw something up. On the other hand perhaps this relay arrangement might achieve a similar result, with one less relay.
Does this schematic match what is being proposed?
Kleinstein:
The PCB may not be perfect, but it could still be usable and good enough for tests. If looks like it is porpulated to a large part already. A possibly new version would be a bit later.
Chances are there will be more points to learn from the 1st prototype.
I agree that the max328 is a bit expensive. The mux508 or ADG1208 should be OK for the tests.
The leakage specs with the CMOS switches (and MOSFETs) are to a large part test limits. Especially for a prototype / test version the typical values are more relevant.
The 3458 has quite some JFETs for switching, but when doing the critical measurements, there are not that many that are relevant as there is 2 stage switching (Q15) for the less critical signals.
Connecting the divider to the +-10 V ref signal when not in use does not interfere with using the signal for other purposes. The 10 M load has some effect on the voltage, but it would be connected in essentially all uses of the reference. I found it usefull to have a separate, less critical MUX (e.g. DG408) for the ref signals (e.g. +-10 V, +-1 V, +-100 mV, GND,... ). This way the cascaded structure for the input switching comes naturally.
For the protection MOSFETs 6 V gate voltage should be good enough. There is no need to switch them on really hard. A few more ohms of Ron are not an issue and this helps to speed up the turn off.
The last sugested relay circuit looks more like what I would suggested. Not so sure about the ACAL part with K404 though. This would be OK to link to the current part to do ACAL on the ohm sources.
The plan as shown does not include a direct path the voltage ACAL to the input (one may get away with this). The main point may be a check with a short directly at the input to include all thermal EMF, including the 1st relay.
Another point may be using both available contacts in series in some places to get a higher withstand voltage.
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