Electronics > Metrology

Analog frontends for DMMs approaching 8.5 digits - Discussions

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I have a board which fixes some issues that interfered with testing.
Since the opportunity was there, the input section has also been updated/improved based on comments and suggestions.

Perhaps more important, there is now support to run automated self-diagnostic/unit tests, which are nice and quick to iterate through, and that don't require ad-hoc code deployment or instrument setup.

Being able to route precision voltages around the board using the board calibrator/ dcv-source, works really well.
And getting the test setup vector/ as well as expected-behavior managed programmatically, and locked down in code, is progress of a kind.

It is an interesting property that the input conditioning may be able to measure it's own leakage, and switching charge contribution,
And with different input dc biases.

With the tests in place, the analog switches can be progressively added, and change observed.

test method,
test05  charge cap to +10V. hold 10sec for cap DA to settle, then turn off/float primary himux switch inputs, and observe voltage. measurement is taken from boot buffer/opa140 output.
test06  same except use -10V dc-bias.
test07  same except 0V dc-bias .
test08  charge cap to 0V/agnd, let cap DA settle. Put a +10V test on primary himux input (pin 5), while it is turned off.
test09  same except use -10V on pin5.

- with two hi muxes (U413, U402) fitted.
test05    -0.5mV/10s. = -0.5pA.
test06    leave 5mins for DA to settle.  +1.7pA. 10mins. the same.
test07    5 mins for DA.   250uV/10s. +0.25pA.
test08    300uV/ 10s = +0.3pA.
test09    300uV/ 10s = +0.3pA.

conclusion - with just the adg1208 muxes, leakage is very controlled.

- add TI sn74lv4053 (U412) precharge switch, muxing boot.  AZ switch (U414) is *not* fitted.
test05    +22pA.  +21pA,  20pA.
test06    +23pA.  +25pA.  25oA,
test07    +17pA.  +20pA.

conclusion, a bit higher than might be hoped for,

- same test, as previous test except 4053 muxing signal.
test05    +20pA.
test06    +25pA.
test07    +22pA.

conclusion - 4053 switch position doesn't matter.

the 47p caps (C421, C428) are mlcc, and therefore a bit suspicious, but the voltage difference across them is very low.
board are well cleaned.
the copper guarding looks good to me.
the sn74lv4053 is salvaged from other boards, but that's because it had been demonstrated to work well.

I will try to add the previously shown AZ test modulation into the test suite- but am not sure charge-injection at ordinary AZ freq, will be evident above the leakage. I should probably re-review the previous 4053 tests, already posted to this thread. 

The leakage currents without the 4053 fitted look really good. So the ADG1208 really seem to be good.  Even 20 pA with the LV4053 are not that bad, though we had hoped for less.

I don't understand the purpose of C430:  normally the signal to control the 4053 type switch should be a clean logic signal and not slowed down. One could even consider having an extra schmidt trigger like HC1G14 in front of the 4053 switch.  Depending on the control signal, the signal to the 4053 may also be a bit negative so that chip interal diodes start conducting despite of D409. This may lead to extra leakage. The input leakage my also be different with different inputs used.

I would pass all logic signals into the analog chips via 50-100ohm resistors..

C430 is my misunderstanding of an earlier comment, that this signal should be slowed.
I think I experimented in the past with a schottky at D409, to reduce possible negative voltages on the 4053 input protection diodes.
It is probably worth checking again.

For source-termination resistors, they may be an idea.
There is a little ringing on digital signals and 10-90% rise time is fast - 2ns measured with passive probes .
But the presence of quite a few control signals make it look more complicated than it is. 
And there is actually very little going on (by design) during normal DC sampling.

Does anyone know the input bias current of the 3458a (or other modern HP/Keithly) meters, on 10V/high-z range, with AZ turned off?


--- Quote from: iMo on September 30, 2023, 07:16:49 am ---I would pass all logic signals into the analog chips via 50-100ohm resistors..

--- End quote ---

The logic signals are noisy even when stable at log0/1. And when chasing nVolts slowing the fast edges is good thing as well (the resistor's RLC and parasitic capacities create a low-pass).


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