The JVR reference circuit is known at least since early 70s, but it wasn't used in measurement equipment because its initial reference voltage has huge tolerances. However, it is reported in this forum that the stability of the JVR can be amazingly good. The pressure to find better references is high, so the JVR should be analysed as low power, low noise reference in this new light of stability.
Kleinstein and dietert1 discussed the temperature dependency of the JVR. I performed some simulation experiments with LTSpice. The first diagram Fig.1 shows a temperature compensation for a JVR, so that the residual drift has a forth order shape. The reference voltage deviates less than 4 ppm from -20°C to 57°C. It is possible to move the minima closer together in order to get an optimally flat zone, see Fig.2. However, this theoretical result is too good to be true: as the precision of R1 and R2 shows, a perfect matching of the characteristics of J1 and Q1 is essential to obtain this low temperature dependency. I assume that such tight matching can be hardly realised in practical circuits, or it will need days or weeks of work. Assuming this adjustment can be obtained, it will be complicated to ensure that J1 and Q1 chips have a temperature tracking better than 3 mK. The reference voltage is defined by the combination of 3 large currents, and good long term stability cannot be expected therefore. Other simulated circuits with third order residuals are not better in this aspect.
If the allowable working temperature range is not too large (f.e. with battery-operated hardware), the temperature of the reference JFET can be measured and its drift is corrected by software, so that drift compensation by analog hardware can be omitted. Long-term stability is the remaining problem. Fig.3 shows two 10V JVR reference circuits without compensation. The lower circuit uses an OP amplifier to get the 10V value, while the upper circuit uses JFET J3 for amplification and the OP only as buffer. The simulation shows that the noise of the reference alone is much lower than the noise of the OP. Therefore, the upper ref should be applied for low noise, even if its adjustment (drift maximum and voltage) is more complicated. C4 reduces the high fequency noise to the noise value without amplification.
Assuming the LTSpice JFET models are correct, the JFET reference has very low noise. The buried Zener references have a sharp break-down, while the JVR has a soft working point, even softer than of bandgap references. The depletion zone of the JFET has a large volume, while a Zener reference relies on a limited set of hard punctual microplasmas, which must be very sensitive to interstitials, voids, impurity clusters etc.. Please see Zener microplasma action at Richi's Lab - unbelievable microscope pictures there.
The essential point of the circuit Fig.3 top is that only 2 parts must have utmost precision. Since no heater is applied, there will be no temperature hysteresis with power failure and the temperature gradients around the reference JFET can be kept very low (Kovar feed-throughs at hermetic case!). Is it possible to obtain long-term stability with a soft working point? How large is the temperature hysteresis of different JFET types? The next step is testing of real JVR hardware, which includes the JFET case temperature measurement.