Building your own voltage reference - the JVR

[Vtile]

The 2N4416 is a more lower threshold fet and also lower current and thus maybe better for battery operation.
It is also one of the few more affordable ones in a hermetic case.

I just did "run to order a affordable hermetic FET" to get a few before they all are obsolete -> 5.5€ to 11€  are these hermetic packages hand made by grey bearded virgins. they are so expensive, cheapest cellphones are almost on that price range. 

How this JVR actually differs from the old constant current FET arrangement. The resistor is obviously hand-picked and low ppm variety? Also how this is different from 1N829A based solution, it is doing basically the same feeding a constant current through a selected component and voltage is used as reference. Is it for better aging (hypothetical) or noise or both?

[SilverSolder]

You can get a current regulating FET "diode", e.g. 1N5297 for 1mA.  They have quite a hefty temperature coefficient though, and I'm not sure about other parameters e.g. noise.

[Vtile]

You can get a current regulating FET "diode", e.g. 1N5297 for 1mA.  They have quite a hefty temperature coefficient though, and I'm not sure about other parameters e.g. noise.

I did refer to this arrangement seen here and there for "ages", dubbed just as 'FET current limiter' etc. https://www.vishay.com/docs/70596/70596.pdf

[dietert1]

In the end the idea is using the nonlinear FET behaviour as a low noise alternative to a zener diode. Zener diodes are inherently more noisy, there is enough literature to explain about the avalanche process. Forum member noopy showed those nice images of light emission from the processes in a zener diode.
Of course a FET is much more of an artifact than for example the pn junctions of a bandgap reference. Diode forward voltage relies on physical properties that change very little, so normal silicon diodes all exhibit very similar forward voltage. Yet the near zero temperature drift of the FET reference is a big advantage and a good reason to look closer.

Regards, Dieter

[Cerebus]

Of course a FET is much more of an artifact than for example the pn junctions of a bandgap reference.

There are two senses in which one can use the word "artifact" in English, one of which is always formulated "artifact of <something>"  and the other just means "made by man". Neither of them make sense in that sentence. Translation issues?

artefact | ˈɑːtɪfakt | (US artifact)
noun
1 an object made by a human being, typically one of cultural or historical interest: gold and silver artefacts.
2 something observed in a scientific investigation or experiment that is not naturally present but occurs as a result of the preparative or investigative procedure: the curvature of the surface is an artefact of the wide-angle view.

[SilverSolder]

There are some 8.5 digit multimeters using 1N829A, so they must be "not bad".   They are not all the same, though.  I tested a few different ones for upgrading an EDC voltage standard - it took a few of them before I got one that behaved well in terms of noise.  The one I liked, that I bought in desperation, cost $15...   and came with a ton of military type documentation.  I'm pretty sure it must have been hand tested and selected.  It is a beautiful part, though, almost no noise or temperature coefficient at the right current.  It made a big different to the performance of the EDC!

Bottom line, I think you have to pay for the nicest "classic" analog parts - I'm beginning to think of them like fine wines, or something like that!

[dietert1]

@ cerebus:

In a pn junction the forward voltage depends mostly on the physical properties of silicon and the elements used as dopants. This comes close to what a metrologist really wants (not artifact but physical constants). In a JFET the pinch-off voltage depends on the geometry inside the device. That's the reason why FETs vary so much. This is less desirable as it leads to considerations about aging, drift of dopants and the like. This is what i meant.

Using a zener for a high resolution DVM means acquisition times like 20 to 50 seconds to get the noise down.The best zeners can do it within some seconds. There is research for better alternatives.

Regards, Dieter

[Vtile]

Bottom line, I think you have to pay for the nicest "classic" analog parts - I'm beginning to think of them like fine wines, or something like that!

Yes you can say that something like OPA111 in a canned form with golden legs and teflon stand-off is almost an art itself (any TO-99).

[Cerebus]

@ cerebus:

In a pn junction the forward voltage depends mostly on the physical properties of silicon and the elements used as dopants. This comes close to what a metrologist really wants (not artifact but physical constants). In a JFET the pinch-off voltage depends on the geometry inside the device. That's the reason why FETs vary so much. This is less desirable as it leads to considerations about aging, drift of dopants and the like. This is what i meant.

Using a zener for a high resolution DVM means acquisition times like 20 to 50 seconds to get the noise down.The best zeners can do it within some seconds. There is research for better alternatives.

Regards, Dieter

Yeah, I know how it works, I just couldn't figure out what you were trying to say. All the devices you talk about are artefacts (man made), and you haven't described the artefact of the measurement process that is the other usage of "artefact", so I assumed you were grabbing an English word that is a "false cousin" of some German word that carried the meaning that you were trying to get across. Not meaning to be rude, but I suggest you avoid the word as your most recent usage of it still isn't idiomatic and, while I can figure out what you mean in your most recent use of the word, it still wasn't clear at first reading. A better usage in your original sentence would have been something like: "FET parameters are much more of an artifact of the semiconductor manufacturing process than for example the pn junctions of a bandgap reference". I hope that's clear now.

[dietert1]

What is your contribution besides being picky? This isn't an language course but a discussion of electronics devices.

[Vtile]

No fighting please, I was interested the differences as I'm not that deep on the electronics or physics behind the devices. 

[Kleinstein]

The TO18 parts got pretty expensive. In part this can be caused by RoHs: some of the older hermetic cases used lead solder and also the glas at the seals may have contained lead or similar. The is not that much demand for those metal cases any more.  It is not just the JFETs that got expensice: also normal 2N2222 got relative expensive.

The JFETs may react relatively sensitive to dopant diffusion, but so can zener diodes.  Like with a burried zener the relavant part of the JFET should be away from the surface, so there is a chance to to get away from surface effects, like defects at the oxide interface. Not so sure that drift is more of a problem with the JFETs than with a zener diode. At least classical planar zeners have additional surface effects and the choice of burried zeners is limited.

The higher frequency noise looks really good with the JFets, it is just the not so nice popcorn noise, that is a problem. In this respect they are somewhat similar to some of the zeners. An interestuing point could be that there are some modern fets with rather good low frequency noise - so in principle there would be a chance for really good noise performance.  Detailed noise specs for the FETs are rare and I would not take them to serious. Especially the popcorn noise may vary between units and modern processes got cleaner. Some JFET based OPs can provider good LF noise - so in principle it could be possible to find really low noise JFETs.

With the TC the JFET solution is a bit similar to the compensated zeners: one can use the current to adjust the TC. The 1N829 seem to be special in that they can also have a relatively low higher order TC, though at the price of a rather high current (7.5 mA). With selected samples and individually adjusted current one can get a low TC over a reasonable large range. Still with the now relatively high price this can also get pricy to select for both low noise and low higher order TC. With the relatively high power, an oven for the zener would also need relatively high power (e.g. something like 2 times the power).  The chinese 2DW232 may be powe noise, but also relatively high 2nd order TC and large scattering (e.g. more like 1N821). So this also needs some luck (a good batch), selection and likely an oven with relatively high power or a tricky compensation circuit.

I have not tested a 1N82x, so not sure about their typical noise level. The reports a scattering a lot.

[Cerebus]

What is your contribution besides being picky? This isn't an language course but a discussion of electronics devices.

Sorry, just trying to be helpful. It most certainly isn't a language course, but it helps if we can all communicate clearly so that we understand each other. I've had to try to contribute to technical conversations in Germany, so I hope I appreciate the difficulties of trying to do it the other way around.

[guenthert]

What is your contribution besides being picky? This isn't an language course but a discussion of electronics devices.

     We don't understand you either, so if a native speaker offers some help in improving your clarity in expressing yourself in the lingua franca of a technical forum on the Internet, then for the benefit of the rest of us, please take it.

[SilverSolder]

[...] The 1N829 seem to be special in that they can also have a relatively low higher order TC, though at the price of a rather high current (7.5 mA). With selected samples and individually adjusted current one can get a low TC over a reasonable large range. Still with the now relatively high price this can also get pricy to select for both low noise and low higher order TC. With the relatively high power, an oven for the zener would also need relatively high power (e.g. something like 2 times the power).  The chinese 2DW232 may be powe noise, but also relatively high 2nd order TC and large scattering (e.g. more like 1N821). So this also needs some luck (a good batch), selection and likely an oven with relatively high power or a tricky compensation circuit.

I have not tested a 1N82x, so not sure about their typical noise level. The reports a scattering a lot.

My "golden example" behaves like a gentle kitten at around 4.2mA, in terms of both noise and TC.   I found a pile more 1N829 that I have yet to test - I suspect that there are "golden examples" of most devices that, through sheer luck, perform well above average.  I also think these "golden examples" are picked out at the factory and sold at exorbitant prices to high end customers (like the military). (Do not confuse this with the fact that even average performing specimens are ALSO sold at high prices!).  - bottom line, I think it is unlikely to find a "golden" example out of a batch of cheap devices, but it isn't going to stop me trying! 

[Vtile]

Is the popcorn noise temperature dependent, one could assume that normal noise at least is. When aproaching 0K noise would decrease.

Oh, must resist from upgrading from 5.5 digits to 8.5 

[Kleinstein]

The temperature dependence of the popcorn noise is a good point. There is the general tendency for charged states to have a longer life time at lower temperature. So a lower temperature may not be that desirable.  The hight of the jumps should not change that much with temperature.
Popcorn noise may be less trouble if faster - the part above some 1-10 Hz is not such a serious problem as the very slow part.  This idea may also be behind the relatively high set temperature in the LM399.

I have not tested this for the JFETs - it may be worth a try to set the oven to a higher temperaure, like some 50 C.

[Vtile]

That what I was starting to crasp about that things get worse on popcorn noise since quantum things... Also found some papers . .interesting stuff.

Have anyone implemented high temperature ovens with controlled ramp up/down to prevent shock and give time of internal relaxation of substrate, thermal shocks are at least for jewel grade silica minerals (speaking hundrets of degrees here, for ie. color manipulation) not a good thing at all. Same with many other manerials like glass.

[guenthert]

     iirc, the noise of a 1N829(A) isn't specified, just the tempo (with the A version a bit better).  I read several times, that the 1N829A is expensive, yet the 1N829 can be had pretty cheap, e.g. https://anchor-electronics.com/price-list.pdf .  I wonder, whether finding a 'golden' zener is just more work when testing 1N829 instead of 1N829A or whether they are actually produced differently.

[Andreas]

Hello,

the noise I measured is actually quite different from device to device and especially from manufacturer to manufacturer:
(stray between 1.7uVpp to 22 uVpp as 1/f noise between 0.1 and 10 Hz)

https://www.eevblog.com/forum/metrology/lm399-based-10-v-reference/msg1137519/#msg1137519

The difference is only specification of T.C.  (and differential resistance) at a nominal 7.5 mA current.
Usually you have to test for the "real" zero T.C. current anyway.
So you can also take cheaper 1N825 or 1N827 and select them for noise and zero T.C. current.
(after some kHrs of pre-ageing).

With best regards

Andreas

[IconicPCB]

Dietert1,

Please see the attached files.
These two files are scans from National semiconductor  '77 FET manual.

[dietert1]

OK, this is a DC application aiming for low noise. When i look for low noise at low frequency, 50 and 51 JFETS are marked "Secondary choice" and 52 isn't marked. What was your criterion?

Regards, Dieter

[kleiner Rainer]

Good morning,

concerning good application notes, I found that the Siliconix data books contained lots of information about JFETs. As a matter of fact, Siliconix was founded as a manufacturer of (J)FETS.

Considering noise behaviour of JFETs, the 1986 FET Data Book contains a very thorough appnote: section 7, page 39 to 46, "Audio-Frequency Noise Characteristics of Junction FETs" by Bruce Watson. Page 45 shows the noise behaviour of several geometries. Bottom Line: "A second way to achieve low eN is to use a device with a large gate area. Empirically, eN is inversely proportional to the square of the gate area (eN 0: I/AG2), independent of gfs' This large gate area philosophy has been followed in the design of the Siliconix 2N4867A FET, and noise performance of the device is discussed later in this Application Note. A major advantage of this type of design is that eN is significantly lowered and lN also remains at a low value" (page 40).

Link to the databook: http://www.bitsavers.org/components/siliconix/_dataBooks/1986_Siliconix_FET_Databook.pdf

Another good read about FET basics: http://www.bitsavers.org/components/siliconix/Designing_With_Field_Effect_Transistors_1981.pdf

Chapter 2.6 (page 38) describes the noise characteristics, 3.12 (page 122) repeats the above mentioned application note.

Cross-referencing JFET geometries between Siliconix and National is easy. Simply look up a part number and note the geometry.

Example: J113 Siliconix geometry NCB, National geometry 51. BTW the J111/112/113 is specced as a chopper, but I have seen its use as a low noise audio preamp. Looking at the die drawing, it seems that the required large gate area is a given here. Luckily I scored 75 J113A at ham radio fair Friedrichshafen for a few cents, still on paper tape (complete with ESD protection). Maybe I should give it a try as a reference.

Greetings,

Rainer

[IconicPCB]

While this is indeed a notionally DC application it is in fact a current source application.
Process 53 is designated as primary choice for this application.
Why?

Gate geometry providing high internal impedance current source.

Please google

Current sources and voltage references  Linden T Harrison pdf download

Chapter 6 may help


I nave contacted Interrfet with the view to obtaining a recomendation on a more readily available less costly option.

In the course of discussion i have been presented with some interesting informatio i intend to share with You tomorrow morning.

Work and other demands on my time during the day prevented  me from doing so today.

So just like the chinese zener diode we could spend some time and energy to identify a device and perhaps do a group buy.

I can source some metal can FETS in the USD0.50 per piece again part number of the morning.

[DeltaSigmaD]

@Kleinstein: I fully agree that the 2N4416A is not the best choise. I will assemble references with different JFET types. As a consequence of my bad experience with humidity diffusing into plastic packages, I prefer the TO-18 case.  By the way, I observed random telegraph noise of the 2N4416 which is most intensive at a particular temperature, while there are temperatures free of RTN. The JFETs don't have a stress reducing layer below the chip, as it can be seen at some references. It seems that you can't get JFETs in an optimum case. 

Possibly someone is interested on my reasons for testing JFET references:
Zener diode references base on a controlled avalanche breakdown. My understanding of avalanche break-down is as follows: after ignition of a microplasma, its current drain is limited by the doping concentrations in the n and p layers (roughly a resistive feedback, the current density is limited). There is a competition of microplasmas: the microplasmas with the lowest break-down voltages determine the reference voltage, since the total diode current is well controlled. Richie made excellent pictures of this avalanche break-down in the LTZ1000, where a limited number of bright points is visible in the depletion zone. Now, microplasmas are switched on at any imperfections of the Si crystal. A microplasma is a locally very restricted process, and it will always be extremely sensitive to any modification. Zener references are very stable if a high number of microplasmas determines the reference voltage, what can be obtained with a high zener current. The LT1236 has the lowest possible current consumption for a Zener. Therefore, only a limited number of microplasmas determines the reference voltage. I made experiments with static magnetic fields in the chip plane of the LT1236, and switching of different microplasmas can be oberved when the orientation of the magnetic field is rotated. For instance, the RTN is largely modified with rotating the field (besides a weak Hall effect). Unfortunately, these effects are not stable. The instability cannot be reliably improved by magnetic fields. LT1236 advantages were: low consumption, good short term noise, hermetic package; disadvantage: temperature drift demands temperature control. As consequence, the LT1236 project was interrupted, and JFET references are tested now. Preliminary result: good candidate, but the compensated JFET reference will always be a very expensive solution, since its adjustment needs many hours of laboratory work.